NL8620518A - METHOD FOR RECEIVING FREQUENCY MODULATED ANALOGUE SIGNALS WITH DIGITAL PROCESSING AND DEVICE FOR CARRYING OUT THIS METHOD - Google Patents

Description

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Applicants name as inventors: 1. Vladislav Valentinovich NIKOLAEV, 2. Mikhail Urovich BANK, 3. Viktor Mikhailovich KOLESNIKOV, 5 4. Boris Iosifovich SHEKHTMAN and 5. Mikhail Alexandrovich YARANTSEV.

Method of receiving frequency-modulated analog signals with digital processing and apparatus for carrying out this method.

Field of technology.

The present invention relates to radio-reception technology and, in particular, the invention relates to a method for receiving frequency-modulated analog signals with digital processing thereof and an apparatus for carrying out this method.

State of the art.

The classical method of converting a frequency-modulated signal into an audio signal (LM Kohonovich, "Binaural radio-television", Moscow, Svyaz Publishers, p. 12, 1974) involves converting a radio-frequency signal into an intermediate frequency (MF ) signal followed by demodulation and amplification of the produced audio frequency signals. In the case of binaural reception, an additional operation is performed: after demodulation, the signal is divided into components corresponding to the left and right channels.

This method is simple, but it causes distortions of the audio signal due to the special properties of the frequency-30 demodulation and the amplification of audio frequencies.

Known in the art, a method for receiving frequency-modulated analog signals is described in the article "Ein digitaler Demodulator für aquidistant abgetonte FM-signal", published in "Nachrichtentechnische Zeitschrift", p. 36 (1983), part 12.

35 According to this method, a frequency modulated analog signal is converted into a medium frequency signal: f = fo + & f, (1) 40 where 78 6 2 0 5 1 8%) 2 Μ f0 is the unmodulated frequency of the MF signal; &, £ is the frequency deviation of the MF signal.

This signal is subject to analog-to-digital conversion, with at least three such conversions (samples) being performed during an MF period. Then, the digital signal thus obtained is processed according to the formula _ 1 Ai + A3, ^ * w - arccos ~ άΓ m 10 where w: 2 π f is the instantaneous frequency of the sampling period Tö;

Ta is the period between two adjacent samples, that is, the sampling period;

A1, A2, A3 are values of the code in the three consecutive samples.

After this, the signal is subjected to inverse conversion (digital-analog) so that it can be directly fed to the terminals of a loudspeaker for listening.

Producing a digital signal using the known method requires two conversions of the MF signal: an analog-digital conversion and a frequency conversion, each of which results in signal distortion.

In addition, to reduce non-linear distortion and noise, the conversion is performed in a high mid-frequency range from 4 to 11 MHz. Therefore, in order to obtain a high accuracy of the measurement of the deviation, a multidigital code is necessary, the useful information only being present in the least significant digits of this code.

Known in the art is a device for performing the reception of frequency-modulated analog signals (see article 30 "Ein digitaler Demodulator für aquidistant abgetonte PM-Signale", published in "Nachrichtentechnische Zeitschrift", volume 26 (1983), part 12) comprising a converter for converting a frequency modulated analog signal and an analog-to-digital converter, a processing unit and a digital-to-analog converter connected in series.

The frequency-modulated analog signal from the converter output is applied to the input of the analog-to-digital converter, into which it is converted into a digital signal. Then, the digital signal is processed by the processing unit according to the formula (2) and then it is subjected to a reverse digital-analog conversion.

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The known device ensures a low accuracy of the measurements due to the low percentage of useful information in the demodulated signal. In addition, the need for high frequency operation in a range from 4 to 11 MHz makes the device rfunr and 5 complex.

Description of the invention.

The main object of the invention is to provide a method for receiving frequency-modulated analog signals with digital processing, wherein a direct conversion of a frequency deviation of the intermediate frequency signal into a code is performed and digital processing of the signal for reducing the distortions in the demodulated signal, while additionally providing an apparatus for carrying out this method which is simple in design and reasonable in price, while providing high accuracy of the measurements and an optimum mode of measurement. implementation of the said method is ensured.

This object is achieved by providing a method of receiving frequency-modulated analog signals with digital processing, in which the analog signal is converted into a center frequency analog signal, which center frequency is equal to: f = fo + Af, (1) wherein 25 fo is the unmodulated frequency of the intermediate frequency signal;

The frequency deviation is from the intermediate frequency signal, while an MF analog signal is converted into a digital signal; wherein according to the invention the digital signal is obtained by converting the analog MF signal into a pulse train with a repetition frequency equal to the center frequency, the pulse train thus obtained is divided cyclically by K, in order to obtain a new pulse train, whose duration is equal to T + t. k, where t + I / f - is the current value of the intermediate frequency period; wherein each regular sub cycle is started at the time corresponding to the start of a regular sampling period of the analog MF signal and each pulse of the new train is used to generate a digital code corresponding to the duration of each pulse of the new train, which is subsequently converted into a code proportional to 40 the frequency equal to f / k according to the following expression: '. 86 2 05 1 8 'sc 4

V

N *. = m / NT (3) where 5 ΝΓ the code is proportional to the frequency F = f / K;

Nx the code is proportional to the duration of each pulse of the new train; m is the scale factor; then a code is formed which is proportional to the MF signal deviation as a code difference corresponding to the frequency equal to f / K and unmodulated frequency of the MF signal.

For the reception of frequency-modulated binaural analog signals in a system of polar-modulated oscillations, the sampling period of the analog MF signal is selected equal to half the period of the subcarrier frequency, where the. sampling period in time is related to the extreme of the subcarrier frequency, and a digital signal for each sampling period is formed.

For the reception of binaural frequency-modulated analog signals in a pilot tone system, the period of sampling of the analog MF signal is selected equal to one-fourth of the period of the tone, the sampling period being synchronized with the extremes of a dual pilot tone frequency and where a digital signal is formed at each sampling period.

The object of the present invention is also achieved due to the fact that the device for performing the method of receiving frequency-modulated analog signals with digital processing comprises a converter that converts the frequency-modulated analog signal into an intermediate frequency signal, and which according to the invention comprises a comparator, one input of which is connected to the output of the converter of the frequency-modulated analog signal into an intermediate frequency signal and wherein the other input of the converter is connected to a common bus; wherein a frequency divider is provided, the input of which is connected to the output of the comparator; a pulse length measuring unit whose data input is connected to the output of the frequency divider; a processing unit whose inputs are connected to the outputs of the pulse length measuring unit; a signal subunit, the inputs of which are connected to the outputs of the processing unit, while the outputs are inputs of the device; further comprising a clock pulse generator 5 * 20, the control input of which is connected to the comparator output and an output of this unit is connected to the control inputs of the frequency divider, the pulse length measuring unit and the processing unit, while the other outputs thereof are connected to the respective clock pulses of the signal subunit.

The present invention provides the ability to perform the direct conversion of the MF signal deviation into a code, as well as reducing the distortions of the demodulated signal, in order to increase the accuracy of the conversion of an analog signal into a digital signal and simplify the design of the device and reduce the cost price.

Brief description of the drawings.

The invention is further described by way of example with reference to the accompanying drawings, in which: figure 1 shows a block diagram of the device for receiving frequency-modulated analog signals with digital processing according to the invention; Figure 2 shows a block diagram of the converter suitable for converting a frequency-modulated analog signal into a medium-frequency signal according to the invention; Figure 3 shows a block diagram of the pulse length measuring unit according to the invention; Figure 4 shows a block diagram of the clock pulse generator according to the invention; Figure 5 shows time diagrams for explaining the operation of the device according to the invention; Figure 6 shows time diagrams to explain the operation of the clock pulse generator according to the invention.

Preferred embodiment of the invention.

The method according to the invention for the reception of frequency-modulated analog signals is carried out as follows. The incoming frequency modulated signal is converted into a center frequency analog signal: 35 f = fo + Af, (1) where fo is the unmodulated frequency of the center frequency signal; 40 After the MF signal deviation is, «8620518 *» 6

After this, the analog intermediate frequency signal f is converted into a pulse train, i.e. rectangular curves of the same frequency. Subsequently, a cyclical frequency division of the obtained pulse train with a factor K is carried out, for which the factor 5 applies to the sub-factor K: K s -ψ- (4) tmax in which <1 q Ta is the sampling period of the analog signal of the middle frequency f; tmM = —z ---— is the maximum intermediate frequency period.

Eo - ΔΓ 15 Each frequency dividing cycle is started at the time corresponding to the start of a regular sampling period. As a result, a new train of pulses with a duration T = t.K and a repetition frequency equal to Td is produced. After this, the pulse duration T = tK is measured per sampling period Td, where t = i / f is the current value of the period of the intermediate frequency ie f and a binary digital code is formed, which is proportional to T. The code Nx is converted in a code Nb which is proportional to the frequency F = f / K and coupled to NT via the following relationship: 25 - TC "'3) where m is constant and equal to the scale factor, with simultaneous subtraction of the code constant N proportional to the unmodulated frequency f0 of the intermediate frequency signal, i.e.:

Nb- - N = | δΝ | (5) while the sign aN is determined by the deviation of f from f0.

Thus, a code is formed proportional to the deviation of the signal with an intermediate frequency f.

For reception of binaural frequency-modulated analog signals in a system of polar modulated oscillations, the sampling period T «a is equal to half the period Tp of the subcarrier wave synchronized to the extremes of the subcarrier frequency, - • 8626518

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7 while the information obtained in the form of a code aN is in turn distributed on the right and left channels.

To receive signals in a pilot tone system, the sample period T <a equal to one-fourth of the pilot tone period is synchronized with the extremes of the doubled pilot tone frequency.

It is assumed that the code aN is proportional to Af.

Suppose, ο N = ** '> (6) imax = K, _tc To tr KK (to - Ata) 15 = tx where N_ / N / N are code equivalents corresponding to the J-max «LO -Lmin maximum, nominal and minimum values of the pulse duration for the T; 20 Att is the period increment corresponding to f - Af;

At2 is the period increment corresponding to f + Af; t0 is the period of the unmodulated frequency f0; tr is the period of the reference frequency fr-In this case: 25 «m _ tg. m m. fuin ...

Fmixr N_ "K (to + At,) = fr - K

* max _ m _ m. tar _ m. f o WFo = N_ K. to K. fr

To 30 N _ m _ tr. m m.

Fmax = N K (to - At,) = fjr. K

* mln where »N, N_, N are the code equivalents corresponding to

FmJL is to £ nax the minimum fnin, unmodulated fo and maximum fmax values of the frequency f; m = a constant, that is to say the scale factor, which for convenience is chosen numerically equal to n £, that is, 40 '8620518 8 *

If2 f 2 ® = K = (8) lo £ o where fx- = 1 / tx- is the reference oscillator frequency; 5 fmin = f O - Af is the minimum value of the frequency f; ^ max = f O + Af is the maximum value of the frequency f.

After subtracting the code frequency N proportional to the unmodulated frequency fo, the expression for the code aNi with maximum increase of the frequency f is written in the form: 10 .. m m m. Af Λ V- - * * τς - TT ’τιγπγ '1

imin 10

The expression for the code aN2 with maximum decrease of f is written in the form m m m. Af ,, „,“ fo - - tc - tc— * τγπγ (10) 10 Imax

Thus, the expression for aNi coincides with that for aN2 / ie aNi = aN2 = aN (11) 25 By equating the constant with —-— = c the following equation can be written | AN | = c. Af (12) 30

The last equation shows that the code aN is proportional to Af. The proportional dependence of the code aN on Af indicates the absence of non-linear distortions in the output signal processed according to the method of the present invention. Taking equation (8) into account, the final expression for the code will be | aN | the form: | an | K- * f (13) to 40 Thus, a digital signal is obtained which is proportional to the .8620518 deviation £ f of the signal with the center frequency £.

The device for carrying out the method according to the invention comprises a converter 1 (figure 1) for converting a frequency-modulated analog signal into an intermediate frequency signal, where at the input of the converter is an input of the device while the converter output is connected to an input 2 of the comparator 3, the input 4 of which is connected to a common bus.

Connected to the output of comparator 3 is a frequency divider 5, the output of which is connected to the data input of the pulse-10 length measuring unit 6. The device also comprises a processor 7, the inputs of which are connected to the outputs of the pulse length measuring unit 6, while the outputs are connected to the inputs of a signal subunit 8, the outputs of which form the outputs of the device. All these units 1, 2, 3, 4, 5, 6, 7, 8 form a measuring part 15 of the device. The follower part of the device consists of a clock pulse generator 9, the control input of which is connected to the output of the comparator 3, while its outputs 10 and 11 are connected to the respective clock inputs of the signal subunit 8, while its output 12 is connected to the control inputs of the frequency divider 5, 20 pulse length measuring unit 6 and processor 7.

The converter 1 may, for example, be manufactured as shown in Figure 2, i.e. consist of a frequency converter 13 and a double-sided rectifier 14 connected in series. The frequency converter 13 may be based on the circuit (see VV Pashkov "Ra-25 diopriemnye ustroystva", Moscow, Radio i Svyaz Publishers, 1984, p. 139, figures 5.30 and 5.31) which act as multipliers for multiplying the input signal and the signal from an internal oscillator followed by frequency selection. The rectifier 14 used for doubling the deviation is described in the same book, page 189, figure 6.32.

Comparator 3 (Figure 1) may be identical to that described in the book of B.K. Nesterenko "Integralnye operatsionnye usiliteli (spra-vochnoe posobie po primeneniyu)", Energoizdat 1982, p. 120.

For example, the frequency divider 5 can be fabricated similar to the "shift counter with K = n" based on the ring counter principle and described in the book "Spravochnik po integralnym mikroskhemam", published by BV Tarabrin, Moscow, Energia Publishers, 1981, p. 717, figure 5-216 However, in this case the output signal must be taken from the output Qi, the data input D of the first trigger 40 must be connected to the output Qn and not to the output Q ** and above. .8020518

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10 * In addition, all tractors must be set by the inputs "R", including the setting of the first trigger, while in the figure mentioned above, the first trigger is set by the input "S".

One of the possible embodiments of the pulse length measuring unit 6 is shown in figure 3. The data input of the unit 6 is directly connected to the interconnected inputs 15 of the logic AND circuits 16, 17, 18, 19 as well as to the trigger input of a reference frequency pulse generator 20. The output of the generator 20 is Connected directly to an input 21 of the AND circuit 16 and to the input of the delay lines 22 connected in series, the output of each delay line 22 is connected to the inputs 23 of the AND circuits 17, 18, 19. The output of the AND circuit 16 is connected to the complementing input of a counter 24, while the outputs of the AND circuits 17, 18, 19 are respectively connected to the S inputs of the RS triggers 25, of which the forward outputs are connected to the inputs of a converter 26 adapted to convert the Johnson code to a binary code. The setting inputs R of all RS pullers 25 are connected to each other connected to the control input of the unit 6. The outputs of the converter 20 26 and the outputs of the counter 24 are data outputs of the pulse length measuring unit 6.

The processor 7 may be in the form of a preprogrammed constant memory device (see A.G. Alekseenko and i.i. Shagurin, "Mikroskhemotekhnika", Moscow, Radio i Svyaz Publishers, 1982, 25 p. 27). As a hardware embodiment, the processor 7 can be manufactured, for example, in the form of a multiplier based on a ROM device performing the operation m.1 / NT (see F. Meizda, "Integralnye skhemy, tekhnologiya i premenenie", Moscow, Mir Publishers , 1981, p. 160, figure 5.34) and a coincidence type adder acting as a subtractor (see V. Goldsward, "Proektirovanie tsyfrovykh logicheskikh ustroistv" Moscow, Mashinostroenie Publishers, 1985, p. 66, figure 4.7). The multiplier based on a ROM device can be replaced by an operational sub-device (see S.A. Mayorov and G.I. Novikov, "Printsipy organizatsii tsifrovykh mashin", Leningrad, Mashi-35 nostroenie Publishers, 1974, page 305, figure 8.10).

The signal subunit 8 (Figure 1) consists of two identical registers for the right and left channels. The data inputs of each register are connected to the output of the processor 7, while the clock inputs are connected to the corresponding outputs of the clock pulse generator 9. These registers are described in the book "Spra-8620518 11 vochnik po integralnym mikroskhemam" , published by BV Tarabarin,

Moscow, Energia Publishers, 1981, biz. 725, Figure 5-228).

The pulse generator 9 can be designed as shown in figure 4. In this case it contains the following series-connected elements: a frequency detector 27, the input of which is the input of the generator 9, a filter 28 and a comparator 29 , the forward output of which is connected to the inputs of a controlled multivibrator 30, a short pulse shaper 31. The inverse output of comparator 29 is connected to the inputs of a controlled multivibrator 32 and a short pulse shaper 33. The outputs of the controlled multivibrators 32 and 30 are the outputs 10 and 11 of the generator 9, respectively, while the outputs of the formers 31 and 33 are connected to the inputs of the AND circuit 34, the output of which is the output 12 of the generator 9 is.

The frequency detector 27 can for instance be manufactured such as a pulse counter according to the book of V.V. Palshkov, "Radiopriemnye ustroistva", Moscow, Radio i Svyaz Publishers, 1984, p. 214, figure 7.28.

For example, the filter 28 can be manufactured as described in the book of P.M. Zhmurin, "Stereodekodery", Moscow, Svyaz Publishers, 1980, p. 22, figure 4.7, ie tuned to the auxiliary carrier.

The comparator 29 can be equal to the comparator 2 (Figure 1).

The short pulse shapers 31, 33 (Figure 4) may be constructed as a differential circuit based on logic elements. Such a circuit is described in the book by T.M. Agakhayan, "Integralnye mikroskhemy", Moscow, Energoizdat Publishers, 1983, p.

442, Figures 10, 10a, using an AND gate (without inversion).

The controlled multivibrators 30, 32 may be in the form of devices described in the book of E.A. Kolmbet, "Taimery", Moscow, Radio i Svyaz Publishers, 1983, no. 39, p. 32, figure 2.8).

Figure 5 shows time diagrams showing the operation of the device 35 according to the invention. The curves show: (a) an output signal from comparator 3 (Figure 1), consisting of a train of rectangular pulses, the repetition frequency of which is equal to the intermediate frequency f; (b) an output from the frequency divider 5 (Figure 1), consisting of a train of rectangular pulses of duration T; .8 6 2 05 1 8 t 12 (c) an output signal produced in output 12 (figure 1) of generator 9 at times' t'o, ^ 2, ... Έ'π and consisting of a sequence of short rectangular pulses separated by T <a; 5 (d), (e) are signals supplied respectively at the outputs 10 and 11 (Figure 1) of the generator 9 at times rn, r2, li, 12; the times r-ι and r2 correspond to the moments of the recording of the output data in the right channel register of the signal subunit 9 (figure 1), while the moments 1 · ,, 12 (figure 5e) 10 correspond to the moments of the recording the output data in the left channel register; D is the time interval required for each regular conversion cycle.

Figure 6 shows time diagrams indicating the operation of the clock pulse generator 9 (Figure 1). Curve 6a shows a signal applied to the input of generator 1 (Figure 1) from the output of comparator 3, which signal is a train of rectangular pulses, the repetition frequency of which is equal to the intermediate frequency f.

Curve 6b shows the signal formed in the output of the filter 28 (Figure 4) and consisting of a polar modulated wave.

Curves 6c and 6d show the signals formed in the forward and inverse outputs of comparator 29 (Figure 4) and consisting of trains of rectangular pulses offset from each other by Td.

Curves 6e, 6f, 6g show the signal identical to the signals 25 represented by curves 5c, 5d, 5e, respectively.

The operation of the device according to the invention for performing the method of receiving frequency-modulated analog signals with digital processing under constant conditions will now be described. First, the conversion of a binaural signal is assumed to be the most promising technique, and then all simplifications necessary for discussion of a monophonic device are described. For a better understanding, the operation of the measuring part of the device is described separately from the operation of its follower part.

35 The frequency-modulated analog signal applied to the input of converter 1 (Figure 1) is converted into a medium-frequency signal f = fo + Af, which is applied to the input of comparator 3 (Figure 1) via the double rectifier 14 (figure 2), and this makes it possible to obtain a signal with doubled deviation, i.e. Af '= 2Af, in the input of the comparator 3.

.8C20518 s 13 »

Xn the output of the comparator 3, a train of rectangular pulses is formed (Figure 5a), the frequency parameters of which are equal to the parameters of the input signals of the comparator 3 (Figure 1), while the amplitude parameters of these pulses correspond to the voltage levels necessary for the operation of the logic elements in units 5, 6, 7, 8, 9. The output of the comparator 3 is processed by the frequency divider 5 with a dividing factor K = constant, the value of which is determined by the equation 10 K . t .. * <Td (14) where tmaK is the maximum duration of the pulses in the output of the comparator 3.

Until the time of the next partial cycle and the next pulse length measurement, the frequency divider 5 and the pulse length measuring unit 6 are prepared for operation with the pulse formed in the output 12 (figure 1) of the generator 9 at time X 0 (figure 5c). , which pulse has a repetition frequency of 1 / Ta.

Under the action of this pulse, the frequency divider 5 (Figure 20-1) starts a regular sub-cycle. If pulses are applied to its input Td K during the sampling period, a pulse of duration T is formed in the output of the frequency divider. The duration T of the pulse is measured in the unit 6 by counting the number of pulses of the reference frequency f *. within the time period T.

This code N * is applied to the input of the processor 7, which in every regular cycle (per sampling period T «a) performs a conversion operation in the form: aN = r5 - N (15) 30 in which m = a constant equal to the scale factor; N = a constant equal to the code proportional to the value of the unmodulated frequency fo of the intermediate frequency signal 35 f 'NT, the code proportional to the measured pulse length; N the code is proportional to the deviation Af of the signal with the center frequency f.

When the processor 7 is in the form of a multiplicator and a coincidence adder operating as a subtractor and connected in series with the above-mentioned multiplier, the. 8? 0 5 1 8

V

14 code Ντ applied to the input of the multiplier that performs the operation m.l / Ντ and produces an output code NF proportional to the instantaneous value of the intermediate frequency f per sampling period T «a. The code N is then subtracted from this code NF by means of the op-5 counter.

The code N can be formed using a set of DC voltage sources whose levels correspond to the logic "zero" and "a" levels of the elements connected to the addition inputs in an order corresponding to the value of the code N .

Thus, in each output period TA, a code aN proportional to Af is generated in the output of the processor 7 and is applied to the data inputs of the signal subunit 8, which consists of two registers for the right and the left channels. The values of the code aN are alternately recorded at a frequency equal to 1 / Td in these registers by the pulses generated in the outputs 10 and 11 of the generator 9 (Figure 1). This code is an output of the device.

In the following cycle, the above-mentioned processes are repeated, assuming the occurrence of the pulse at the time ӣ \ 20 (Figure 5c).

The duration D (Figures 5d, 5e) of the time interval during which a conversion cycle is formed is chosen according to the formula K. tm «<D. Ta (16) 25

The operation of the follower part of the device, i.e. the clock pulse generator 9 (Figure 4), proceeds as follows.

At the input of generator 9 of the output of comparator 3 (figure 1) a signal is applied, which consists of a train of 30 rectangular pulses, the repetition frequency of which is equal to the intermediate frequency f (figure 6a). After the signal has been processed in the frequency detector 27 (Figure 4) and filter 28, it is converted into a polar modulated oscillation (Figure 6b). This signal is applied to the input of comparator 29 (Figure 4), the signals of which are shown in the forward and inverse outputs in Figures 6c and 6d. The signals generated in the forward output of the comparator 29 (Figure 4) are delayed by a time D (Figure 6e) whose duration is reduced to a desired value by the controlled multivibrator 30 (Figure 4) and takes a form that 40 is shown in Figure 6e. The signal is formed in the inverse output of the comparator, 8620516 ... ».

Figure 30 (Figure 4) processed by the controlled multivibrator 32 is shown. Both signals are time-divided in the manner shown in Figures 6e, 6f and these are pulses of the recording of the output data in the corresponding registers of the signal-5 subunit 8 (Figure 1). The signals formed in the forward and inverse outputs of the comparators 29 (Figure 4) are applied to the inputs of the corresponding short pulse formers 31 and 33, respectively, and then these signals pass from the outputs of these formers through an OR circuit 34 to the output 12 of generator 9. Each of these signals starts a regular duty cycle of the device according to the invention.

The duration T 1 of the pulses formed in the outputs 10, 11 and 12 of the generator 9 must be of small value so that the relationship D + T, i ta (17) is met, in this case the minimum value of the pulses determined by the duration required for recording the information in the signal subunit 8 (Figure 1) and for resetting the frequency divider 5, unit 6 and processor 7.

It therefore follows from the description of the operation that the measuring part of the system in each cycle (per sampling period Td) determines the code aN which is proportional to the instantaneous (per sampling period Te) value of the frequency division from its unmodulated frequency f0, 25 while the tracking part performs each regular measurement cycle within the half-interval intervals of the subcarrier frequency located near its ends.

In the stereophonic system with a pilot tone instead of an auxiliary carrier frequency, the pilot tone signal is used as a reference oscillation, from which clock signals are formed. When the above system is used to receive monophonic signals, the device is converted to asynchronous mode. The time distribution of all clock pulses remains the same as shown in Figures 5 and 6.

In the device according to the invention the digital signal is formed directly from the intermediate frequency signal. The exclusion of a conversion - frequency demodulation - increases the accuracy of the measurement of the deviation Δf »simplifies the device and reduces costs.

40 Furthermore, an example is given for the case of a system 8620518 16 with a polar modulated oscillation, in which the actual value of the frequency fi for standard (for this system) parameters of the frequency modulated signal and the value | aN | = 2 *.

5 It is assumed that N = 512 + 2n_1 the code equivalent is proportional to the maximum deviation Af; n = 10 is the word length of the digital binary code;

Af = 50 x 103 Hz is the frequency deviation; 10 f0 = 465 x 103 Hz is the unmodulated frequency; T «a = 15,625 x 10-6 is the sampling period; P = 8 is the number of delay elements; f *. the reference frequency is equal to f * = 1 / t ^; tx is the delay time of a delay element.

15 From (4) it follows that K. - 15,625 »10-« _ K * t ™ „- 2.41 x 10- - 6 · 485 20 If it is assumed that K = 5 and using (13) follows: i K. fo. f «.

I ΛΝI —f§- 25 showing that fl I AN I. f8 r * K. Or, if the deviation is taken into account, £ 30. I I «. 512 x (465 x 10 -) = k. 2Af 5 x 2 x 50 x 103 200 10 Hz which is very acceptable for the implementation of a device based on logic circuit elements with emitter coupled transistors.

The actual value of the reference frequency fi is 40 ü = - 2 ° ° eX 1 ° * = 25 x 10 * Hz .8620518, c 17 ft which is particularly acceptable for the implementation of the Schottky barrier logic transistor transistor device arrangement diodes, while the use of logic emitter coupled circuits allows to increase the accuracy of the deviation measurement by at least one digit and increase the number of digits to n = 11.

Industrial application.

The apparatus according to the invention can be used in the construction of a receiver for receiving frequency modulated signals for demodulation of the chrominance subcarrier in the SECAM system as well as for demodulation of frequency modulated signals in video recording systems based on this modulation .

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Claims (4)

A method of receiving frequency-modulated analog signals with digital processing, wherein the frequency-modulated analog signal is converted into an analog center frequency (f) signal equal to: f = fo + Af, (1) 10 where fo de is unmodulated frequency of the MF signal; Is the deviation of the intermediate frequency signal; the analog intermediate frequency (f) signal is converted into a digital signal, characterized in that to obtain a digital signal, the analog intermediate frequency (f) signal is converted into a train of pulses with a repetition frequency equal to the intermediate frequency (f ); the frequency of the pulse train obtained is divided cyclically by K, thus obtaining a new train of pulses whose duration (T) is equal to T = t. k, where t = 1 / f is the current-20 value of the intermediate frequency (f) period; each regular sub-cycle being started at the time corresponding to the start of a regular period (Td) of the sampling of the analog intermediate frequency (f) signal, and each pulse of the new train used to form a digital code ( NT) corresponding to the duration (T) of each pulse of the new train, which is then converted into a code (NF) proportional to the frequency (f / K) equal to f / k according to the following formula: NF = m / NT (2) where m is the scale factor; after which a code (aN) is formed, which is proportional to the deviation (Af) of the intermediate frequency (f) signal as a difference code (NF and N) corresponding to the frequency (F) equal to f / κ and an unmodulated frequency ( f0) of the intermediate frequency signal (f). Method according to claim 1, characterized in that for the reception of binaural frequency-modulated analog signals in a system with polar modulated oscillations, the period 40 (Ta) of the sampling of the analog intermediate frequency (f) signals is such, 8 Ê 2 0 5 1 8 '». ft 19 9 is chosen to be equal to half the period (Tp) of the subcarrier frequency; the sampling period (Td) is synchronized with the extremes of the subcarrier frequency and the digital signal is formed by each sampling period (T «a). 5 Method according to claim 1, characterized in that for receiving stereophonic frequency-modulated analog signals in a system with a pilot tone, the period (T «a) of sampling the analog intermediate frequency (f) signal is selected 10 that this is equal to one-fourth of the period (Tp) of the pilot tone, that the sampling period (T «i) is synchronized with the ends of the doubled pilot tone frequency and the digital signal is formed at each sampling period (Td). 15 Device for carrying out the method according to claims 1 to 3, consisting of a converter (1) for converting a frequency-modulated analog signal into an intermediate frequency signal (f), characterized in that the device is provided with a comparator (3) one input (2) of which is connected to the output of the converter (1) suitable for converting a frequency-modulated signal into an intermediate frequency signal (f), while the other input ( 4) thereof is connected to a common bus, where a frequency divider (5) is present, the input of which is connected to the output of the comparator (3), a pulse length measuring unit (6) of which the data input is connected to the output of the frequency divider (5), a processor (7) whose inputs are connected to the outputs of the pulse length measuring unit (6), a signal subunit (8) whose inputs are connected to the outputs of the processor (7) while the exits of the unit (8) are the outputs of the device and a clock pulse generator (9), the control input of which is connected to the output of the comparator (3) while an output (12) is connected to the control inputs of the frequency divider (5 ), the pulse length measuring unit (6) and the processor (7), while the other outputs (10, 11) of the generator (9) are connected to the respective clock inputs of the sig-35 needle sub-unit (8). ***** -80 2 05 1 6