NL8420338A - METHOD FOR MANUFACTURING SOLAR CELLS - Google Patents

Description

f420338 VO 7288

Method for manufacturing solar cells.

The invention relates to the production of photo-voltage cells and more particularly in an inexpensive manner for the production of polycrystalline silicon solar cells, in which the damaged surface layer, which is formed during the hydrogen passivation, as a plating mask for the final plating steps is used.

Heretofore, a common method of manufacturing silicon solar cells has included the steps of forming a PN junction by diffusing an appropriate dopant into the front side of a silicon wafer or band, in a lattice electrode pattern etch a protective dielectric masking layer formed on this front face, deposit a nickel plating on all silicon released by etching, plating the nickel with copper and tin, the rest of the dielectric masking layer 15 of the front face and apply an anti-reflective coating to the newly released portions of the front face.

Although these manufacturing steps can be applied equally to both monocrystalline and polycrystalline silicon, cost considerations make it desirable to manufacture solar cells from the latter material. However, as is known, because of the minority carrier losses at grain boundaries, dislocations and the like, the efficiencies obtained with polycrystalline silicon solar cells are generally lower than those of monocrystalline cells. This has been improved by introducing a monovalent element, such as hydrogen, into the system to combine with the loose compounds associated with the structural defects, thereby minimizing the minority carrier recombining loss.

As is well known, an important consideration in choosing a series of cell treatments is that the combination of time and temperature in a step after the hydrogen passivation step does not cause the hydrogen introduced into the silicon to diffuse out of the passivated substrate again . For example, it has been found that a hydrogen passivated cell exposed to a temperature of 8420338 9 -2 -2 600 ° C for half an hour in vacuo loses practically all bound hydrogen and returns to its pre-passivation level, as shown from the current activity induced by an electron beam. In this connection, it is pointed out that the junction diffusion step in solar cell manufacture more particularly involves temperatures of the order of 900 ° C.

It has further been found that the hydrogen passivation normally heats the cell to such a high temperature that base metals, such as copper, migrate through the junction, resulting in a "soft" diode or short circuit. As, for example, by C.H. Seager, D.J. Sharp, J.K.G. Panitz and R.V. D'Aiello in the Journal of Vacuum Science and Technology, Vol. 20, no. 3, p. 430-435 (March 1982), the passivation of polycrystalline silicon can take place with a Kaufman type ion source, which is used to provide a hydrogen ion beam in the energy range of kilo electron volts. Relatively short exposure times (e.g., between 0.5 and 4 minutes) in an area of high ion energy and high flux (e.g., 1 to 3 milliamps per square centimeter) appear to be optimal. Such exposures generally result in the substrate temperature increasing to at least approximately 275 ° C if the substrate is carefully kept in contact with a suitable heat sink. Otherwise tre-. the temperatures above 400 ° C are easily raised.

It is important, however, that the temperatures be limited to less than about 300 ° C in order to avoid rapid migration of base metals into the silicon matrix. However, the manipulation of the substrate and the heat sink to easily perform thermal control during passivation becomes a rate limiting factor in high flow treatment at such ion sources. Therefore, it is desirable to avoid heat dissipation in order to obtain an inexpensive, high flow rate process. In addition, with EFG type silicon band, which can be produced economically, surface irregularities make heat dissipation difficult.

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Furthermore, the hydrogen passivation is most effective when the base silicon surface is free. Therefore, an optional plating mask used to determine the front electrode grating electrode pattern should be removed before passivation or added after passivation.

Therefore, it is an object of the invention to provide a series of treatment steps for the manufacture of solar cells, in which a hydrogen passivation step takes place after the treatment steps at high temperature but before any base metals are incorporated in the device.

A further object of the invention is to incorporate the hydrogen passivation step such that the passivation step of the silicon and nickel silicide located below the front electrode of a partially fabricated cell is improved.

Yet another object of the invention is to incorporate a hydrogen passivation step in the treatment of an EFG type silicon band in solar cells such that the need to dissipate heat from the substrate during passivation is avoided.

These and other objects are accomplished by a method in which, in a preferred embodiment, as applied to the manufacture of silicon solar cells, the following steps are performed, inter alia: (1) forming a thin grid electrode pattern of nickel (or a similar material) ) on the front face of a shallow junction silicon band, (2) hydrogen passivation of the junction side of the cell, (3) sintering the nickel to partially form a nickel silicide, (4) plating a further metal or further metals on the metal-coated portions of the cell, and (5) coating an anti-reflective material on the exposed surface of the silicon. Thereafter, the silicon can be further treated, for example to prepare it for connection to electrical chains.

In an alternative process, heating the sample during passivation provides energy for the nickel sintering step.

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These series of manufacturing steps have some essential characteristics. In the first place, it has been found that during the hydrogen passivation, the incident hydrogen ions change the surface of the silicon wafer so that the plating of metals 5 is impeded by an immersion plating on the modified surface. As a result, an optional plating mask, which is initially used to determine the electrode grid pattern on the front face, can be removed after an initial metal layer has been plated on the substrate. The passivation can now take place on an exposed base silicon layer, the passivation not only improving the electrical action of the cell but also, by altering the surface layer, serving as a secondary plating mask for subsequent dip plating steps. As a result, passivation of the exposed silicon base can take place before base metals are applied without the need for a further masking step for the dip-plating metalization. It has further been found that passivation can occur through thin layers of metals, such as nickel. Therefore, the silicon and the nickel silicide can be passivated under the initial thin nickel plating of a front electrode.

The invention will be explained in more detail below with reference to the drawing in which a number of steps are indicated, which are carried out in the manufacture of solar cells according to a preferred embodiment according to the invention. In the drawing, corresponding parts are provided with the same references. Furthermore, in the drawing, the thicknesses and depths of the various coatings and areas are not shown to scale, nor precisely according to their relative proportions, in order to simplify the representation. Referring to the drawing, the preferred embodiment of the invention relates to the manufacture of solar cells from P type EFG grown silicon band. For this embodiment, a starting part is started from a partly completed cell 1. The partly completed cell 1 has a substrate 2, which is preferably manufactured from a silicon strip with a P-type guide, of which one side (hereinafter the "front side"). mentioned) has a relatively shallow 8420338 *% -5- junction 4 (ie a junction with a depth, which lies between

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about 3000 and about 7000 A), an area 6 with an N-type conduction and a mask 8. The mask 8 consists of a material (eg a dielectric) to which metals, such as nickel, only slightly adhere, and the mask is configured to release portions of the front face of the substrate 2 in a pattern of a multi-fingered grating electrode (eg, an electrode of the shape shown in U.S. Pat. No. 3,686,036). The other side (hereinafter referred to as the "back side") 10 of the substrate is preferably provided with a layer 10 of aluminum alloyed with the substrate and a region 12 of the p + type. The p + region 12 preferably has a depth ranging from about 1 to about 5 microns.

The partially completed cell 1 can be made in a number of different ways. For example, the junction 4 and the region 6 in a P-type silicon substrate 2 can be formed by the diffusion of phosphorus, and the mask 8 on the front face thereof can be formed by photolithography or printing. The layer 10 and the p + region 12 can be formed by coating the back of the substrate with a layer of an aluminum paste, which comprises aluminum powder in a volatile organic carrier, such as terpineol, which can be removed by evaporation, then the substrate is heated to remove any volatile or pyrolysable organic components from the paste and to alloy the aluminum with the substrate and form the p + region. However, other types of substrate, junctions and back electrodes, and other manufacturing methods may equally well be used to obtain the partially completed cell 1.

Starting from such a prefabricated part, both sides of the substrate are first plated with nickel, with an adhesive deposit of nickel forming a nickel layer 14 at the back of the part over the entire surface of the aluminum layer 10, while the adhesive nickel deposit on the front side forms a layer 16 directly on the surface of the substrate 2 only in those areas released through the mask 8.

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The plating of the nickel layers 14 and 16 can take place in various ways. Preferably, this is done in accordance with the known electrodeless or immersion plating process, for example, an immersion plating process as described in U.S. Patent 5 4,321,283. The term "electrodeless plating" as used herein denotes a plating from a bath containing a reducing agent without using an externally applied electric field, while the term "immersion plating" denotes a process in which an object having a metal is plated without using an externally applied electric field by immersing the object in a plating bath containing no reducing agent, the plating comprising a displacement reaction.

As a preliminary step, the cleaned silicon substrate surface is pre-activated with an appropriate agent. This pre-activation procedure is desirable since the silicon surface often will not itself support the electrodeless plating process and any nickel plated on an untreated surface will generally only adhere to it slightly. Preferably, the activating agent is gold chloride, although platinum chloride, tin chloride palladium chloride, or other known activators may be used, as described, for example, in U.S. Pat. No. 3,489,603. Thereafter, both sides of the silicon band are coated with a layer of nickel, preferably by dip-plating the band in an aqueous bath, as described in US Patent 4321283, or an aqueous bath of nickel sulfamate and ammonium fluoride at a pH of about 2.9 and at about room temperature for a period of about 2 to 6 minutes.

At this stage, the mask 8 is removed from the substrate 2.

Depending on the nature of the mask, this can be done in a number of known manner, such as, for example, by using a buffered etching method. As a result of the removal of the mask, the front surface of the substrate 2 is released via the grid pattern formed by the nickel layer 16.

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The cell is then passivated with hydrogen. A preferred method is that in which the front face of the substrate 2 (and the nickel layer 16) is exposed to the hydrogen ion beam of an ion source of the Kaufman type (wide beam), which source is at a distance of about 15 cm from the substrate is prepared. This ion source is preferably operated at a pressure comprised between about 20 and 50 millimeters (hydrogen), a hydrogen flow rate of the order of about 25 to 40 s.c.c. per minute, a potential of about 1700 volts DC between source and substrate, and a beam of current comprised between about 1 and 3 milli-2 amps / cm at the substrate. It has been found that an exposure time of between about 1 and about 4 minutes is adequate to minimize both the minority carrier recombining losses that occur particularly with EFG type silicon cells (thereby providing in a passivation region with a depth of about 20 to 80 microns or about 100 times as deep as the junction 4) while at the same time providing a modified surface layer 18 with an approximate depth

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200 Å at the exposed parts of the substrate 2. It has furthermore been found that a minimum temperature rise of the substrate occurs during the passivation using a mechanical shutter for pulsing the ion beam with an active period of approximately 50%.

The exact nature of the modified surface layer 18 is not known. It is believed, however, that a damaged zone is present in which the crystal structure is slightly broken, and in which the silicon partially forms SiH or Si 2 with the hydrogen from the ion beam, but where the material may be amorphous. A small amount of carbon or one or more hydrocarbons may be required in the vacuum system to form the desired modified surface layer. As initially installed, the Kaufman type ion source used was provided with a graphite support having a diameter of about 13 cm, on which the substrates, with a side of more typically 5 to 10 cm, were centrally disposed. In some instances where a silicon support was used in place of the graphite support, the 8420338-4-8-formed modified layer did not behave as well as a plating mask as in the case where the graphite support was used. On this basis, it has been believed that carbon or hydrocarbon vapor generated by the incidence of the hydrogen ion beam on the graphite support may improve the formation of a dielectric layer on the surface of the substrate. Whatever the nature of this surface, it has been found that a modified surface layer 18 obtained in this manner with acceleration voltages ranging between about 1400 and about 1700 volts and exposure times of, for example, 1 minute is sufficient to prevent subsequent dip-plating of the silicon substrate between the nickel layers 16.

Then, the substrate is heated in an inert or nitrogen atmosphere to a temperature and for a time sufficient to sinter the nickel layers and cause the nickel layer 16 on the front side of the substrate to react with the adjacent silicon for forming a nickel silicide ohmic contact. For this purpose, the substrate is preferably heated to a temperature of about 300 ° C for a period of time between about 15 and about 40 minutes. This gives one

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20 nickel silicide layer 20 with a depth of about 300 Å at the interface between the nickel layer 16 and the substrate 2. The nickel layer 14 at the back forms an alloy with the aluminum layer 10. The temperature of this sintering step should not be much higher than 300 ° C since higher temperatures lead to excessive penetration of the nickel layer 16 into the silicon. It has been found that this thermal treatment when carried out in a forming gas (95% nitrogen and 5% hydrogen) also displaces hydrogen, which is loosely bonded to the nickel layer 16, improving subsequent plating adhesion.

The nickel of layers 14 and 16 is then etched with hot dilute nitric acid, followed by ultrasonic cleaning to remove excess nickel from both sides of the substrate. The nickel etching treatment not only removes a surplus of nickel, but also removes part of the nickel-aluminum alloy formed on the back of the substrate during sintering. After the nickel etching 8420338 fl -9 step, the layer 14 is characterized by a nickel-aluminum alloy layer, which is on the aluminum electrode layer 10, while the layer 16 is removed to release the nickel silicide layer 20 according to the preselected electrode grid pattern.

Thereafter, the nickel silicide layer 20 and the nickel-aluminum alloy layer 14 are further metallized with one or more layers 22 and 24, respectively, to provide suitable contacts. In these metallization steps, the modified surface layer 18 of the substrate 2 acts as a plating mask to prevent metal from adhering to the surface of the substrate between the pattern of the already adhering nickel silicide layer 20. Preferably, but not necessarily, this additional metallization involves applying a second layer of nickel to layers 14 and 20. The additional nickel layers are dip-plated in the manner described above to form the nickel layers 14 and 16 since nickel plating will provide plating on layers 14 and 16 but not on modified surface 18. Immediately thereafter, one or more layers of copper are applied (by dip plating and / or electroplating, by methods known per se) to the exposed nickel on both sides of the substrate to bond with the nickel layers and thereby to resist oxidation to secure and ensure great conductivity. The copper plating does not require masking of the modified layer 18 since the copper will not adhere to the modified layer. Thereafter, the device may be subjected to other treatments for known purposes, for example layers of tin and solder may be successively applied to the previously applied metal layers.

After the metallization, the edges of the cell (not shown) are trimmed and an anti-reflective coating 26 is applied to the front face of the cell. This last step can be done in a number of different known ways, such as by chemical precipitation from the vapor phase of, for example, TiCl 2. The anti-reflective coating 26 may also be formed by a silicon nitride plasma deposition.

By way of example, the preferred method of practicing the invention includes the above-described individual steps in the preferred mode, which is described in detail for each step and in the order specified.

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It is to be understood that the preferred method of the invention involves performing the above detailed individual preferred steps, these steps being performed in the order just indicated.

It has been found that solar cells made from EGG-grown tires according to the above process show an increase in average efficiency of 10 to 20%. In addition, it has been found that for this material, the hydrogen passivation step narrows the distribution of cell yields in a pronounced manner.

The above described process has a number of other advantages.

First, by using the modified surface layer of the substrate formed during the hydrogen passivation, the method makes a mask for subsequent plating by an immersion plating method, for example, a nickel plating as described above, a passivation of a free-standing substrate before such later metallization is possible. This allows passivation of a clean substrate (rather than a passivation through a plating mask layer), avoids "soft" or shorted cells (which result from a base metal migration during passivation) and makes the steps between passivation and subsequent plating plating is economical as no further masking step is required. It should be noted that the hydrogen passivated surface also serves as a mask for preventing copper deposition by dip plating or electroplating. In addition, by passivating through a thin layer of the front electrode material, the substrate under the front electrodes can also be passivated, provided that the initial nickel layer has a thickness

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which is no more than about 750 A. It is also clear that the method of the invention includes passivation at a stage of cell manufacture, where subsequent treatment of the cell will not adversely affect the effect of passivation.

It is clear that a number of modifications to the method are possible within the scope of the invention. While in the preferred embodiment the nickel interstep takes place after passivation, it can also be performed just before passivation. In such a case, it is clear that in cells with shallow junction, short ion beam exposures with or without thermal control of the substrate by a suitable heat sink may be desirable to prevent migration of the nickel silicide to the junction 5 go. Such control also results in Ni ^ Si instead of the other silicides (NiSi or NiSi2), as a result of which less silicon per molecule of the silicide is present and a complete penetration of the N + region by the silicide is prevented. It is further understood that if the nickel sintering takes place before the passivation, a heating step towards the passivation may be necessary to drive the loosely bound hydrogen out of the nickel before further treatment takes place.

It is also clear that the heating of the cell during passivation can be used to perform at least part of the nickel interstep.

Although the preferred method of the invention uses the modified layer formed by the hydrogen passivation to mask subsequent dip nickel plating except on previously plated nickel, the method can also be performed with metals other than nickel.

For example, it is clear that the initial layer of the front face electrodes can be deposited in a shallow junction silicon device by plating one of a number of low reactivity materials which are capable of (preferably at low temperature) to form an ohmic contact and which serve as a barrier to the diffusion of copper or other base metal which is deposited at a later stage. Suitable metals to be used with copper include palladium, platinum, cobalt and rhodium as well as nickel. Although all of these materials form silicides, a silicide layer is not essential. However, it is important that the initial metal layer adheres properly, serves as an ohmic contact and serves as a barrier to the migration of a later deposited metal while not strongly migrating to the junction itself.

It is clear that the method according to the invention is not limited to the production of solar cells from EFG substrates.

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For example, cast polycrystalline line substrates, epitaxial silicon on metallurgical grade silicon or high quality polysilicon layers formed by chemical or physical precipitation from the vapor phase can be used to form relatively high efficiency solar cells according to the invention. Furthermore, the method applies to monocrystalline silicon. The process can furthermore be carried out with both N-type material and P-type material.

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Claims (12)

1. A method of manufacturing a solid state semiconductor device characterized in that a silicon substrate is provided with opposed first and second surfaces, selected regions of the first surface are exposed to a hydrogen ion beam of an intensity and for a period of time sufficient to form on the first surface a surface layer to which selected metals adhere only slightly, and the first surface excluding the selected regions is metallized with at least one of the selected metals . Method according to claim 1, characterized in that a junction is formed in the substrate at the first surface. 3. Method according to claim 1, characterized in that the device is a photo-voltage device and an anti-reflective coating is further applied to the first surface. Process according to claim 1, characterized in that the metallization is carried out using a metal selected from the group of metals, which comprises nickel, palladium, cobalt, platinum and rhodium. A method of manufacturing a solid state semiconductor device characterized in that a silicon substrate is provided with opposing first and second surfaces and a junction at the first surface and a plating mask, which select portions of the first surface, an aluminum coating is applied to the second surface, the silicon substrate is heated to a temperature and for a time sufficient to cause the aluminum of the aluminum coating to alloy with the silicon substrate, a nickel coating is applied to the selected portions of the first surface 30, the plating mask is removed, the first surface is exposed to a hydrogen ion beam of an intensity and for a period sufficient to form a surface layer on the first surface 8420336 «-14 - to which are selected conductive materials will adhere only slightly, the nickel coating is sintered so that the nickel and silicon react at the selected portions to form nickel silicide at their interface, and the nickel and aluminum coatings with at least one layer of at least one of the conductive metals are coated. A method according to claim 5, characterized in that the at least one layer is applied by contacting the nickel coating with an etchant to remove unbound nickel and coating the nickel coating with copper. Method according to claim 5, characterized in that an anti-reflective coating is applied to the first surface. 8. A method according to claim 5, characterized in that the exposure of the substrate by the hydrogen ion beam has a sufficient time and intensity to reduce the minority carrier losses of the substrate. 9. A method of manufacturing a solid state semiconductor device characterized in that a silicon substrate is provided having opposing first and second surfaces and a junction at the first surface, and a plating mask, which selects portions of the first surface is released, a nickel coating is applied to the selected portions of the first surface, the plating mask is removed, the first surface is exposed to a hydrogen ion beam of an intensity of 25 and for a period of time sufficient to form a surface layer on the first surface to which metals will adhere only slightly, the nickel coating is sintered so that the nickel and the silicon react at the selected portions to form nickel silicide at their interface, and the nickel coating becomes at least one further conductive metal layer lined. Method according to claim 9, characterized in that the at least one additional conductive metal layer consists of a nickel layer which is formed by an immersion plating process. 35 8420338 r -15- Method according to claim 10, characterized in that the plating process uses a bath containing a nickel salt and fluoride ions. 12. A method according to claim 7, characterized in that said at least one additional conductive metal layer comprises a copper layer, which is formed by immersion plating or electroplating. 8420338