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NL2034511A - Adjustable Electrically Biased Suspended Graphene Field Effect Transistor - Google Patents

Adjustable Electrically Biased Suspended Graphene Field Effect Transistor Download PDF

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Publication number
NL2034511A
NL2034511A NL2034511A NL2034511A NL2034511A NL 2034511 A NL2034511 A NL 2034511A NL 2034511 A NL2034511 A NL 2034511A NL 2034511 A NL2034511 A NL 2034511A NL 2034511 A NL2034511 A NL 2034511A
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graphene
electrodes
substrate
effect transistor
channels
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NL2034511A
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Dutch (nl)
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NL2034511B1 (en
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Shan Dan
Chen Xuesheng
Shi Fanfeng
Wang Menglong
Yang Ruihong
Tang Mingjun
Sun Daoyuan
Cao Yunquing
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Yangzhou Polytechnic Inst
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D48/00—Individual devices not covered by groups H10D1/00 - H10D44/00
    • H10D48/01—Manufacture or treatment
    • H10D48/031—Manufacture or treatment of three-or-more electrode devices
    • H—ELECTRICITY
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/213—Channel regions of field-effect devices
    • H10D62/221—Channel regions of field-effect devices of FETs
    • H10D62/235—Channel regions of field-effect devices of FETs of IGFETs
    • H10D62/292—Non-planar channels of IGFETs
    • H—ELECTRICITY
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
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    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/8303—Diamond
    • H—ELECTRICITY
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/881—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being a two-dimensional material
    • H10D62/882—Graphene
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/687—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having cavities, e.g. porous gate dielectrics having gasses therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F30/00—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors
    • H10F30/20—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors
    • H10F30/21—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation
    • H10F30/28—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices being characterised by field-effect operation, e.g. junction field-effect phototransistors
    • H—ELECTRICITY
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    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F30/00—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors
    • H10F30/20—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors
    • H10F30/21—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation
    • H10F30/28—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices being characterised by field-effect operation, e.g. junction field-effect phototransistors
    • H10F30/282—Insulated-gate field-effect transistors [IGFET], e.g. MISFET [metal-insulator-semiconductor field-effect transistor] phototransistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/10—Semiconductor bodies
    • H10F77/12—Active materials
    • H10F77/122—Active materials comprising only Group IV materials
    • H—ELECTRICITY
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    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/10—Semiconductor bodies
    • H10F77/14—Shape of semiconductor bodies; Shapes, relative sizes or dispositions of semiconductor regions within semiconductor bodies
    • H10F77/147—Shapes of bodies
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    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/10—Semiconductor bodies
    • H10F77/16—Material structures, e.g. crystalline structures, film structures or crystal plane orientations
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • H—ELECTRICITY
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components

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Abstract

The present invention discloses an adjustable electrically biased suspended graphene field effect transistor in the field of communication technology, including gate electrodes, a SiOz substrate, single layers of graphene, source electrodes, and drain electrodes. Four gold electrodes are provided on a surface of the SiOz substrate in four angular directions, the four gold electrodes are used as source electrodes and drain electrodes of a pair of devices respectively, a pair of gate electrodes is also provided, a plurality of trapezoidal channels are formed at a middle part of the surface of the SiOz substrate, two single layers of graphene are provided, and one of the single layers of graphene is arranged on the surface of the SiOz substrate, forms suspended arc surface structures at wide channels, and is in ohmic connection with the gold electrodes on two sides, and the other single layer of graphene is arranged on the surface of the SiOz substrate, forms suspended arc surface structures at narrow channels, and is in ohmic connection with the gold electrodes on two sides. The present invention improves radiation efficiency, so that the field effect transistor may generate terahertz radiation signals, and radiation frequencies of the signals may be adjusted by adjusting channel widths.

Description

1 602141P-NL
Adjustable Electrically Biased Suspended Graphene Field Effect Transistor
TECHNICAL FIELD
[0001] The present invention relates to the field of information and communication technologies, and in particular, to a graphene field effect transistor.
BACKGROUND
[0002] Terahertz (THz) waves refer to electromagnetic waves with frequencies in a range of 0.1 THz to 10 THz, and have shown broad application prospects in fields such as terahertz imaging, terahertz radar, medical diagnosis, substance detection, and 6G wireless communication. In development of terahertz technology, lack of related functional devices applied in terahertz bands is one of main factors restricting further development of terahertz technology. Therefore, finding and developing high-performance materials and related devices working in terahertz bands is a problem that researchers in the field of terahertz technology are pursuing and urgently need to solve at present.
[0003] A graphene material is a new material that tightly stacks carbon atoms into a single- layer two-dimensional honeycomb lattice structure. Since the graphene material was first mechanically peeled off in 2004, the graphene material has been widely used due to its unique physical properties such as special energy band structure, wide spectral response range, extremely high carrier mobility, and adjustable Fermi energy levels. Due to special properties of high mobility and high thermal conductivity, graphene is extremely prone to generate hot electrons even under the action of a tiny bias electric field. Under the action of a direct-current bias electric field, graphene exhibits a thermal radiation form like blackbody radiation, and radiates energy to the outside. Currently, graphene and its devices have abundant research reports and broad application prospects in far-infrared, near-infrared, and visible light bands, but radiation phenomena of electrically biased graphene in terahertz bands with lower frequencies are rarely reported. The frequency and efficiency of radiation from the electrically biased graphene are affected by parameters such as spatial distribution, temperature, and concentration of hot electrons in graphene, and an electrical transport mechanism (scattering
2 602141P-NL mechanism) of carriers in the graphene and a coupling effect between electrons and optical phonons also affect a radiation mechanism. These complex factors lead to relatively low radiation efficiency of the graphene in terahertz bands, particularly in low-frequency terahertz bands.
SUMMARY
[0004] Aiming at the shortcomings in the prior art, the present invention provides an adjustable electrically biased suspended graphene field effect transistor, which solves problems of spatial distribution, uneven temperature and uneven concentration of hot electrons in graphene, and improves radiation efficiency, so that the field effect transistor may generate terahertz radiation signals under the action of a direct-current bias electric field, and radiation frequencies of the signals may be adjusted by adjusting channel widths.
[0005] The objective of the present invention is achieved as follows: An adjustable electrically biased suspended graphene field effect transistor includes gate electrodes, a SiO» substrate, single layers of graphene, source electrodes, and drain electrodes.
[0006] Four gold electrodes are provided on a surface of the SiO substrate in four angular directions, the four gold electrodes are used as source electrodes and drain electrodes of a pair of devices respectively, a pair of gate electrodes is also provided under the SiO: substrate, a plurality of trapezoidal channels are formed at a middle part of the surface of the S10» substrate, two single layers of graphene are provided, and one of the single layers of graphene is arranged on the surface of the SiO: substrate, forms suspended arc surface structures at wide channels, and is in ohmic connection with the gold electrodes on two sides; and the other single layer of graphene is arranged on the surface of the SiO: substrate, forms suspended arc surface structures at narrow channels, and is in ohmic connection with the gold electrodes on two sides.
[0007] As a further definition of the present invention, a single layer of graphene is further provided at a middle part of the trapezoidal channels, and a gate electrode, a source electrode, and a gate electrode are provided at corresponding positions.
[0008] As a further definition of the present invention, the channels formed below the single layer of graphene have a width of 100 + 5 nm and a depth of 200 nm.
3 602141P-NL
[0009] As a further definition of the present invention, the wide channels have a width of 150+ 5 nm and a depth of 200 nm.
[0010] As a further definition of the present invention, the narrow channels have a width of 50 + 5 nm and a depth of 200 nm.
[0011] As a further definition of the present invention, the gold electrodes are grown on a front side of the S10; substrate through a magnetron sputtering method, with a thickness of 100 + 10 nm.
[0012] As a further definition of the present invention, the single layer of graphene has a thickness of 5 + 1 nm.
[0013] In the present invention, the graphene is "suspended" on the substrate by etching the channels on the substrate, so that the graphene above the channels is in a suspended arc status;
[0014] First, the graphene is not in contact with the substrate, which may avoid transfer of energy radiated by the graphene to the substrate, thereby effectively improving the temperature of hot electrons in the graphene, solving an existing problem of uneven temperature distribution of hot electrons, improving radiation efficiency, and providing an efficiency foundation for radiating terahertz waves;
[0015] Second, because the plane of the graphene layer 1s in a suspended arc status, the surface of the graphene layer has different curvatures everywhere, which is conducive to localized distribution of hot electrons under the action of electrical bias, so as to form corresponding hot spots, solve an existing problem of uneven concentration distribution of hot electrons, further improve radiation efficiency, and further strengthen the efficiency foundation;
[0016] Third, due to the designed channel structure, the graphene layer may form an interference effect by using light radiated by the graphene and reflected light from the channels, thereby improving radiation efficiency; and
[0017] Fourth, due to the designed trapezoidal channel structure, the frequency of terahertz radiation from the graphene is controlled by adjusting different channel widths, and a suspended graphene prototype device with radiation in a range of 340 GHz to 1 THz is ultimately obtained.
[0018] Compared with the prior art, the present invention has the following beneficial effects:
[0019] The present invention provides a practical basis for electrically biased graphene
4 602141P-NL terahertz commercial devices by designing trapezoidal channels and directly detecting radiation of generated terahertz waves on graphene under the action of voltage bias; and the frequency is adjusted through the gradual change of the width of the trapezoidal structure, which provides a foundation for later application.
BRIEF DESCRIPTION OF DRAWINGS
[0020] In order to describe technical solutions in embodiments of the invention or the prior art more clearly, the following briefly introduces the accompanying drawings required for describing the embodiments or the prior art. Apparently, the accompanying drawings in the following description show only some embodiments of the present invention, and those of ordinary skilled in the art may still derive other drawings from these drawings without any creative efforts.
[0021] FIG. 1 is an overlooked structural schematic diagram of the present invention.
[0022] FIG. 2 is a cross-sectional view of the present invention at wide channels.
[0023] FIG. 3 is a cross-sectional view of the present invention at medium channels.
[0024] FIG. 4 is a cross-sectional view of the present invention at narrow channels.
[0025] FIG. 5 is a schematic diagram of a test platform for testing terahertz radiation in the present invention.
[0026] FIG. 6 is a schematic diagram of a test circuit for testing terahertz radiation in the present invention.
[0027] FIG. 7 shows a working characteristic curve of a 340 GHz terahertz detector.
[0028] FIG. 8 shows signal current in the 340 GHz terahertz detector.
[0029] FIG. 9 shows a working characteristic curve of a 600 GHz terahertz detector.
[0030] FIG. 10 shows signal current in the 600 GHz terahertz detector.
[0031] FIG. 11 shows a working characteristic curve of a 900 GHz terahertz detector.
[0032] FIG. 12 shows signal current in the 900 GHz terahertz detector.
[0033] In the figures: 1 - gate electrode, 2 - SiO: substrate, 3 - single layer of graphene, 4 - gold electrode, and 5 - channel.
602141P-NL
DETAILED DESCRIPTION OF THE EMBODIMENTS
[0034] The technical solutions in the embodiments of the present invention are described clearly and completely below with reference to the accompanying drawings in the embodiments of the present invention. Apparently, the described embodiments are only some 5 rather than all of the embodiments of the present invention. All other embodiments obtained by those of ordinary skilled in the art based on the embodiments of the present invention without any creative efforts shall fall within the protection scope of the present invention.
[0035] An adjustable electrically biased suspended graphene field effect transistor as shown in FIG. 1 includes gate electrodes, a SiO; substrate, single layers of graphene, source electrodes, and drain electrodes.
[0036] Six gold electrodes are provided on a surface of the S10, substrate in four angular directions, the gold electrodes are grown on a front side of the SiO; substrate through a magnetron sputtering method with a thickness of 100 + 10 nm, the six gold electrodes are used as source electrodes and drain electrodes of three devices respectively, three gate electrodes are also provided under the SiO: substrate at positions corresponding to the source electrodes and the drain electrodes, a plurality of trapezoidal channels are formed at a middle part of the surface of the S10; substrate, and three single layers of graphene are provided with a thickness of 5+ 1 nm.
[0037] As shown in FIG. 2, one of the single layers of graphene is arranged on the surface of the SiO: substrate, forms suspended arc surface structures at wide channels, and is in ohmic connection with the gold electrodes on two sides, and the wide channels have a width of 150 + 5 nm and a depth of 200 nm.
[0038] As shown in FIG. 3, another single layer of graphene is arranged on the surface of the
SiO: substrate, forms suspended arc surface structures at medium channels, and is in ohmic connection with the gold electrodes on two sides, and the medium channels have a width of 100 + 5 nm and a depth of 200 nm.
[0039] As shown in FIG. 4, the last single layer of graphene is arranged on the surface of the
S102 substrate, forms suspended arc surface structures at narrow channels, and is in ohmic connection with the gold electrodes on two sides, and the narrow channels have a width of 50
6 602141P-NL + 5 nm and a depth of 200 nm.
[0040] The foregoing field effect transistor is tested below. Three types of antenna coupled gallium nitride/aluminum gallium nitride (GaN/AlGaN) high-electron-mobility transistor chips are selected as detectors, corresponding to 340 GHz, 600 GHz, and 900 GHz, respectively.
Turn-on voltages (VT) of the chips at a low temperature of 4K are -3.48V, -3.18V, and -3.08V, respectively, and noise equivalent power is 3 pW/VHz at room temperature and decreases to below 1pW/VHz at 77K. Combined with a Fourier transform spectrometer, an effective detection range of terahertz bands by the chips may be extended to 0.1 THz-2 THz.
[0041] A test platform shown in FIG. 5 1s used. A field effect transistor sample and a terahertz detector are placed face to face on a test support, and may be mechanically adjusted at a distance between 0.5 cm and 3 cm. The test support is electrically connected to a relevant test device through a low-temperature tube and placed in an Oxford low-temperature test system for variable temperature testing, and may be adjusted at a temperature range of 300 K to 10 K.
[0042] A test circuit shown in FIG. 6 is used. When a terahertz detector is given with a working voltage (gate electrode voltage), if terahertz radiation at a corresponding frequency is generated from graphene and gathered at the terahertz detector through a silicon lens, additional light induced current is formed between the source electrode and drain electrode of the terahertz detector, and the frequency and intensity of the terahertz radiation may be obtained through the relationship between the magnitude of the light induced current and the gate electrode voltage.
A source meter device of the external test platform includes a yokogawa voltage source meter for applying and scanning the gate electrode voltage of the terahertz detector, a current voltage conversion amplifier for outputting current signals, a keysight voltmeter for testing voltage signals, and a lock-in amplifier for alternating current signal testing. Alternating current output of the lock-in amplifier acts on the gate electrode of the terahertz device through a direct current-alternating current adder, to detect a first derivative of output signals, so as to improve accuracy of the signals. In addition, the lock-in amplifier used in the test platform is by far the best device with a signal extraction ability, a dynamic reserve up to 100 dB, and abilities of multi-channel signal collection and multi-step signal processing.
[0043] FIG. 7 shows a working characteristic curve of a 340 GHz terahertz detector, and FIG. 8 shows signal current in the detector partially affected by different bias current for a field
7 002141P-NL effect transistor with a channel width of 50 nm and a channel depth of 200 nm, indicating that terahertz signals radiated near 340 GHz are stronger as the bias current in graphene is stronger.
[0044] FIG. 9 shows a working characteristic curve of a 600 GHz terahertz detector, and FIG. 10 shows signal current in the detector partially affected by different bias current for a field effect transistor with a channel width of 100 nm and a channel depth of 200 nm, indicating that terahertz signals radiated near 600 GHz are stronger as the bias current in graphene is stronger, the frequency of terahertz radiation from the graphene may be effectively adjusted with the change of the graphene channel width, and the frequency of terahertz radiation shifts to high frequency bands as the channels widen.
[0045] FIG. 11 shows a working characteristic curve of a 900 GHz terahertz detector, and
FIG. 12 shows signal current in the detector partially affected by different bias current for a field effect transistor with a channel width of 150 nm and a channel depth of 200 nm, indicating that terahertz signals radiated near 900 GHz are stronger as the bias current in graphene is stronger, the frequency of terahertz radiation from the graphene may be effectively adjusted with the change of the graphene channel width, and the frequency of terahertz radiation shifts to high frequency bands as the channels widen.
[0046] The descriptions of the above embodiments are merely used for helping understand the method of the present invention and the core idea thereof. It should be noted that those of ordinary skilled in the art may further make improvements and modifications to the present invention without departing from the principle of the present invention, and these improvements and modifications shall fall within the protection scope of the claims of the present invention.

Claims (7)

8 602141P-NL CONCLUSIES8 602141P-EN CONCLUSIONS 1. Een instelbare elektrisch voorgespannen grafeen-veldeffecttransistor, bestaande uit poortelektroden, een S102-substraat, enkele lagen grafeen, bronelektroden en afvoerelektroden, waarin vier gouden elektroden zijn aangebracht op een oppervlak van het SiO;-substraat in vier hoekige richtingen, de vier gouden elektroden worden respectievelijk gebruikt als bronelektroden en afvoerelektroden van een paar apparaten, een paar poortelektroden is ook aangebracht onder het SiO;-substraat op posities die overeenkomen met de bronelektroden en de afvoerelektroden, een aantal trapeziumvormige kanalen wordt gevormd op een middengedeelte van het oppervlak van het S10>-substraat, twee enkele lagen grafeen worden verstrekt, en één van de enkele lagen grafeen wordt geschikt op het oppervlak van het SiO»- substraat, vormt opgeschorte boogoppervlaktestructuren bij brede kanalen, en is in ohmse verbinding met de gouden elektroden aan twee kanten; en de andere enige laag van grafeen wordt geschikt op de oppervlakte van het SiO: substraat, vormt opgeschorte boogoppervlaktestructuren bij smalle kanalen, en is in ohmse verbinding met de gouden elektroden aan twee kanten.1. An adjustable electrically biased graphene field-effect transistor, consisting of gate electrodes, an S102 substrate, graphene single layers, source electrodes, and drain electrodes, in which four gold electrodes are deposited on a surface of the SiO2 substrate in four angular directions, the four gold electrodes are respectively used as source electrodes and drain electrodes of a pair of devices, a pair of gate electrodes is also provided under the SiO2 substrate at positions corresponding to the source electrodes and the drain electrodes, a number of trapezoidal channels are formed on a center portion of the S10+ substrate, two single layers of graphene are drawn, and one of the single layers of graphene is arranged on the surface of the SiO+ substrate, forms suspended arc surface structures at wide channels, and is in ohmic connection with the gold electrodes on two sides ; and the other single layer of graphene is arranged on the surface of the SiO: substrate, forms suspended arc surface structures at narrow channels, and is in ohmic connection to the gold electrodes on two sides. 2. De instelbare elektrisch voorgespannen grafeen-veldeffecttransistor volgens eis 1, waarin een enkele laag grafeen verder wordt verstrekt op een middendeel van de trapeziumvormige kanalen, en een poortelektrode, een bronelektrode en een poortelektrode op overeenkomstige posities worden verstrekt.2. The adjustable electrically biased graphene field-effect transistor according to claim 1, wherein a single layer of graphene is further stretched on a center portion of the trapezoidal channels, and a gate electrode, a source electrode and a gate electrode are stretched at corresponding positions. 3. De instelbare elektrisch voorgespannen grafeen-veldeffecttransistor volgens eis 2, waarin de onder de enkele laag grafeen gevormde kanalen een breedte van 100 + 5 nm en een diepte van 200 nm hebben.3. The tunable electrically biased graphene field effect transistor according to claim 2, wherein the channels formed under the single layer of graphene have a width of 100 + 5 nm and a depth of 200 nm. 4. De instelbare elektrisch voorgespannen grafeen-veldeffecttransistor volgens een van de beweringen 1-3, waarin de brede kanalen een breedte hebben van 150 + 5 nm en een diepte van 200 nm.4. The tunable electrically biased graphene field-effect transistor according to any one of claims 1-3, wherein the wide channels have a width of 150 + 5 nm and a depth of 200 nm. 5. De instelbare elektrisch voorgespannen grafeen-veldeffecttransistor volgens een van de beweringen 1-3, waarin de smalle kanalen een breedte hebben van 50 + 5 nm en een diepte van 200 nm.5. The tunable electrically biased graphene field effect transistor according to any one of claims 1-3, wherein the narrow channels have a width of 50 + 5 nm and a depth of 200 nm. 9 602141P-NL9 602141P-EN 6. De instelbare elektrisch voorgespannen grafeen-veldeffecttransistor volgens een van de beweringen 1-3, waarin de gouden elektroden zijn gegroeid op een voorzijde van het Si0:- substraat door middel van een magnetronsputtermethode, met een dikte van 100 + 10 nm.6. The tunable electrically biased graphene field-effect transistor according to any one of claims 1-3, wherein the gold electrodes are grown on a front side of the SiO: substrate by a magnetron sputtering method, with a thickness of 100 + 10 nm. 7. De instelbare elektrisch voorgespannen grafeen-veldeffecttransistor volgens een van de beweringen 1-3, waarin de enkele laag grafeen een dikte heeft van 5 + I nm.7. The tunable electrically biased graphene field effect transistor according to any one of claims 1-3, wherein the single layer of graphene has a thickness of 5 + 1 nm.
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