MXPA98000729A - Solid state switch of energy theft to supply operating energy to an electronic control device - Google Patents

Abstract

The present invention relates to a circuit for the theft of energy that provides operating energy for an environmental control such as a thermostatic control while controlling the current in a power supply to a load, in response to the cycle output of the environmental control. A pair of FET power transistors are connected to the series power terminals, and the gates are controlled by logic and phase timers. The FETs are turned off at the end of the phase, while a small amount of energy is sufficient to operate the control and circuitry, diverted to an energy storage circuit, then the FETs are re-ignited without a substantial interruption of the load . A preferred embodiment uses a bidirectional charge pump to transfer energy between the high and low voltage energy storage circuits. The circuit can work with direct current loads, alternating either symmetric or non-symmetric

Description

SOLID STATE SWITCH OF ENERGY THEFT TO SUPPLY OPERATING ENERGY TO AN ELECTRONIC CONTROL DEVICE. DESCRIPTION OF THE INVENTION: The present invention relates to a solid state switching device for theft of energy to control the supply of alternating electric current to a load, and more particularly to a method and apparatus for diverting the alternating current supplied, the energy required? "for the switching device. An environmental control system uses various mechanical equipment such as heating, cooling, ventilation and air conditioning units. Typically, the environmental control system uses a bimetallic thermostat to activate and deactivate the different equipment. The conventional bimetallic thermostat directly switches the alternating current that supplies power to the equipment. Since the bimetallic thermostat is a mechanical device, it does not require any external operational power to switch the alternating current. With advances in embedded semiconductor and microprocessor components it has become increasingly common to replace the bimetallic thermostat with an advanced electronic thermostat that provides longer life, quieter operation, and greater flexibility, by replacing a mechanical thermostat with an electronic device, additional power must be supplied to the circuit. Typically the additional power is provided by an external transformer and an additional power supply line from the transformer to the electronic thermostat. Alternatively, the electronic thermostat must be equipped with an internal battery. There are several disadvantages in providing power to the thermostat from an external transformer. For example, additional components increase the cost of replacing a mechanical thermostat with an electronic thermostat. In addition, carrying the driver for the transformer to the electronic thermostat can be difficult and expensive. There are also disadvantages to using a battery to provide power. The main one is the need to continually check and replace the battery. If the battery is not replaced conveniently and can not provide enough power, the electronic thermostat may "fail during a period of extreme environmental conditions." It would be desirable to provide electronic switching control to operate an electronic thermostat circuitry, which would be taken or "stolen". "of the alternating current supply that is being controlled, so that an additional wiring or battery is not needed for the electronic thermostat, although it has been shown that FET can be connected in opposition to the common sources for switching an alternating current, a scheme The general optimum for providing the gate control voltages of the energy derived from the two load control wires for both the off and on state has not been done.Typically the two gates of the opposite transistors have been connected for a control On-off without the ability to "steal" some of the power of the c alternating current for the electronic control circuitry. According to a feature of the invention, an energy robber circuit is provided to control the current in a power supply line to a load in response to the cycle output of an environmental control, for example, a temperature control, and provide the operational energy for control. First and second transistors are connected together and to a pair of terminals for connection in series to the load. A switching logic arrangement is connected to control the switching of the first and second transistors at low impedance to states where current is allowed to flow at high load and impedance states where the current is basically blocked from the load, at response to the cycle output of environmental control. The switch logic also operates to independently control the switching of the first and second power transistors during the states to steal power. An energy storage circuit to provide energy for environmental control and connected to a current diverted from the load when a power transistor is in its off state. A load control, which for example can be a voltage sensor, is coupled to the energy storage circuit and functions to signal the switching logic when the voltage in the storage circuit reaches a predetermined level. The switching logic includes a temporal control operation at intervals in which the power transistor is out to temporarily divert current to the energy storage circuit: the switching logic also functions to switch the transistor back when the voltage sensor indicates that a predetermined level has been reached. In accordance with another feature of the invention, a low voltage supply is provided to supply operational voltage to the ambient control, and a high voltage supply is used to give operating voltage high enough to control the gates of the power transistors. A first deflection path functions to send power to the high voltage supply when the load is put out of cycle, and another deflection path works in conjunction with the switching logic to send power or power to the low voltage supply when the load is Cycle, by momentarily stopping the transistors outside until enough power has been diverted to supply the low voltage energies. Preferably a bidirectional charge pump is connected to transfer power to an appropriate converted voltage from the high voltage supply to the low voltage supply during the off-load cycle and from the low voltage supply to the high voltage during the cycle. These and other advantages of the invention will become apparent from the following description of the preferred embodiments. DESCRIPTION OF THE DRAWINGS Figure 1 illustrates an environmental control system that a one-circuit mode for stealing energy from the power supplied to an electronic thermostat, Figure 2 is a functional diagram of a mode of an energy robber circuit.; Figure 3 is a functional diagram of a dual timer mode wherein the load current is a full wave, in a symmetric alternating current; Figure 4 illustrates the operation of a dual-timer mode where the load current in a non-symmetric full-wave alternating current, Figure 5 illustrates the operation of the dual-timer mode where the current is a half-wave rectified current; Figure 6 illustrates the operation of the dual timer mode when the load current is direct current; Figure 7 illustrates the operation of a dual timer mode when the load current changes from the full wave to the rectified half wave; Figure 8 illustrates the operation of a dual timer when the load current changes from half-wave rectified to full wave; Figure 9 is a functional diagram of a single timer of the energy theft circuit; Figure 10 illustrates the operation of the single-timer mode when the charging current is a full, symmetrical alternating-current wave; and Figure 11 is a functional diagram of an alternative embodiment of the energy robber circuit comprising dual timers. The present invention is a method and apparatus for controlling the power supply to a load by means of a solid-state switching circuit that incorporates circuitry to draw power from the controlled current in a manner that is self-synchronized with the alternative of the current. During periods in which the load is energized, the circuit enters a state of high impedance for a brief period of stealing energy. The diverted current is used to charge a storage device that supplies power to the circuit. One of the components of the solid state switch that is most adaptable for AC applications is a field effect transistor (FETS). This component requires very little energy to perform its control function. Although individual FETS are obtainable that can commute the alternating current, they have typically been costly or have a marginal capacity to provide reasonably high blocking voltages in the out and low impedance state when switched on. The few disadvantages of FETS can be overcome by using two unidirectional low cost power FETS connected in a back-to-back series configuration. In this way good blocking capacity is provided for the two polarities of alternating current supplied, one that provides blocking during the half cycles of one polarity and the other that provides blocking during the other half cycles of the opposite polarity. When the switching device is in a high impedance state off or off and the power has been removed from the charging equipment, there is a large voltage across the device and it is possible to steal some operational energy. Furthermore, in an out state, any stolen energy will not affect the performance or quality of the charging equipment since a negligible energy is dissipated in the control circuitry. However during periods in which the device has a low impedance in the on state, no voltage is available through the device and stealing operational energy is much more difficult. During this period, the charging device is energized and modifying the supplied power may affect the charging device. In the present invention, during the on state the switching device is placed in its high impedance state for short intervals in which the load must receive energy. During those short intervals, the energy is diverted to the low-voltage storage capacitor, so that the power loss to the load is low, due solely to its low-voltage reduction. When the energy is supplied in the form of alternating current, it is preferable to synchronize the short intervals of energy deviation with the shape of the alternating current wave. The synchronization can be done by means of circuitry including a zero cross detector. However, zero crossing detectors typically require sensory analog components that add expense to the control circuit, and require space that may not be available. The applicant has designed a method and apparatus to perform the theft of power or power from conductors that conduct alternating current, both when a switching device between the conductors is in a driving state and when it is not. Current theft according to the applicant's method requires a minimum of circuitry and is inexpensive to implement. In the following description, reference is made to the accompanying drawings that illustrate specific embodiments of the invention. There are sufficient details for the technicians to understand and use the invention, by which it is understood that other modalities can be used by making changes, electrical, mechanical and logical without leaving the field of the present invention. Figure 1 illustrates an implementation of an environmental control system 45 that is based on stealing energy and a load switching circuit 50 for supplying operational power. The power-stealing part of the circuit 50 receives power from the supply line 60 through terminals Ll and L2, which are connected in series. The temperature control unit 70 monitors the temperature of the controlled environment and controls the charge switching by cycling the output 80 in order to maintain the air at a desired temperature. Based on the output of cycle 80, the power theft and the load switching circuit 50 controls the charging device 90 by switching the current in the supply line 60. For typical thermostat circuits, the voltage across the line 60 is 24 V, with a frequency of 50 to 60 Hz. Cycling the output 80 indicates the charging device 90 which is energized, the circuit 50 enters an on state and allows the current to flow to the load 50. If the load 50 has to be de-energized, the circuit 50 enters an off or outside state and prevents current from flowing to the load 90. In one embodiment, the charging device 90 is a heater. In another embodiment, the charging device 90 is any environmental control device such as an energy recovery device, a fan, or a cooling device. Figure 2 illustrates a power theft mode and load switching circuit 50. The circuit 50 comprises two unidirectional field effect power transistors Q1 and Q2. in one embodiment the transistors are N-field field effect power transistors. The source of the transistor Ql is connected to the source of the transistor Q2 forming a back-back series. In addition, the sources of transistors Ql and Q2 are connected to a common circuit. The outputs of transistors Ql and Q2 are connected to load terminals Ll and L2, respectively. In one embodiment, transistors Ql and Q2 have channel resistances of approximately 50 million ohms.

In such transistors Ql and Q2 in series they produce .1 ohm resistance when the draw power circuit 50 is in the on state. If the current in the supply line is 1 amp, the resistance of .1 ohm results in a dissipation of only .1 watt, the heat dissipation of this is so low that it does not affect the thermostat's ability to control the temperature exactly of the environment Such a feature is important in order to facilitate the construction of a compact thermostat. In addition, the lower the energy dissipated by transistors Q1 and Q2, the higher the load current will be, that the control can switch at its two terminals without affecting the load control operation. The transistors Q1 and Q2 are separately controlled by low voltage, solid state circuitry, logic switch 106 as a function of signals applied to their inputs. The two outputs of the logic 196 feed the drivers 160 for changing the voltage level. As illustrated in Figure 2, the impellers 160 have four outputs 110, 112, 114 and 116 which are voltage level shifts of the four inputs 109, 111, 113 and 115. The drivers 160 shift the voltage present at their inputs to a higher voltage level at the input 117 which is a level of adequate voltage to activate transistors Ql and Q2 at a low impedance in the on state. The logic switch 106 separately controls the transistors Q1 and Q2 based on the inputs received from the positive phase timer 102, the negative phase timer 104 and the low voltage regulating sensor 194. As will be explained in detail, the positive phase timer 102 is used to determine when the energy theft circuit 50 will draw power during the positive phase of the current in the supply line 60 of Figure 1. Similarly, the negative phase timer 104 determines when the energy robber circuit 50 will draw power during the negative phase of the current on line 60. the use of two timers allows an efficient theft independent of the waveform of the load current in the power line 60, assuming that it is of a period of 50 or 60 Hz . or direct current. In another embodiment, described below, a single timer can be used when the load current of line 60 is symmetric, alternating current. A problem that can arise when stealing energy from a charging device 90 which is a relay or a conductor is that the activation can cause a small migration of metal between the contacts of the relay if the switching always occurs in the same phase of the alternating current . In one embodiment, the energy theft circuit 50 includes the logic phase 185 in order to reduce metal migration in the contacts of the charging device 90. As illustrated in FIG. 2, the outputs of the phase timers 102 and 104 are provided for the logic phase 185. the output of the logic phase 185 is provided with the logic switch 106. When the temperature control 70 activates the output of the cycle 80, indicating that the charging device 90 must be activated, the logic phase 185 ensures the activation of the load device 90 for successive alternating firing cycles in the positive and negative phases of the load current present in line 60. In this way the migration of metal is basically canceled giving a better contact life . As illustrated in Figure 2, the energy theft circuit 50 has a low voltage output that is generated from the stolen energy to line 60. The low voltage is maintained in a low voltage capacitor C2. In one embodiment, the lower voltage is 3 volts. One reason to generate a level of 3 volts is that that amount is used to operate conventional digital logic. For example, the 3 volt output is suitable for powering the temperature control 70 typically comprising a solid state sensor such as a variable temperature resistor. Transistors Ql and Q2 require a high gate voltage, greater than 3 volts in order to provide a low channel resistance as long as the theft circuit 50 is in the on state. Therefore, in one embodiment, as illustrated in FIG. 2, the energy theft circuit 50 provides a low voltage output for operating the digital logic components and a 9 volt output for the gates of the transistors Ql and Q2. In another embodiment, the circuit 50 can supply a range of voltages without departing from the present invention. The charge pump 166 is a bidirectional device that helps provide both low voltage and high voltage output. In one embodiment, the charge pump 166 is of the type described in the copending United States patent application "Bidirectional DC / DC voltage converter" by Arlon D. Kompelien, filed on the same date, which is incorporated herein by reference . When the circuit 50 is in the on state, some energy is passed to the low voltage capacitor C2 and the charge pump 166 raises the low voltage and drives the high voltage output. When the circuit 50 is in the off state, the current is fed to the high voltage capacitor Cl and the charge pump drives the low voltage output. By providing the high voltage required for the gates of the transistors Ql and Q2 in the on state, the charge pump 166 minimizes the leakage of current through the charging device 90 being controlled to the off state by elevating in steps by a factor of three on the low voltage side. The bistable switch 168 comprises two double poles, double solid state switches or switches (shown as mechanical switches for illustrative purposes). As described in detail below, the bistable switch 168 takes the state shown in Figure 2 when sufficient voltage is present. provided by the capacitor Cl. When the voltage on the capacitor C2 is sufficient to start the oscillator 32 KHz 172, the switch 168 places its switches in the opposite conducting states as shown in figure 2. Other functions can be added to the theft circuit 50. In one embodiment, an additional logic unit such as a sleep mode detector 180 and an abnormal sensor 182 can detect when there is excessive current flow in Ql and Q2 of circuit 50. The sleep mode detector 180 receives the outputs of the phase timers 102 and 104. If the sleep detector 180 detects that neither the 102 and 104 phase timers have been or inactive for a predetermined period, such as half a second, there should be no power available from the power supply line 60. The sleep or sleep detector 180 activates the capacitor C3 or possibly an available battery (not shown) that supplies power during an extended period of time Capacitor C3 is any suitable capacitor and has a capacitance of 1.0 farad. In addition, the sleep detector 180 provides an output to the temperature control 70 such that if energy loss is detected, the temperature control 70 stops the cycle and minimizes its energy expenditure.

As illustrated in Figure 2, the current theft circuit 50 may include an abnormal sensor 182. This senses an overload current in the transistors Q1 and Q2 and has an output signaling the logic 106 when a current overload is sensed. Logic 106 immediately turns off transistors Q1 and Q2 and may occasionally re-enter by turning on transistors Q1 and Q2. In this way, the abnormal sensor 182 protects the transistors Q1 and Q2 when the charging device 90 has malfunctioned and may be short-circuited. When the current or power theft circuit 50 first receives power from the line 60, the transistors Q1 and Q2 are non-conducting because the bistable switch 168 prevents the drivers from providing the required high gate voltage. Since both transistors Ql and Q2 are not conducting, the current will flow through the diode DI or the diode D2 when a voltage is initially supplied by the supply line 60. If the current flows through the diode DI or D2 it depends on the voltage polarity. Assuming current flows through the diode DI, this will flow through diode D3 through the R-off resistor, the high-voltage series regulator 165, the high-voltage storage capacitor Cl, the common circuit and back through the diode of transistor Q2. Similarly, if the current flows through diode D2, it will flow through diode D3, resistor R-off, high-voltage series regulator 165, high-voltage storage capacitor Cl, the common circuit and back through the transistor diode body Ql. The initial current causes the high voltage storage capacitor Cl to start charging. When charging capacitor Cl, its voltage is supplied to bi-stable switch 168. The voltage is also supplied to a divider formed by resistors Rl and R2 connected in series. Before sufficient voltage is present in the low-voltage I output, the bi-stable switch 168 has its switches as shown in Figure 2, and the voltage present at the dividing point of Rl and R2 is fed to the gate of the switch. transistor Q3. This is any suitable FET and can be similar to transistors Ql and Q2. When capacitor Cl continues to charge, a voltage is applied to the gate of transistor Q3. When the voltage present in the gate of Q3 is sufficient, transistor Q3 starts to drive and starts acting as a source follower. The activation of transistor Q3 allows a portion of the small current flowing through the Di or D2 diodes to flow through Q3, the Schottky diode and the low voltage C2 capacitor until enough voltage is present to operate the sections Low-voltage 50-wire robber circuit.

When the low voltage capacitor C2 has charged enough, providing the voltage output, starts the timer oscillator. in one embodiment, the timer oscillator comprises a 32 KHz oscillator 172 feeding a ripple counter 175 having a low frequency output and a high frequency input. Figure 2 illustrates an embodiment of the timer oscillator 170 in which the low frequency output is 1 KHz and the high frequency output is 32kHz. When the timer oscillator 170 is activated, its low frequency output trips to the bistable switch 168 causing its bi-stable condition to change and commute its double pole, double push switches. in this configuration, the voltage present in the high voltage capacitor Cl is fed to the drivers 160 allowing the drivers 160 to act and couple the gate of the transistor Q3 to the logic phase switching signal 185. The low frequency output of the oscillator 170 enables the load pump 190. The start-up of the energy robber circuit 50, is basically complete when the low voltage capacitor C2 has reached sufficient voltage to cause the bi-stable switch 168 to change state. In this configuration, transistor Q3 operates as a switch rather than a source follower. As such the energy robber circuit is in the on state, transistor Q3 is in the active state and provides a closed link for the load current flow as described above. When the energy robber circuit 50 enters the on state, the outputs 110 and 112 of the impellers 160 are applied to the gates of the transistors Ql and Q2, respectively, so that the current channels of the transistors Ql and Q2 are capable to drive in any direction. In this case, the gates of the transistors Ql and Q2 are * controlled independently by the logic switch 106. When the temperature control 70 deactivates the cycle output 80, the energy draw circuit 50 is in the off state and the transistors Ql, Q2 and Q3 are inactive. The transistors Ql and Q2 block the voltage on the supply line 60 for all phases of the voltage. One transistor provides voltage blocking during one polarity of the voltage in the power supply line 60 and the other transistor provides voltage blocking for the opposite polarity. After starting, the voltage divider formed by the resistors R1 and R2 is essentially disconnected from the common circuit by the configuration of the bi-stable switch 168 and is effectively skipped. In this way, Rl and R2 do not consume any energy after the start. Once the robber circuit 50 is running, it can draw adequate energy from a full wave alternating charge current, a direct charge current, or a rectified half-wave charge current. The logic switch 106 detects when the timers 102 and 104 are inactive simultaneously and when the phase timers 102 and 104 are simultaneously active. As will be explained in detail, a rectified half-wave or direct current is sensed when both phase timers 102 and 104 expire at the same time. It will also be explained, that for a symmetrical and non-symmetric full wave load current will be sensed when the phase timers 102 and 104 are concurrently active. In this way the logic switching 106 detects when the load current is full wave, compared to direct current or rectified half wave, and control transistors Q1 and Q2 correspondingly. Operation for symmetric and non-symmetric full wave, Alternating load current. Figure 3 illustrates the operation of a dual timer mode when the load current is a full-wave symmetric alternating current. In order to change the low voltage capacitor C2 to a low voltage as long as the energy robber circuit 50 is turned on and without a current transformer, Q1 and Q2 must be turned off or off for short periods of time.

During those short periods of time, the charging current is channeled to charge the Cl, causing a small voltage drop across Ll and L2. C2 is charged through the charge pump 166 in the on state. In order to minimize the transient effects of the charging current, it is desirable to provide those periods of charge at points where the load currents are minimal. Therefore, since the power supply line is feeding alternating current, it will be desirable to synchronize the energy theft when there are zeros in the alternating current. After the start or start-up described above, the two transistors Q1 and Q2 are active and the two phase timers 102 and 104 are operating, as illustrated in Figure 3, just before the zero crossing, the phase timer. negative 104 expires causing logic switching 106 to turn off transistor Q2 so that the charging current is forced to flow through the diode body of Q2. This causes a small voltage loss of approximately .7 volts until the voltage reaches zero crossing. This slight increase in power loss has negligible effects since it happens when the load current approaches zero. This leads to even minimal energy losses at current change and establishes fewer requirements on the switching speeds of transistors Q1 and Q2.

After the charging current changes direction and flows to terminal L2, the low voltage capacitor C2 is forced, since there is no conductive path through transistors Q1 and Q2. This current flows to terminal L2, through diode D2, transistor Q3, the Schottky diode, the low voltage capacitor C2, the common circuit, transistor Q1, which is active and exits through terminal Ll. The deviation of the load current to recharge the low voltage capacitor C2 causes the voltage across the terminals L2 and LI to jump to a value! slightly higher than the low voltage output. This voltage is fed back to the negative phase timer 104 and sets the padlock 105 of the negative phase timer 104. This lock establishment 105 resets the negative phase timer 104. In this way the negative phase timer is reset near the zero crossing in the negative direction and will expire just before the next zero crossing in the negative direction. After the zero crossing, when some charge current is filling the low voltage capacitor C2, the voltage at the anode of the Schottky diode is increasing slightly in value. This voltage is slightly above the low voltage output to allow the Schottky diode to fall. When the low voltage sensor 194 senses a sufficient voltage at the anode of the Schottky diode, it activates its output causing the logic switch 106 to re-energize the transistor Q2. This allows the charging current to flow directly through the transistors Q1 and Q2 without deviating through the charging robber circuit 50 and with a minimum voltage loss. Similarly, just before the zero crossing in the positive direction, the positive phase timer 102 expires causing the logic switching 106 to turn off or set off the transistors Ql, so that the current load is forced to flow through the body of the transistor. diode of the Ql. After the load current changes direction and flows to the terminal Ll, it is forced to charge the low voltage capacitor C2. Since there is no direct conductive path through the transistors Q1 and Q2. This current flows to the terminal Ll, for the diode DI, the transistor Q3, the Schottky diode, to the low voltage capacitor C2, through the common circuit, for the transistor Q2, which is active, and exits through terminal L2. The inversion of the charging current sets the padlock 103 and resets the positive phase timer 102 and expires together before the next zero crossing in the positive direction. Again , when the low voltage sensor 194 senses a sufficient voltage at the anode of the Schottky diode, it activates its output causing the logic switching 106 to return to the transistor Ql and the charging current to flow directly through the transistors Q1 and Q2, without being deflected through the current robber circuit 50. Therefore, the negative phase timer 104 predicts the zero crossings when the load current is decreasing and the positive phase timer 102 predicts the zero cross when the current is increasing. In one embodiment, the time used for phase timer 102 and 104 is set and is equal to the period of the alternating current voltage supplied. In another embodiment, phase timers 102 and 104 can be adjusted for different load voltage frequencies. supplied. As illustrated in Figure 4, for a non-symmetric, full-wave charge current, the time from zero crossing in a negative direction to that going in positive direction may be different from a zero crossing in a positive direction to that going in a negative direction. This is the reason for dual timers, however, for the symmetric load current where a single operation timer of the circuit 50 could be used, is identical to what was described. Operation for Semi Onda and Direct Rectified Load Currents. With a semi-wave or direct current, logic switching 106 controls transistors Q1 and Q2, differently than for a full-wave alternating current.

In a full wave current, both transistors Ql, Q2, are active in order to minimize the dissipation of energy. When the timer 102 expires, both transistors Ql, Q2 are turned off to draw power from the supply line 60. FIG. 5 illustrates the operation of the energy robber circuit 50 for a half-wave rectified current. The positive phase timer 102 expires just before the positive phase of the half wave current and the transistors Q1, Q2 turn off, when the current flows again, it is forced to charge the low voltage capacitor C2. When the voltages of the charging current rise, the positive phase timer 102, is reset due to the voltage supplied from the terminal Ll, to the padlock 103, and will expire before the next positive oscillation of the rectified current. Once the low voltage sensor 194 detects a sufficiently low voltage in the capacitor C2, the two transistors Q1, Q2 are turned on to repeat the cycle. As illustrated in Fig. 6, for the direct charge current, there is no point where the current drops to zero. When with the half-wave rectified current, the positive phase timer 102 expires, and the two transistors Q1, Q2 turn off, the voltage across the terminals Ll, L2, rapidly increases by setting the padlock 103, and initiating the timer positive phase 102. Transistors Ql, Q2, turn on when sensor 194 senses sufficient voltage in the SCHOTTKY diode. The direct charge current forcing the low voltage capacitor to charge after each expiration of the positive phase timer 102. The technician will recognize that for any type of load current, the current robber circuit 50 can be connected in any polarity, the only effect in circuit 50, which timer 102, 104, is transistors Q1, Q2 cycling. Operation with a Changing Load Current. When controlling a charging device, it is possible for the load current to change wave form, a first reason why the two transistors Q1 and Q2, turn off for direct and semi-wave currents, is to detect such a change mode . If a transistor were left as for the full wave current, its low impedance would prevent detecting a supply spolarity by diverting the load current and preventing the low voltage pulse. Fig. 7 shows a change in charge current from a complete wave to a rectified half wave. Assuming, that the energy robber circuit 50 is operating as described during the full wave current. When the current is negative, but increases toward the zero crossing, the timer 102 expires as described for the full-wave current. At this point, the transistor Ql turns off. As illustrated in Fig. 2, at this point the charge current changes to a half-wave rectified current, because something changes within the load. The positive phase timer 102 is never reset by the padlock 103, even when the transistor Q1 is off because the voltage never continues in the positive direction. The voltage is blocked by the load. Next, in negative phase timer 104, it expires before the charge current enters the negative phase in the waveform, at this point, both timer 102, and 104, become inactive. As previously described, the logic switch 106 detects that the two timers 102, 104 are inactive and determines whether the load current is direct or rectified half-wave and then controls the transistors Q1, Q2, as described. The technician will recognize that the energy robber circuit 50 also detects a change in charge current from full wave to half wave having opposite polarity to the half wave current presented in FIG. 7. FIG. 8 shows a mode of change of rectified half wave to full wave. As described for the operation with a rectified half-wave load current, both transistors Ql, Q2, turn off simultaneously. As illustrated in Fig. 8, the two transistors are turned off before sensing the change from half wave to full wave current. This causes the current to charge the capacitor Cl, of low voltage and the positive phase timer 102, to turn on and turn on only the transistor Ql. When the load current reaches the zero crossing and continues negatively, the negative phase timer 104 is activated. At this point, the two timers 102, 104 are active. The logic switch 106 detects it and determines that the load current is a full-wave alternating current and therefore controls the transistors Ql, Q2, conveniently. Then, that the logical switch 106 detects that the current has changed to full-wave alternating, there may be some cycles before the positive phase timer 102, synchronizes correctly to the beginning of the positive half-cycle. The time period of the phase timers 102, 104 can be reduced to increase the synchronization rate by paying with more energy loss through the diode body of Ql and Q2. Modality of a single timer. In another embodiment, illustrated in FIG. 9, the energy robber circuit 250, comprises a single phase timer 202, and is brought to an optimum only for one way of stealing energy in a symmetric alternating charge current. Under non-symmetric load current conditions, the time between zero crossing is not constant, which would make a single timer unacceptable. Specifically, the time between the zero crossing when the load current rises and the zero crossing when the load current falls is different from the time between zero crossing, when the load current is falling and the zero crossing when the load current is rising. This is illustrated in Fig. 4, which has a non-symmetrical load current. When the load current is symmetric as illustrated in Fig. 10, the time between each zero crossing is the same. Therefore, the crossing by zero when the current rises can be predicted from the crossing by zero when the load current is falling, and vice versa. Due to this symmetry the detection of the crossing by zero can be done with a single phase timer. Referring to FIG. 9, the energy robber circuit 50 is very similar to circuit 50, shown in FIG. 2, circuit 250, comprises transistors Ql, Q2, which have their sources connected in a back-to-back series configuration. back, and its outputs connected to the load terminals Ll, L2, respectively. As in the described dual counter mode, the transistors Ql ,. Q2, are controlled by logical switching 106, coupled to transistors Q1, Q2, by impellers 160, which provide a suitable voltage level to activate the transistors Q1, Q2.

The logic switch 106 controls the transistors Q1, Q2, based on inputs from the phase timer 202. The circuit 250 may include the logic phase 185, to reduce the migration of metal in the contacts of the load device 90. The phase logic 185, receives the output from the phase timer 202, and the cycling output 80, of the temperature control 70. The phase 185, provides a switching signal to the logic switching 106, which requests the activation or deactivation of the charging device 90. The energy robber circuit 250 provides low voltage output and high voltage output using the Cl capacitor, capacitor C2, and bulge 166, which operates as described for the dual counter. In addition, bistable switch 168, senses when capacitor Cl, of high voltage storage reaches a sufficient voltage for its operation. At this point, the bistable switch 168 places its two double-push and double-pole switches in the conductor states as shown in Fig. 9. As in the dual counter mode, other functions can be added to the current robber circuit 250 , such as a sleep mode detector 180, and a normal AB sensor 182, which receives power from the low voltage output of the circuit 250. If the sleep mode detector 180 determines that the phase timer 202 has been inactive for a certain period such as 2 or 3 seconds, the sleep detector 180 activates the reserve capacitor C3, which supplies power for an extended period of time. In addition, the detector 180 provides an output to the temperature control 70, such that if energy loss is detected the temperature control 70 stops the cycling and minimizes the energy expenditure. As illustrated in FIG. 9, the energy robber circuit 250 may include the normal sensor 182, which senses an overload current in the transistors Q1 and Q2. When such a condition is sensed the abnormal sensor signals the logical switching 106, which immediately turns off the transistors Ql and Q2. Occasional periodic reentries can be made when returning transistors Ql, Q2. In this way the sensor 182 protects the transistors Ql, Q2, when the charging device 90 malfunctions or has a short circuit. Mode operation of a single timer for symmetric charge current. Fig. 10 illustrates the operation of the single-timer mode for a load current on line 60, which is full-wave and symmetric alternating current. The start of the robbery circuit 250 is identical to that of the dual counter mode explained. Therefore, both transistors Q1 and Q2 are active and the phase timer 202 is operating when the charging current on the feeder line 60 is positive, but is decreasing towards zero. Just before the zero crossing, the phase timer 202 expires, causing logic switching 106 to turn off transistor Q2, so that the current must flow through the body of the diode of Q2. This causes a small voltage loss to the load of approximately .7 volts, until the voltage reaches zero crossing. This slight increase in power loss has minimal effects, since it occurs when the load current approaches zero. This leads to a minimum of power losses in the current change, and establishes fewer requirements on the switching speeds of the transistors Q1, Q2. After the charging current reverses the direction and flows to terminal L2, it is forced to charge capacitor C2, low voltage, since there is no conductive path through transistors Q1 and Q2. The load current flows to terminal L2, through diode D2, transistor Q3, the SCHOTTKY diode, to capacitor C2, low voltage, by the common circuit, by transistor Ql, which is active and exits through terminal Ll. The deviation of the load current to charge the low voltage capacitor C2 again causes the voltage across terminals Ll, L2 to jump to a value slightly higher than the low voltage output. This voltage, is fed back by line 201, to timer 202, and sets in padlock 203, resetting to phase timer 202. In this way, timer 202 is reset at each zero crossing and expires just before the next junction of zero. After the first zero crossing, when some of the current is charging capacitor Cl, of low voltage, the voltage at the anode of the Schottky diode is increasing slightly in value. This voltage is slightly above the low voltage output to allow the flow through the Schottky diode. When the low voltage sensor 194 senses a sufficient voltage at the anode of the Schottky diode it activates its output causing the logic switching 106 to re-energize the transistor Q2. This allows the charging current to flow again directly through the transistors Q1 and Q2, without deviating through the charging robber circuit 50, and with a minimum loss of voltage. Similarly, just before the zero crossing in the positive direction, the phase timer 202 expires causing the logic switching 106 to turn off the transistor Q1, so that the charging current must flow through the body of the Q1 diode. After the load current reverses the direction and flows to terminal Ll, it is forced to charge capacitor C2, since there is no conductive path through transistors Q1 and Q2. The load current flows to the terminal Ll, for the diode DI, the transistor Q3, the Schottky diode, to the low voltage capacitor C2, for the common circuit, the transistor Q2, which is active and leaves through terminal L2. The reversal of the charging current establishes the lock 202, and restarts the phase timer 202. When the low voltage sensor 194 senses a sufficient voltage at the anode of the Schottky diode, it activates its output causing the logical switching 106 to reset to the transistor Ql, and the load current flows directly through the transistors Q1 and Q2, without deviating through the energy robber circuit 50. Constant Current Source Mode. Fig. 11 illustrates an alternative embodiment of a power robber circuit 350 that is capable of stealing energy from a variety of charge streams including S.A. symmetric C.A. not symmetric, C.A. rectified and direct current. The energy robber circuit 250, is very similar to the energy robber circuit 50, shown in FIG. 2, the energy robber circuit 350, comprises the transistors Ql and Q2, which have their sources connected in a back-to-back series configuration. back, and outputs connected to the load terminals Ll, L2, respectively. The transistors Q1 and Q2 are controlled by the logic switching 106, which is coupled to the transistors Q1 and Q2, by impellers 160, which provide a suitable voltage level for activating the transistors, the logic switching 106, controlling the Q1 transistors and Q2, based on inputs from the positive phase timer 102, and the negative phase timer 104. The logic phase 185, and the 170, operate as already described. The energy robber circuit 350 provides a low voltage output and a high output using the high voltage capacitor Cl, the voltage capacitor C2, and the charge pump operating as described in the dual timer mode. The switch 198 operates as previously described. The energy robber circuit 350 may include a fashion detector 180, and the normal sensor 182, which receive power from the low voltage output. A benefit of the energy circuit 350 is the elimination of the Schottky diode. By the elimination of the diode, there is no voltage drop between the source of transistor Q3, and the low voltage capacitor C2. The energy robber circuit 350, comprises transistor Q4, which is any suitable switch, such as a "P-channel" field-effect transistor, a voltage divider formed by resistors R3, R4, and a constant current source 355. The gate of transistor Q4 receives an output of logic switching 106, which indicates whether timer 102, 104 has been turned off and then returned as is the case when the energy robber circuit 50 is stealing energy. In this way transistor Q4 is activated near the zero crossing, near where it is charging to C2.

The output of transistor Q4 is connected to the constant current source 355, while the source is connected to the voltage divider network formed by R3, R4. Operation of Constant Current Source Modality. The current robber circuit 350 operates in a manner similar to the dual timer mode described previously. Referring to Fig. 3, the positive phase timer 102, expires shortly before the zero crossing near the end of the negative half-cycle of the charging current, the expiration of the timer 102, causes the logical switching 106, to turn off the transistor Ql, causing the charge current to pass through its diode body. When the load current crosses zero and reverses, a positive voltage is created at terminal Ll. The positive voltage is fed back to the pad of the phase timer 102, and reset to the positive phase timer 102. The logic switching establishes an additional output that switches to the transistor Q4, switching the constant current source 355, to the dividing point of the voltage divider. formed by R3, R4. Current flows through resistor R4, and capacitor C5, and creates a small positive voltage jump. The low voltage sensor 194, comprising a comparator that receives at its positive input, the negative input of the comparator of the low voltage sensor 194, is connected to a reference. The positive voltage jump at the positive input of the comparator is not enough to cause it to switch. When the voltage at the terminal Ll becomes sufficient, the charging current is forced to flow through the diode D2, and the transistor Q3, charging the low voltage capacitor Cl. While the current of the constant current supply 355, flows through R4, and increases the voltage through capacitor C4, the voltage increase is reflected in the positive input of comparator 360. The voltage at the positive input of comparator I 360, in combination with the low voltage of C2, and a small amount of that of the constant current source produces a voltage across R4, C4. If the voltage low in C2, then it will require more voltage from C4, to trigger the comparator 360. Since the voltage at C4, it is a ramp function that needs more time to reach the trigger point and thus, more load time at C2, for renew your voltage. The opposite is true if the voltage at C2 becomes larger, so the regulation of C2 takes place, and the comparator 360 is recycled in each charging period. When the voltage at the positive terminal of the comparator is sufficient, the output of the comparator becomes high, with the output of the comparator raised, the logic switching 106, causes the transistor Ql, the charging current, to be skipped, and therefore, stops charging the low-voltage capacitor C2. The logic switching 106 prevents the constant current flow through the transistor Q4, causing a small immediate drop in the voltage to the positive input of the comparator 360, due to the drop in current through R4. The comparator 360, switches its output back to a low voltage. The energy robber circuit 350 operates in a similar manner for the negative phase of the charging current. The energy robber circuit 350 effectively draws energy from the different charging currents, similar to the operation of the dual timer mode described previously. Various embodiments of the energy robber circuit have been described. Such a device is suitable for an arrangement or environment in which a load is activated by a power supply line. The described modes operate with a wide variety of charge currents and are capable of energizing a wide variety of thermostats or other low voltage control devices.

Claims (25)

1. RE IVINDI CAC IONS 1.- An energy theft circuit to control the current in a power supply line to a load in response to the cycle output of an environmental control, and which provides operative energy for environmental control, characterized because it comprises: first and second power terminals to be connected in series with the load; first and second power transistors, each having a source, a gate, and an output, the output of the first transistor connected to the first power terminal, the output of the second transistor connected to the second power, the source of the first transistor of power connected to the source of the second power transistor; a functionally connected logic switching to control the switching of the first and second power transistors in low impedance in lit states in which current is allowed to flow to the load, and high impedance switched off states, in which the current is blocked of the load, it is a response to the environmental control cycle output, and furthermore it functions to independently control the switching of the first and second power transistors during the firing states for power theft; an energy storage circuit for supplying operating energy to the environmental control and connected to receive deviated current from the load when a power transistor is in its off state; a load control coupled to the energy storage circuit and functioning to send signal to the logic switching, when the voltage in the energy storage circuit reaches a predetermined level; logic switching includes a timer control that operates at intervals to switch off a power transistor causing the transistor to enter its high impedance state to temporarily divert current to the energy storage circuit, and logic switching functions to switch on the transistor when the voltage sensor indicates that the predetermined level has been reached.
2. Apparatus according to claim 1, wherein the timing control of the logic switching is coupled to the periodicity of the energy to be supplied to the load, so that the power transistor is caused to be switched off at or near of the crossing by zero of the power that is supplied to the load.
3. 3. Apparatus according to claim 1, adapted to be used in connection with symmetrical alternating load currents, wherein the timer control includes a single phase timer connected to control the first and second power transistors during successive phases of the energy that has been applied. to feed the load.
4. 4. Apparatus according to claim 1, further including a second energy storage circuit for providing an operating power at a higher voltage than that provided for. environmental control, to be used in controlling the gates of the power transistors and a charge pump to convert the voltage between the first and second energy storage circuits.
5. 5. Apparatus according to claim 1, comprising a logic operational phase in conjunction with the logic switching to connect the load in alternating phases of an alternating current that supplies the load for different activations of the load.
6. 6. Apparatus according to claim 1, further comprising an abnormal sensor coupled through the first power terminal and the second power terminal sending a signal to the logic switch when the current sensed in the first transistor and in the second power, is greater than a fixed overload threshold.
7. 7. Apparatus according to claim 1, wherein the timer control includes a phase timer having a period of time less than the phase period of the power or current supplying the load., and where the logical switching works during the theft of energy to drive the gate of a conductive transistor near the phase end, so that the power transistor basically blocks the flow of current to the load, and bypasses the current to the storage circuit at the beginning of the next phase.
8. 8. Apparatus according to claim 7, wherein the time control includes a pair of phase timers having periods of time corresponding to the alternating phases of the current to be supplied to the load, respectively connected to control the transistors. first and second during the successive phases of the energy that is supplied to the load.
9. 9. Apparatus according to claim 7, further comprising a sleep detector coupled to the output of the phase timer, wherein the output of the phase detector is established when the phase has not expired within a fixed activity period, or previously determined, and a backup capacitor to maintain backup power, the sleep detector activates the backup capacitor, when the phase timer has not expired within a fixed activity period.
10. 10.- A circuit of energy theft to divert energy from a load to provide a; functional voltage for an environmental cycle control for the load, characterized in that it comprises: a pair of terminals for the connection in series to the load; a pair of power transistors connected to the terminals and to each other to provide a path of high or low impedance through the load depending on the switching signals applied to its gates; logic switching to control the power transistors in response to the charge cycling commands of the environmental control and in response to the need for stolen functional power; a low voltage supply to supply functional voltage to the environmental control; I a high voltage supply to supply high enough voltage to control the gates of the power transistors; a first diverting path to send power to the high voltage supply when the load has a cycle turned off; a second deflection path that works in conjunction with logic switching to send power to the low voltage supply when the load cycles momentarily periodically stopping the power transistors off, until enough power has been diverted to meet the needs of low voltage; And a bidirectional load pump functionally connected to transfer power from the high voltage supply to the low voltage supply during the off cycle of the load and from the low voltage supply to the high voltage supply during the on cycle.
11. 11. An energy theft circuit according to claim 10, wherein the logic switching includes a phase timer for switching a power transistor close to a phase inversion of the energy supplying the load, so that the energy is steal in a low current part of the shape of. power wave sent to the load.
12. 12. An energy theft circuit according to claim 10, wherein the logic switching includes a pair of phase timers to respectively switch the power transistors close to a phase inversion of the alternating phases of the power being fed to a charge, so that the energy is stolen in a low-current part of the energy waveform sent to the charge.
13. 13.- An energy theft circuit to control the current in a power supply line to a load, in response to the cycle output of an environmental control and that provides functional energy for environmental control, characterized in that it comprises: first and second energy to connect in series with the load; first and second power transistors, each having a source, a gate and an output, the output of the first transistor connected to the first power terminal, the output of the second transistor connected to the second power terminal, the source of the first transistor of power connected to the source of the second power transistor; a first phase timer having an output indicating an expiration of a period defined by the first phase timer; a second phase timer having an output indicating the expiration of a period defined by the second phase timer; a connected logic switching to control the switching of the first and second power transistors in low impedance switched states in which the current can flow to the load and in high impedance switched off states in which the current is blocked from the load; the logic switching works in response to an out-of-cycle command by the environmental control to switch the transistors to their off states by deactivating the load; the logic switching operates in response to a cycle command by the environmental control to switch the power transistors to their on state and to periodically and temporarily switch the first and second power transistors by turning them off in response to the expiration of the timer periods of first and second phase, respectively; an energy storage circuit for providing operating energy for environmental control and connected to receive deviated current from the load when a power transistor is in its off state; and a voltage sensor coupled to the energy storage and which sends a signal to the logic switch to turn on again a power transistor that has been turned off, when the voltage in the storage circuit reaches a predetermined level.
14. 14. An energy theft circuit according to claim 13, comprising a second energy storage circuit that receives deviated current when the transistors are off in the off cycle of the environmental control, and stores energy at a higher voltage than the first energy storage circuit, which is sufficient to drive or operate the gates of the power transistors.
15. 15. An energy theft circuit according to claim 14, further including a bidirectional load pump operatively connected to transfer energy to a voltage converted between the first and second energy storage circuits from a power diverted and received to a power source. time given to the other circuit.
16. 16. An energy theft circuit according to claim 13, where the logical switching receives outputs from the first and second timers, determining that the current supplied is alternating if the first phase timer and the second phase timer are activated simultaneously, the logical switching determines that the current supplied is direct or not symmetric if the first phase timer and the second phase timer are inactive simultaneously.
17. 17. An energy theft circuit according to claim 13, wherein the period of the first phase timer is preset according to a positive phase of the fed current.
18. 18. An energy theft circuit according to claim 13, wherein the period of the second phase sifter is preset according to a negative phase of the fed current.
19. 19. An energy theft circuit according to claim 13, further comprising a logic phase for receiving the output of the cycle and providing a switching signal to the logic switching where the switching signal is activated in alternating phases of the current fed for successive activations of the load.
20. 20. An energy theft circuit according to claim 13, comprising a sleep or sleep detector having an output, the sleep detector is coupled to the output of the phase timer where the output of the sleep detector is established When a phase has not expired within a fixed period of activity, the sleep detector receives energy from the first voltage output of the first voltage storage.
21. 21. An energy theft circuit according to claim 13, comprising a reserve capacitor for reserve energy, the sleep detector activates the reserve capacitor when a phase timer has not expired within a fixed activity period.
22. 22. An energy theft circuit according to claim 13, comprising an abnormal sensor coupled through the first power terminal and the second power termination, the abnormal sensor signals the logic switching when the current sensed in the first power transistor and the second power transistor is greater than a set overload threshold.
23. 23.- An energy theft circuit to control the current in a power supply line to a load in response to the cycle output of an environmental control and provides "functional energy to the environmental control, comprising: power terminals first and second for connection in series with the load; first and second power transistors, each having a source, a gate and an output, the output of the first transistor connected to the first power terminal, the output of the second transistor connected to the second power terminal, the source of the first transistor of power connected to the source of the second power transistor; at least a first phase timer having an output indicating an expiration of a period defined by the phase timer; a connected logic switching to control the switching of the first and second power transistors in low impedance switched states in which the current can flow to the load and in high-off-state quenched states in which the current is blocked from the load; the logic switching works in response to an out-of-cycle command by the environmental control to switch the transistors to their off states by deactivating the load; the logic switching works in response to a cycle command by the environmental control to switch the power transistors to their on state and to periodically and temporarily switch the first and second power transistors by turning them off in response to the expiration of the timer periods of first and second phase, respectively; an energy storage circuit for providing operating energy for environmental control and connected to receive deviated current from the load when a power transistor is in its off state; and a voltage sensor coupled to the energy storage and which sends a signal to the logic switch to turn on again a power transistor that has been turned off, when the voltage in the storage circuit reaches a predetermined level.
24. 24. An energy theft circuit according to claim 23, further comprising a second energy storage circuit that receives deviated current when the power transistors are switched off in off-cycle environmental control, and stores energy at a voltage higher than the first energy storage circuit, which is sufficient to drive the gates of the power transistors.
25. 25. An energy theft circuit according to claim 23, including a bidirectional charge pump connected to an energy transfer at a voltage converted between the first and the second energy storage circuit, from one receiving energy diverted to one time given to the other