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MX2017010344A - TRANSMITTER AND METHOD OF GENERATION OF ADDITIONAL PARITY OF THE SAME. - Google Patents

TRANSMITTER AND METHOD OF GENERATION OF ADDITIONAL PARITY OF THE SAME.

Info

Publication number
MX2017010344A
MX2017010344A MX2017010344A MX2017010344A MX2017010344A MX 2017010344 A MX2017010344 A MX 2017010344A MX 2017010344 A MX2017010344 A MX 2017010344A MX 2017010344 A MX2017010344 A MX 2017010344A MX 2017010344 A MX2017010344 A MX 2017010344A
Authority
MX
Mexico
Prior art keywords
bits
parity bits
parity
transmitter
additional parity
Prior art date
Application number
MX2017010344A
Other languages
Spanish (es)
Other versions
MX373036B (en
Inventor
Jeong Hong-Sil
Myung Se-Ho
Joong Kim Kyung-
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Priority claimed from PCT/KR2016/001506 external-priority patent/WO2016129975A2/en
Publication of MX2017010344A publication Critical patent/MX2017010344A/en
Publication of MX373036B publication Critical patent/MX373036B/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/635—Error control coding in combination with rate matching
    • H03M13/6362—Error control coding in combination with rate matching by puncturing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Mathematical Physics (AREA)
  • Algebra (AREA)
  • General Physics & Mathematics (AREA)
  • Pure & Applied Mathematics (AREA)
  • Error Detection And Correction (AREA)

Abstract

Se proporciona un transmisor. El transmisor incluye: un codificador de Comprobación de Paridad de Baja Densidad (LDPC) el cual codifica bits de entrada incluyendo bits codificados exteriores para generar una palabra código LDPC incluyendo los bits de entrada y los bits de paridad que van a ser transmitidos al receptor en una trama actual; una perforadora que perfora una parte de los bits de paridad que no es transmitida en una trama actual; y un generador de paridad adicional que selecciona al menos una parte de los bits de paridad para generar bits de paridad adicional transmitidos al receptor en una trama previa de la trama actual, en donde un número de los bits de paridad adicional se determina con base en un número de los bits codificados exteriores y un número de los bits de paridad que quedan después de la perforación.A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder which encodes input bits including external encoded bits to generate an LDPC code word including the input bits and parity bits that are to be transmitted to the receiver in a current plot; a perforator that punctures a part of the parity bits that is not transmitted in a current frame; and an additional parity generator that selects at least a portion of the parity bits to generate additional parity bits transmitted to the receiver in a previous frame of the current frame, wherein a number of the additional parity bits is determined based on a number of the outer coded bits and a number of the parity bits that remain after drilling.

MX2017010344A 2015-02-13 2016-02-15 TRANSMITTER AND METHOD OF GENERATING ADDITIONAL PARITY THEREOF. MX373036B (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201562115810P 2015-02-13 2015-02-13
US201562120543P 2015-02-25 2015-02-25
US201562202304P 2015-08-07 2015-08-07
KR1020150137191A KR101800423B1 (en) 2015-02-13 2015-09-27 Transmitter and additional parity generating method thereof
PCT/KR2016/001506 WO2016129975A2 (en) 2015-02-13 2016-02-15 Transmitter and additional parity generating method thereof

Publications (2)

Publication Number Publication Date
MX2017010344A true MX2017010344A (en) 2018-01-23
MX373036B MX373036B (en) 2020-05-27

Family

ID=56875537

Family Applications (1)

Application Number Title Priority Date Filing Date
MX2017010344A MX373036B (en) 2015-02-13 2016-02-15 TRANSMITTER AND METHOD OF GENERATING ADDITIONAL PARITY THEREOF.

Country Status (5)

Country Link
KR (5) KR101800423B1 (en)
CN (1) CN107251464B (en)
BR (1) BR112017016116B1 (en)
CA (2) CA3085277C (en)
MX (1) MX373036B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20260031836A1 (en) * 2024-07-26 2026-01-29 Avago Technologies International Sales Pte. Limited Low-density parity check (ldpc) decoders using partial syndrome early termination

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20050020526A (en) * 2003-08-23 2005-03-04 삼성전자주식회사 Apparatus and method for bit interleaving in mobile communication system
RU2323520C2 (en) * 2006-03-21 2008-04-27 Самсунг Электроникс Ко., Лтд. Method for voice data transfer in digital radio communication system and method for interleaving code character sequence (alternatives)
KR101503058B1 (en) * 2008-02-26 2015-03-18 삼성전자주식회사 Method and apparatus for channel encoding / decoding in a communication system using a low-density parity-check code
KR20110055410A (en) * 2009-11-18 2011-05-25 삼성전자주식회사 Method and apparatus for transmitting and receiving data in communication system
KR101806212B1 (en) * 2011-02-22 2017-12-08 삼성전자주식회사 Method and apparatus for transmitting signaling information in digital broadcasting system
WO2013032156A1 (en) * 2011-08-30 2013-03-07 Samsung Electronics Co., Ltd. Method and apparatus for transmitting and receiving information in a broadcasting/communication system
KR101922555B1 (en) * 2011-08-30 2018-11-28 삼성전자주식회사 Method and apparatus transmitting and receiving information in broadcasting/communication system
WO2015016672A1 (en) * 2013-08-01 2015-02-05 Lg Electronics Inc. Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals

Also Published As

Publication number Publication date
CN107251464B (en) 2020-08-07
CA2975077C (en) 2020-09-01
KR20180103794A (en) 2018-09-19
CN107251464A (en) 2017-10-13
BR112017016116A2 (en) 2018-03-27
MX373036B (en) 2020-05-27
CA3085277C (en) 2023-06-20
KR20160100198A (en) 2016-08-23
CA2975077A1 (en) 2016-08-18
KR20170130321A (en) 2017-11-28
KR101800423B1 (en) 2017-11-23
CA3085277A1 (en) 2016-08-18
KR101970825B1 (en) 2019-04-19
KR20190042521A (en) 2019-04-24
KR102227537B1 (en) 2021-03-12
KR20200058345A (en) 2020-05-27
KR101898697B1 (en) 2018-09-13
KR102114481B1 (en) 2020-05-22
BR112017016116B1 (en) 2023-10-31

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