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MX2013008218A - Sistema y metodo para soportar jit en un sistema seguro con intervalos de memoria asignados en forma aleatoria. - Google Patents

Sistema y metodo para soportar jit en un sistema seguro con intervalos de memoria asignados en forma aleatoria.

Info

Publication number
MX2013008218A
MX2013008218A MX2013008218A MX2013008218A MX2013008218A MX 2013008218 A MX2013008218 A MX 2013008218A MX 2013008218 A MX2013008218 A MX 2013008218A MX 2013008218 A MX2013008218 A MX 2013008218A MX 2013008218 A MX2013008218 A MX 2013008218A
Authority
MX
Mexico
Prior art keywords
code
time
unsigned
jit
supporting
Prior art date
Application number
MX2013008218A
Other languages
English (en)
Inventor
Jacques Anthony Vidrine
Lionel Divyang Desai
Original Assignee
Apple Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Apple Inc filed Critical Apple Inc
Publication of MX2013008218A publication Critical patent/MX2013008218A/es

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/52—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow
    • G06F21/53—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow by executing in a restricted environment, e.g. sandbox or secure virtual machine
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/52—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/51—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems at application loading time, e.g. accepting, rejecting, starting or inhibiting executable software based on integrity or source reliability
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/57—Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Storage Device Security (AREA)
  • Stored Programmes (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)
  • Devices For Executing Special Programs (AREA)

Abstract

En este documento se dan a conocer sistemas, métodos y medios de almacenamiento no transitorios legibles por computadora para procesar código en tiempo de ejecución en un dispositivo que exige un requerimiento de firma de código. La descripción incluye recibir código de computación, donde una porción del código incluye código ejecutable en tiempo de ejecución, en un dispositivo que exige un requerimiento de firma de código; identificar la porción ejecutable en tiempo de ejecución sin firmar del código; asignar una región de memoria seleccionada en forma aleatoria en el dispositivo para por lo menos una parte de la porción ejecutable en tiempo de ejecución sin firmar; y ejecutar la porción ejecutable en tiempo de ejecución sin firmar del código en la región de memoria seleccionada en forma aleatoria como si la porción ejecutable en tiempo de ejecución sin firmar del código fuera código de computación firmado.
MX2013008218A 2011-01-18 2012-01-18 Sistema y metodo para soportar jit en un sistema seguro con intervalos de memoria asignados en forma aleatoria. MX2013008218A (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/008,880 US8646050B2 (en) 2011-01-18 2011-01-18 System and method for supporting JIT in a secure system with randomly allocated memory ranges
PCT/US2012/021696 WO2012099945A1 (en) 2011-01-18 2012-01-18 System and method for supporting jit in a secure system with randomly allocated memory ranges

Publications (1)

Publication Number Publication Date
MX2013008218A true MX2013008218A (es) 2013-08-09

Family

ID=45615051

Family Applications (1)

Application Number Title Priority Date Filing Date
MX2013008218A MX2013008218A (es) 2011-01-18 2012-01-18 Sistema y metodo para soportar jit en un sistema seguro con intervalos de memoria asignados en forma aleatoria.

Country Status (11)

Country Link
US (1) US8646050B2 (es)
EP (1) EP2666116B1 (es)
JP (1) JP5647360B2 (es)
KR (1) KR101504857B1 (es)
CN (1) CN103329139B (es)
AU (1) AU2012200181B2 (es)
BR (1) BR112013018294A2 (es)
DE (1) DE102012200613A1 (es)
GB (1) GB2487645B (es)
MX (1) MX2013008218A (es)
WO (1) WO2012099945A1 (es)

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Also Published As

Publication number Publication date
US20120185700A1 (en) 2012-07-19
KR20130114733A (ko) 2013-10-17
AU2012200181B2 (en) 2014-04-17
WO2012099945A1 (en) 2012-07-26
US8646050B2 (en) 2014-02-04
GB2487645A (en) 2012-08-01
CN103329139A (zh) 2013-09-25
AU2012200181A1 (en) 2012-08-02
JP5647360B2 (ja) 2014-12-24
BR112013018294A2 (pt) 2016-11-16
GB201200836D0 (en) 2012-02-29
EP2666116A1 (en) 2013-11-27
DE102012200613A1 (de) 2012-12-06
KR101504857B1 (ko) 2015-03-20
CN103329139B (zh) 2016-08-10
EP2666116B1 (en) 2018-01-10
JP2014504764A (ja) 2014-02-24
GB2487645B (en) 2014-03-19

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