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Chen et al., 2012 - Google Patents

Automatic RTL test generation from SystemC TLM specifications

Chen et al., 2012

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Document ID
3997714528824854010
Author
Chen M
Mishra P
Kalita D
Publication year
Publication venue
ACM Transactions on Embedded Computing Systems (TECS)

External Links

Snippet

SystemC transaction-level modeling (TLM) is widely used to enable early exploration for both hardware and software designs. It can reduce the overall design and validation effort of complex system-on-chip (SOC) architectures. However, due to lack of automated techniques …
Continue reading at chinagator.github.io (PDF) (other versions)

Classifications

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    • G—PHYSICS
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    • G06F11/3636—Software debugging by tracing the execution of the program
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