Golota et al., 2001 - Google Patents

Classifications

• • G—PHYSICS
  • G06—COMPUTING; CALCULATING; COUNTING
  • G06F—ELECTRICAL DIGITAL DATA PROCESSING
  • G06F15/00—Digital computers in general; Data processing equipment in general
  • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a programme unit and a register, e.g. for a simultaneous processing of several programmes
  • G06F15/163—Interprocessor communication
  • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
  • G06F15/17356—Indirect interconnection networks
  • G06F15/17368—Indirect interconnection networks non hierarchical topologies
  • G06F15/17381—Two dimensional, e.g. mesh, torus
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING; COUNTING
  • G06F—ELECTRICAL DIGITAL DATA PROCESSING
  • G06F15/00—Digital computers in general; Data processing equipment in general
  • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a programme unit and a register, e.g. for a simultaneous processing of several programmes
  • G06F15/163—Interprocessor communication
  • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
  • G06F15/17337—Direct connection machines, e.g. completely connected computers, point to point communication networks
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING; COUNTING
  • G06F—ELECTRICAL DIGITAL DATA PROCESSING
  • G06F15/00—Digital computers in general; Data processing equipment in general
  • G06F15/76—Architectures of general purpose stored programme computers
  • G06F15/80—Architectures of general purpose stored programme computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
  • G06F15/8007—Architectures of general purpose stored programme computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING; COUNTING
  • G06F—ELECTRICAL DIGITAL DATA PROCESSING
  • G06F15/00—Digital computers in general; Data processing equipment in general
  • G06F15/76—Architectures of general purpose stored programme computers
  • G06F15/78—Architectures of general purpose stored programme computers comprising a single central processing unit
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING; COUNTING
  • G06F—ELECTRICAL DIGITAL DATA PROCESSING
  • G06F9/00—Arrangements for programme control, e.g. control unit
  • G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
  • G06F9/30—Arrangements for executing machine-instructions, e.g. instruction decode
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING; COUNTING
  • G06F—ELECTRICAL DIGITAL DATA PROCESSING
  • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
  • G06F13/14—Handling requests for interconnection or transfer
  • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING; COUNTING
  • G06F—ELECTRICAL DIGITAL DATA PROCESSING
  • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
  • G06F13/38—Information transfer, e.g. on bus
  • G06F13/40—Bus structure
  • G06F13/4004—Coupling between buses
  • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING; COUNTING
  • G06F—ELECTRICAL DIGITAL DATA PROCESSING
  • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
  • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
  • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
  • G06F7/50—Adding; Subtracting
  • G06F7/505—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L49/00—Packet switching elements
  • H04L49/25—Routing or path finding through a switch fabric
  • H04L49/253—Connections establishment or release between ports
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L45/00—Routing or path finding of packets in data switching networks
  • H04L45/06—Deflection routing, e.g. hot-potato routing
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/28—Data switching networks characterised by path configuration, e.g. local area networks [LAN], wide area networks [WAN]
  • H04L12/42—Loop networks
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L49/00—Packet switching elements
  • H04L49/10—Switching fabric construction
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING; COUNTING
  • G06F—ELECTRICAL DIGITAL DATA PROCESSING
  • G06F11/00—Error detection; Error correction; Monitoring
  • G06F11/07—Error detection; Error correction; Monitoring responding to the occurence of a fault, e.g. fault tolerance
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING; COUNTING
  • G06F—ELECTRICAL DIGITAL DATA PROCESSING
  • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
  • G06F12/02—Addressing or allocation; Relocation

Similar Documents