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Mego et al., 2014 - Google Patents

Tool for algorithms mapping with help of signal-flow graph approach

Mego et al., 2014

Document ID
2518922856303944658
Author
Mego R
Fryza T
Publication year
Publication venue
2014 24th International Conference Radioelektronika

External Links

Snippet

This paper deals with the methods of programming the digital signal processors based on very long instruction word (VLIW) architecture. It compares 3 most used methods using a common algorithm in signal processing domain. The comparison shows the advantages and …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

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