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Jahre et al., 2011 - Google Patents

A high performance adaptive miss handling architecture for chip multiprocessors

Jahre et al., 2011

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Document ID
1754036481549077095
Author
Jahre M
Natvig L
Publication year
Publication venue
Transactions on High-Performance Embedded Architectures and Compilers IV

External Links

Snippet

Abstract Chip Multiprocessors (CMPs) mainly base their performance gains on exploiting thread-level parallelism. Consequently, powerful memory systems are needed to support an increasing number of concurrent threads. Conventional CMP memory systems do not …
Continue reading at www.researchgate.net (PDF) (other versions)

Classifications

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