Childers et al., 2000 - Google Patents
An infrastructure for designing custom embedded counterflow pipelinesChilders et al., 2000
View PDF- Document ID
- 13914608871925076017
- Author
- Childers B
- Davidson J
- Publication year
- Publication venue
- Proceedings of the 33rd Annual Hawaii International Conference on System Sciences
External Links
Snippet
Application-specific instruction set processor (ASIP) design is a promising approach for meeting the performance and cost goals of an embedded system. We have developed a microarchitecture for automatically constructing ASIPs. This new architecture, called a wide …
- 230000015572 biosynthetic process 0 abstract description 36
Classifications
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- G06F9/3885—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
- G06F9/3893—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator
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