Ma et al., 2025 - Google Patents
Fast End-to-End Performance Simulation of Accelerated Hardware–Software StacksMa et al., 2025
View PDF- Document ID
- 13987574554012901989
- Author
- Ma J
- Kaufmann J
- Guandalino E
- Iyer R
- Bourgeat T
- Candea G
- Publication year
- Publication venue
- Proceedings of the ACM SIGOPS 31st Symposium on Operating Systems Principles
External Links
Snippet
The increased use of hardware acceleration has created a need for efficient simulators of the end-to-end performance of accelerated hardware–software stacks: both software and hardware developers need to evaluate the impact of their design choices on overall system …
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for programme control, e.g. control unit
- G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Programme initiating; Programme switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation; Recording or statistical evaluation of user activity, e.g. usability assessment
- G06F11/3466—Performance evaluation by tracing or monitoring
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/362—Software debugging
- G06F11/3636—Software debugging by tracing the execution of the program
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation; Recording or statistical evaluation of user activity, e.g. usability assessment
- G06F11/3409—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment
- G06F11/3414—Workload generation, e.g. scripts, playback
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/362—Software debugging
- G06F11/3632—Software debugging of specific synchronisation aspects
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/362—Software debugging
- G06F11/3648—Software debugging using additional hardware
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/50—Computer-aided design
- G06F17/5009—Computer-aided design using simulation
- G06F17/5022—Logic simulation, e.g. for logic circuit operation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation; Recording or statistical evaluation of user activity, e.g. usability assessment
- G06F11/3457—Performance evaluation by simulation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for programme control, e.g. control unit
- G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
- G06F9/44—Arrangements for executing specific programmes
- G06F9/455—Emulation; Software simulation, i.e. virtualisation or emulation of application or operating system execution engines
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformations of program code
- G06F8/41—Compilation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
- G06F2201/86—Event-based monitoring
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F1/00—Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F2217/00—Indexing scheme relating to computer aided design [CAD]
- G06F2217/86—Hardware-Software co-design
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Bringmann et al. | The next generation of virtual prototyping: Ultra-fast yet accurate simulation of HW/SW systems | |
Martin et al. | Effects of communication latency, overhead, and bandwidth in a cluster architecture | |
Wang et al. | Manifold: A parallel simulation framework for multicore systems | |
Villa et al. | Need for speed: Experiences building a trustworthy system-level gpu simulator | |
Gligor et al. | Using binary translation in event driven simulation for fast and flexible MPSoC simulation | |
Iskander et al. | High-level abstractions and modular debugging for FPGA design validation | |
Emami et al. | Manticore: Hardware-accelerated RTL simulation with static bulk-synchronous parallelism | |
Shi et al. | ENCORE: Efficient architecture verification framework with FPGA acceleration | |
Ara et al. | Simulating execution time and power consumption of real-time tasks on embedded platforms | |
Weinstock et al. | Parallel SystemC simulation for ESL design | |
Lai et al. | Fast profiling framework and race detection for heterogeneous system | |
Poss et al. | MGSim—A simulation environment for multi-core research and education | |
Razaghi et al. | Host-compiled multicore system simulation for early real-time performance evaluation | |
Bin | Controlling execution time variability using COTS for Safety-critical systems | |
Peterson et al. | Application of full-system simulation in exploratory system design and development | |
Mueller-Gritschneder et al. | Host-compiled simulation | |
Ma et al. | Fast End-to-End Performance Simulation of Accelerated Hardware–Software Stacks | |
France-Pillois et al. | A non-intrusive tool chain to optimize MPSoC end-to-end systems | |
Elrabaa et al. | A very fast trace-driven simulation platform for chip-multiprocessors architectural explorations | |
Isshiki et al. | Trace-driven workload simulation method for Multiprocessor System-On-Chips | |
Boudjadar et al. | Schedulability and memory interference analysis of multicore preemptive real-time systems | |
Gilani | Methodologies for Accelerated Open-Source Hardware Verification and Optimization | |
Kurtin et al. | HAPI: An event-driven simulator for real-time multiprocessor systems | |
Cunha et al. | Collecting traces in dynamic binary translation based virtual prototyping platforms | |
Huang et al. | Profiling and annotation combined method for multimedia application specific MPSoC performance estimation |