[go: up one dir, main page]

Li et al., 2000 - Google Patents

Introduction to phase-locked loop system modeling

Li et al., 2000

View PDF
Document ID
13969021152594403626
Author
Li W
Meiners J
Publication year
Publication venue
Analog Applications

External Links

Snippet

Phase-locked loops (PLLs) are one of the basic building blocks in modern electronic systems. They have been widely used in communications, multimedia and many other applications. The theory and mathematical models used to describe PLLs are of two types …
Continue reading at application-notes.digchip.com (PDF) (other versions)

Classifications

    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used

Similar Documents

Publication Publication Date Title
Li et al. Introduction to phase-locked loop system modeling
Hein et al. z-domain model for discrete-time PLL's
Gardner Phaselock techniques
Da Dalt Markov chains-based derivation of the phase detector gain in bang-bang PLLs
CA2425496C (en) Fast phase synchronization and retrieval of sequence components in three-phase networks
Xiu et al. A novel all-digital PLL with software adaptive filter
JP2009246969A (en) Frequency diverse discrete-time phase-lock device and apparatus
Kihara et al. Digital clocks for synchronization and communications
Hedayat et al. Modeling and characterization of the 3rd order charge-pump PLL: a fully event-driven approach
US6657500B1 (en) Method and system of characterization and behavioral modeling of a phase-locked loop for fast mixed signal simulation
US8332200B2 (en) Method and simulator for generating phase noise in system with phase-locked loop
English et al. Emergence and analysis of Kuramoto-Sakaguchi-like models as an effective description for the dynamics of coupled Wien-bridge oscillators
Tyagi et al. Frequency estimation techniques in capacitance-to-frequency conversion measurement
US9800251B2 (en) Loop parameter sensor using repetitive phase errors
PERIŠIĆ Frequency locked loops of the third and higher order
Adkins et al. Modeling of a phase-locked loop servo controller with encoder feedback
JP2002271191A (en) Frequency synchronization loop circuit and phase synchronization loop circuit
WO2004025499A1 (en) Jerk limited time delay filter
Sarkar et al. A new look into the acquisition properties of a second-order digital phase locked loop
PERIŠIĆ TIME-FINITE IMPULSE RESPONSE DIGITAL FILTER BASED ON THE TIME DIFFERENCES
Kubczak et al. Kalman filter design for fast synchronization of a high-stability rubidium oscillator
Li et al. An Event-Driven-Based behavioral modeling for Fractional-N CP-PLL
Levant Universal output-feedback SISO controller
Goyal et al. A fast methodology for first-time-correct design of PLLs using nonlinear phase-domain VCO macromodels
WO2001045261A2 (en) Model for charge pump phase-locked loop