[go: up one dir, main page]

Hashemi et al., 1997 - Google Patents

Procedure mapping using static call graph estimation

Hashemi et al., 1997

View PDF
Document ID
13772827887074710972
Author
Hashemi A
Kaeli D
Calder B
Publication year
Publication venue
Workshop on Interaction between Compiler and Computer Architecture, San Antonio, TX

External Links

Snippet

As the gap between memory and processor performance continues to grow, it becomes increasingly important to exploit cache memory effectively. One technique used by compiler and linkers to improve the performance of the cache is code reordering. Code reordering …
Continue reading at cseweb.ucsd.edu (PDF) (other versions)

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/40Transformations of program code
    • G06F8/41Compilation
    • G06F8/44Encoding
    • G06F8/443Optimisation
    • G06F8/4441Reducing the execution time required by the program code
    • G06F8/4442Reducing the number of cache misses; Data prefetching
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/34Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3409Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Preventing errors by testing or debugging software
    • G06F11/3604Software analysis for verifying properties of programs
    • G06F11/3612Software analysis for verifying properties of programs by runtime analysis
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/34Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466Performance evaluation by tracing or monitoring
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Preventing errors by testing or debugging software
    • G06F11/362Software debugging
    • G06F11/3636Software debugging by tracing the execution of the program
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/34Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3457Performance evaluation by simulation
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for programme control, e.g. control unit
    • G06F9/06Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Programme initiating; Programme switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4843Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/70Software maintenance or management
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F2201/00Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/885Monitoring specific for caches
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F2201/00Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/86Event-based monitoring
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/30Creation or generation of source code
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F1/00Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application

Similar Documents

Publication Publication Date Title
Weidendorfer et al. A tool suite for simulation based analysis of memory access behavior
Malik et al. Static timing analysis of embedded software
US8037465B2 (en) Thread-data affinity optimization using compiler
Nudd et al. PACE—A toolset for the performance prediction of parallel and distributed systems
Hölzle et al. Reconciling responsiveness with performance in pure object-oriented languages
US5950009A (en) Method and apparatus for profile-based reordering of program portions in a computer program
Wu et al. Static branch frequency and program profile analysis
Sweeney et al. Using Hardware Performance Monitors to Understand the Behavior of Java Applications.
Puaut et al. Dynamic instruction cache locking in hard real-time systems
Suganuma et al. Design and evaluation of dynamic optimizations for a Java just-in-time compiler
US6360360B1 (en) Object-oriented compiler mechanism for automatically selecting among multiple implementations of objects
Mueller et al. Fast instruction cache analysis via static cache simulation
Hashemi et al. Procedure mapping using static call graph estimation
Sasaki et al. An intra-task DVFS technique based on statistical analysis of hardware events
Gheorghita et al. Intra-task scenario-aware voltage scheduling
Levin et al. Complementing missing and inaccurate profiling using a minimum cost circulation algorithm
Bombieri et al. A fine-grained performance model for GPU architectures
Shimchenko et al. Analysing and Predicting Energy Consumption of Garbage Collectors in OpenJDK
Smith et al. Towards an automatic synthesis system for real-time software
Scholz et al. Minimizing bank selection instructions for partitioned memory architecture
Scholz et al. Minimal placement of bank selection instructions for partitioned memory architectures
Batten et al. Interaction between optimizations and a new type of dsp intrinsic function
Kaplow et al. Program optimization based on compile-time cache performance prediction
Yue et al. Performance analysis and prediction of processor scheduling strategies in multiprogrammed shared-memory multiprocessors
Min et al. Combined compile-time and runtime-driven, pro-active data movement in software dsm systems