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Chen et al., 2023 - Google Patents

Moiré heterostructures: highly tunable platforms for quantum simulation and future computing

Chen et al., 2023

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Document ID
13481748653950897118
Author
Chen M
Chen F
Cheng B
Liang S
Miao F
Publication year
Publication venue
Journal of Semiconductors

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Moiré heterostructures: highly tunable platforms for quantum simulation and future computing 2019年JOS入选“中国科技期刊卓越行动计划” 2020年11月JOS被EI数据库收录 Authors Preparing Your Manuscript Submit Your Manuscript Copyright and Permissions …
Continue reading at www.jos.ac.cn (HTML) (other versions)

Classifications

    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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