Thijs et al., 2008 - Google Patents
Characterization and optimization of sub-32-nm FinFET devices for ESD applicationsThijs et al., 2008
- Document ID
- 10968211980886800623
- Author
- Thijs S
- Tremouilles D
- Russ C
- Griffoni A
- Collaert N
- Rooyackers R
- Linten D
- Scholz M
- Duvvury C
- Gossner H
- Jurczak M
- Groeseneken G
- Publication year
- Publication venue
- IEEE transactions on electron devices
External Links
Snippet
Electrostatic discharge performance of advanced FinFETs shows a delicate sensitivity to device layout and to processing parameters. Both N-and P-type MOS FinFET devices are characterized in bipolar operation mode as a function of layout parameters such as gate …
- 238000010192 crystallographic characterization 0 title description 11
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