Meitinger et al., 2008 - Google Patents
A hardware packet re-sequencer unit for network processorsMeitinger et al., 2008
View PDF- Document ID
- 9362547905372244685
- Author
- Meitinger M
- Ohlendorf R
- Wild T
- Herkersdorf A
- Publication year
- Publication venue
- International Conference on Architecture of Computing Systems
External Links
Snippet
Network Processors (NP) usually are designed as multi-processor systems with parallel packet processing. This parallelism may lead to flows with packets out-of-order when leaving the NP system. But packet reordering has a bad impact on network performance …
- 238000004088 simulation 0 abstract description 10
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- H04L47/24—Flow control or congestion control depending on the type of traffic, e.g. priority or quality of service [QoS]
- H04L47/2441—Flow classification
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- H04L12/5693—Queue scheduling in packet switching networks
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- H04L47/2458—Modification of priorities while in transit
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