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Kthiri et al., 2010 - Google Patents

A parallel hardware architecture of deblocking filter in H264/AVC

Kthiri et al., 2010

Document ID
8973752509179407656
Author
Kthiri M
Kadionik P
Lévi H
Loukil H
Atitallah A
Masmoudi N
Publication year
Publication venue
2010 9th International Symposium on Electronics and Telecommunications

External Links

Snippet

This paper describes an efficient hardware architecture for the deblocking filter used in H. 264/AVC baseline profile video coding standard and optimized for real time implementation. Thus, the deblocking filter is a computationally and data intensive tool resulting in an …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

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    • H04N19/17—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object
    • H04N19/176—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a block, e.g. a macroblock
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    • H04N19/157—Assigned coding mode, i.e. the coding mode being predefined or preselected to be further used for selection of another element or parameter
    • H04N19/159—Prediction type, e.g. intra-frame, inter-frame or bidirectional frame prediction
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