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Huber et al., 2010 - Google Patents

WCET driven design space exploration of an object cache

Huber et al., 2010

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Document ID
8164679564481154833
Author
Huber B
Puffitsch W
Schoeberl M
Publication year
Publication venue
Proceedings of the 8th International Workshop on Java Technologies for Real-Time and Embedded Systems

External Links

Snippet

In order to guarantee that real-time systems meet their timing specification, static execution time bounds need to be calculated. Not considering execution time predictability led to architectures which perform well in the average case, but require very pessimistic …
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Classifications

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    • G06F11/34Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466Performance evaluation by tracing or monitoring
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
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    • G06F11/3409Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment
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    • G06F11/3457Performance evaluation by simulation
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
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    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
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    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
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    • G06F9/00Arrangements for programme control, e.g. control unit
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    • G06F9/46Multiprogramming arrangements
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    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • G06F17/5009Computer-aided design using simulation
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    • G06F9/30Arrangements for executing machine-instructions, e.g. instruction decode
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