Zulfiqar et al., 2013 - Google Patents
Wavelength stealing: An opportunistic approach to channel sharing in multi-chip photonic interconnectsZulfiqar et al., 2013
View PDF- Document ID
- 7539236411068995792
- Author
- Zulfiqar A
- Koka P
- Schwetman H
- Lipasti M
- Zheng X
- Krishnamoorthy A
- Publication year
- Publication venue
- Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture
External Links
Snippet
Silicon photonic technology offers seamless integration of multiple chips with high bandwidth density and lower energy-per-bit consumption compared to electrical interconnects. The topology of a photonic interconnect impacts both its performance and …
- 238000005516 engineering process 0 abstract description 5
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a programme unit and a register, e.g. for a simultaneous processing of several programmes
- G06F15/163—Interprocessor communication
- G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
- G06F15/17337—Direct connection machines, e.g. completely connected computers, point to point communication networks
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a programme unit and a register, e.g. for a simultaneous processing of several programmes
- G06F15/163—Interprocessor communication
- G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
- G06F15/17356—Indirect interconnection networks
- G06F15/17368—Indirect interconnection networks non hierarchical topologies
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for programme control, e.g. control unit
- G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5061—Partitioning or combining of resources
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored programme computers
- G06F15/78—Architectures of general purpose stored programme computers comprising a single central processing unit
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F1/00—Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power Management, i.e. event-based initiation of power-saving mode
- G06F1/3234—Action, measure or step performed to reduce power consumption
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Error detection; Error correction; Monitoring responding to the occurence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Zulfiqar et al. | Wavelength stealing: An opportunistic approach to channel sharing in multi-chip photonic interconnects | |
| Li et al. | LumiNOC: A power-efficient, high-performance, photonic network-on-chip | |
| Batten et al. | Designing chip-level nanophotonic interconnection networks | |
| Ye et al. | 3-D mesh-based optical network-on-chip for multiprocessor system-on-chip | |
| Parikh et al. | Power-aware NoCs through routing and topology reconfiguration | |
| Abadal et al. | OrthoNoC: A broadcast-oriented dual-plane wireless network-on-chip architecture | |
| Bahirat et al. | METEOR: Hybrid photonic ring-mesh network-on-chip for multicore architectures | |
| Majumder et al. | Remote control: A simple deadlock avoidance scheme for modular systems-on-chip | |
| Wu et al. | An inter/intra-chip optical network for manycore processors | |
| US10216692B2 (en) | Multi-core parallel processing system | |
| Kim et al. | System architecture directions for post-soc/32-bit networked sensors | |
| Ziabari et al. | Leveraging silicon-photonic noc for designing scalable gpus | |
| Hendry et al. | Circuit-switched memory access in photonic interconnection networks for high-performance embedded computing | |
| Wang et al. | CAMON: Low-cost silicon photonic chiplet for manycore processors | |
| Xu et al. | Channel borrowing: an energy-efficient nanophotonic crossbar architecture with light-weight arbitration | |
| Chittamuru et al. | BiGNoC: Accelerating big data computing with application-specific photonic network-on-chip architectures | |
| Li et al. | Luminoc: A power-efficient, high-performance, photonic network-on-chip for future parallel architectures | |
| Mazumdar et al. | NoC-based hardware software co-design framework for dataflow thread management: S. Mazumdar et al. | |
| Wang et al. | SMONoC: Optical network-on-chip using a statistical multiplexing strategy | |
| Duato et al. | Extending HyperTransport protocol for improved scalability | |
| Browning et al. | LumiNOC: A low-latency, high-bandwidth per Watt, photonic Network-on-Chip | |
| Ghosal et al. | 3d noc: a promising alternative for tomorrow’s nanosystem design | |
| Zhu et al. | Saturn: a chiplet-based optical network architecture for breaking the memory wall | |
| Grani et al. | Scalable path-setup scheme for all-optical dynamic circuit switched nocs in cache coherent cmps | |
| Bartolini et al. | Integrated Photonics for Chip-Multiprocessor Architectures |