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Wakabayashi et al., 2008 - Google Patents

“All-in-C” Behavioral Synthesis and Verification with CyberWorkBench: From C to Tape-Out with No Pain and A Lot of Gain

Wakabayashi et al., 2008

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Document ID
7002121159232950647
Author
Wakabayashi K
Schafer B
Publication year
Publication venue
High-Level Synthesis: From Algorithm to Digital Circuit

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Snippet

This chapter introduces the benefits of C language-based behavioral synthesis design methodology over traditional RTL-based methods for System LSI, or SoC designs. A comprehensive C-based tool flow, based on CyberWorkBench™(CWB), developed during …
Continue reading at www.academia.edu (PDF) (other versions)

Classifications

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    • G06F17/5009Computer-aided design using simulation
    • G06F17/5022Logic simulation, e.g. for logic circuit operation
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    • G06COMPUTING; CALCULATING; COUNTING
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    • G06F17/5045Circuit design
    • G06F17/5054Circuit design for user-programmable logic devices, e.g. field programmable gate arrays [FPGA]
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    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • G06F17/5068Physical circuit design, e.g. layout for integrated circuits or printed circuit boards
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    • G06F17/5036Computer-aided design using simulation for analog modelling, e.g. for circuits, spice programme, direct methods, relaxation methods
    • GPHYSICS
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    • G06F17/5072Floorplanning, e.g. partitioning, placement
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
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