[go: up one dir, main page]

Iyer et al., 2003 - Google Patents

Analysis of the parallel packet switch architecture

Iyer et al., 2003

View HTML
Document ID
4051183118344998513
Author
Iyer S
McKeown N
Publication year
Publication venue
IEEE/ACM Transactions on Networking

External Links

Snippet

Our work is motivated by the desire to design packet switches with large aggregate capacity and fast line rates. We consider building a packet switch from multiple lower speed packet switches operating independently and in parallel. In particular, we consider a (perhaps …
Continue reading at www.academia.edu (HTML) (other versions)

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/54Store-and-forward switching systems
    • H04L12/56Packet switching systems
    • H04L12/5601Transfer mode dependent, e.g. ATM
    • H04L2012/5678Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
    • H04L2012/5679Arbitration or scheduling
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/54Store-and-forward switching systems
    • H04L12/56Packet switching systems
    • H04L12/5601Transfer mode dependent, e.g. ATM
    • H04L2012/5638Services, e.g. multimedia, GOS, QOS
    • H04L2012/5646Cell characteristics, e.g. loss, delay, jitter, sequence integrity
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/25Routing or path finding through a switch fabric
    • H04L49/253Connections establishment or release between ports
    • H04L49/254Centralized controller, i.e. arbitration or scheduling
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/54Store-and-forward switching systems
    • H04L12/56Packet switching systems
    • H04L12/5693Queue scheduling in packet switching networks
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic regulation in packet switching networks
    • H04L47/10Flow control or congestion control
    • H04L47/24Flow control or congestion control depending on the type of traffic, e.g. priority or quality of service [QoS]
    • H04L47/2441Flow classification
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/20Support for services or operations
    • H04L49/201Multicast or broadcast
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/25Routing or path finding through a switch fabric
    • H04L49/256Routing or path finding in ATM switching fabrics
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/04Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0428Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/30Peripheral units, e.g. input or output ports
    • H04L49/3009Header conversion, routing tables or routing tags
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/15Interconnection of switching modules
    • H04L49/1553Interconnection of ATM switching modules, e.g. ATM switching fabrics
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic regulation in packet switching networks
    • H04L47/50Queue scheduling
    • H04L47/62General aspects
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/50Overload detection; Overload protection
    • H04L49/505Corrective Measures, e.g. backpressure
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/10Switching fabric construction
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00Routing or path finding of packets in data switching networks
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q3/00Selecting arrangements
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q2213/00Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13103Memory

Similar Documents

Publication Publication Date Title
Iyer et al. Analysis of the parallel packet switch architecture
Iyer et al. Analysis of a packet switch with memories running slower than the line-rate
Iyer et al. Making parallel packet switches practical
Krishna et al. On the speedup required for work-conserving crossbar switches
Lin et al. Priority queueing strategies and buffer allocation protocols for traffic control at an ATM integrated broadband switching system
JP3227341B2 (en) How to regulate backpressure traffic in a packet-switched network
CN1736068B (en) traffic management structure
US20040151197A1 (en) Priority queue architecture for supporting per flow queuing and multiple ports
Nong et al. On the provision of quality-of-service guarantees for input queued switches
US20040085979A1 (en) Multiple input/output-queued switch
Chrysos et al. Scheduling in Non-Blocking Buffered Three-Stage Switching Fabrics.
CN101695051A (en) Queue length balance dispatching method used for buffered Crossbar
Chiussi et al. A distributed scheduling architecture for scalable packet switches
CN100490383C (en) A high-speed Crossbar scheduling method for supporting multipriority
Shen et al. Byte-focal: A practical load balanced switch
Hu et al. Feedback-based scheduling for load-balanced two-stage switches
Wang et al. A distributed switch architecture with dynamic load-balancing and parallel input-queued crossbars for terabit switch fabrics
Chao et al. An ATM queue manager handling multiple delay and loss priorities
Shen et al. Design and performance analysis of a practical load-balanced switch
Briem et al. Traffic management for an ATM switch with per-VC queuing: Concept and implementation
Lee et al. Matching output queueing with a multiple input/output-queued switch
Mneimneh et al. Switching using parallel input-output queued switches with no speedup
Iyer et al. On the speedup required for a multicast parallel packet switch
CN103731359A (en) FIFO cache sharing router based on fiber delay lines and working method thereof
Benet et al. Providing in-network support to coflow scheduling