RISC-V: fix fcsr read/write

Required for !12694 (merged)

What

The fcsr only allows certain bits to be written, and is partially shadowed by both frm and fflags. We implement this logic.

Why

Required to meet the spec. Was made clear when trying to implement the f/d-p-move tests

How

With a couple bitmasks

Manually testing the MR

Try it in the debugger! !12714 (merged)