1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
|
Project "srecord.1.9" Page 1
List of Changes Fri Jun 14 09:10:10 2002
Change State Description
------- ------- -------------
10 completed prepare for release
11 completed web stuff
12 completed GCC 3.0.2
15 completed LSI Logic Fast Load format
16 completed DEC Binary output
17 completed Motorola format: add S6
18 completed seek less on binary files
19 completed intel hex
Project "srecord.1.9", Change 10 Page 1
Change Details Fri Jun 14 09:10:10 2002
NAME
Project "srecord.1.9", Delta 1, Change 10.
SUMMARY
prepare for release
DESCRIPTION
This change prepares SRecord for its next public release.
This change is exempt from testing against the development
directory. This change is exempt from testing against the
baseline.
ARCHITECTURE
This change must build and test in the "linux-i486"
architecture.
CAUSE
This change was caused by internal_enhancement.
FILES
Type Action Edit File Name
------- -------- ------- -----------
source create 1.1 etc/CHANGES.1.8
source modify 1.9 -> 1.10 etc/new.1.8.so
source create 1.1 etc/new.1.9.so
source modify 1.2 -> 1.3 man/man5/srec_emon52.5
source modify 1.3 -> 1.4 man/man5/srec_fpc.5
source modify 1.3 -> 1.4 man/man5/srec_signetics.5
HISTORY
What When Who Comment
------ ------ ----- ---------
new_change Tue Nov 27 pmiller
09:46:15 2001
develop_begin Tue Nov 27 pmiller Elapsed time: 0.040
09:46:15 2001 days.
develop_end Tue Nov 27 pmiller
10:04:20 2001
review_pass Tue Nov 27 pmiller
10:04:27 2001
integrate_begin Tue Nov 27 pmiller
10:04:30 2001
integrate_pass Tue Nov 27 pmiller
10:05:06 2001
Project "srecord.1.9", Change 11 Page 1
Change Details Fri Jun 14 09:10:10 2002
NAME
Project "srecord.1.9", Delta 2, Change 11.
SUMMARY
web stuff
DESCRIPTION
This change fixes an uglyness on the web page.
This change is exempt from testing against the development
directory. This change is exempt from testing against the
baseline.
ARCHITECTURE
This change must build and test in the "linux-i486"
architecture.
CAUSE
This change was caused by internal_enhancement.
FILES
Type Action Edit File Name
------- -------- ------- -----------
source modify 1.34 -> 1.35 etc/srecord.html
HISTORY
What When Who Comment
------ ------ ----- ---------
new_change Tue Nov 27 pmiller
10:10:50 2001
develop_begin Tue Nov 27 pmiller
10:10:50 2001
develop_end Tue Nov 27 pmiller
10:18:06 2001
review_pass Tue Nov 27 pmiller
10:18:08 2001
integrate_begin Tue Nov 27 pmiller
10:18:10 2001
integrate_pass Tue Nov 27 pmiller
10:18:37 2001
Project "srecord.1.9", Change 12 Page 1
Change Details Fri Jun 14 09:10:10 2002
NAME
Project "srecord.1.9", Delta 3, Change 12.
SUMMARY
GCC 3.0.2
DESCRIPTION
This change makes SRecord compile using GCC 3.0.2. This should
fix the Cygwin build problems, too.
My thanks to doj@cubic.org for this patch.
This change must pass a full regression test. This change is
exempt from testing against the development directory. This
change is exempt from testing against the baseline.
ARCHITECTURE
This change must build and test in the "linux-i486"
architecture.
CAUSE
This change was caused by external_bug.
FILES
Type Action Edit File Name
------- -------- ------- -----------
source modify 1.6 -> 1.7 etc/Makefile.head
source modify 1.9 -> 1.10 include/interval.h
source modify 1.4 -> 1.5 include/quit/prefix.h
source modify 1.12 -> 1.13 include/srec/input.h
source modify 1.21 -> 1.22 include/srec/input/file.h
source modify 1.14 -> 1.15 include/srec/output.h
source modify 1.11 -> 1.12 lib/common/arglex.cc
source modify 1.13 -> 1.14 lib/common/interval.cc
source modify 1.2 -> 1.3 lib/common/quit.cc
source modify 1.2 -> 1.3 lib/common/quit/normal.cc
source modify 1.4 -> 1.5 lib/common/quit/prefix.cc
source modify 1.47 -> 1.48 lib/srec/arglex.cc
source modify 1.10 -> 1.11 lib/srec/input.cc
source modify 1.21 -> 1.22 lib/srec/input/file.cc
source modify 1.3 -> 1.4 lib/srec/input/file/ascii_hex.cc
source modify 1.5 -> 1.6 lib/srec/input/file/ti_tagged.cc
source modify 1.5 -> 1.6 lib/srec/memory/walker/compare.cc
source modify 1.12 -> 1.13 lib/srec/output.cc
source modify 1.20 -> 1.21 lib/srec/output/file.cc
source modify 1.8 -> 1.9 lib/srec/output/file/ti_tagged.cc
source modify 1.18 -> 1.19 prog/srec_cat/main.cc
source modify 1.12 -> 1.13 prog/srec_cmp/main.cc
source modify 1.10 -> 1.11 prog/srec_info/main.cc
HISTORY
What When Who Comment
------ ------ ----- ---------
new_change Thu Nov 29 pmiller
09:41:32 2001
Project "srecord.1.9", Change 12 Page 2
Change Details Fri Jun 14 09:10:10 2002
What When Who Comment
------ ------ ----- ---------
develop_begin Thu Nov 29 pmiller Elapsed time: 0.078
09:41:32 2001 days.
develop_end Thu Nov 29 pmiller
10:16:47 2001
review_pass Thu Nov 29 pmiller
10:16:50 2001
integrate_begin Thu Nov 29 pmiller
10:16:52 2001
integrate_pass Thu Nov 29 pmiller
10:18:52 2001
Project "srecord.1.9", Change 15 Page 1
Change Details Fri Jun 14 09:10:11 2002
NAME
Project "srecord.1.9", Delta 4, Change 15.
SUMMARY
LSI Logic Fast Load format
DESCRIPTION
This change adds the LSI Logic fastload format.
ARCHITECTURE
This change must build and test in the "linux-i486"
architecture.
CAUSE
This change was caused by internal_enhancement.
FILES
Type Action Edit File Name
------- -------- ------- -----------
source modify 1.35 -> 1.36 etc/README.man
source modify 1.1 -> 1.2 etc/new.1.9.so
source modify 1.35 -> 1.36 etc/srecord.html
source modify 1.46 -> 1.47 include/srec/arglex.h
source modify 1.22 -> 1.23 include/srec/input/file.h
source create 1.1 include/srec/input/file/fastload.h
source create 1.1 include/srec/output/file/
fastload.h
source modify 1.15 -> 1.16 include/srec/record.h
source modify 1.48 -> 1.49 lib/srec/arglex.cc
source modify 1.7 -> 1.8 lib/srec/arglex_output.cc
source modify 1.22 -> 1.23 lib/srec/input/file.cc
source create 1.1 lib/srec/input/file/fastload.cc
source modify 1.7 -> 1.8 lib/srec/input/file/guess.cc
source create 1.1 lib/srec/output/file/fastload.cc
source modify 1.11 -> 1.12 lib/srec/record.cc
source modify 1.39 -> 1.40 man/man1/o_input.so
source modify 1.28 -> 1.29 man/man1/srec_cat.1
source create 1.1 man/man5/srec_fastload.5
test create 1.1 test/00/t0076a.sh
HISTORY
What When Who Comment
------ ------ ----- ---------
new_change Mon Dec 31 pmiller
11:33:38 2001
develop_begin Mon Dec 31 pmiller Elapsed time: 0.964
11:33:39 2001 days.
develop_end Mon Dec 31 pmiller
18:47:20 2001
review_pass Mon Dec 31 pmiller
18:47:24 2001
integrate_begin Mon Dec 31 pmiller Elapsed time: 0.128
18:47:26 2001 days.
Project "srecord.1.9", Change 15 Page 2
Change Details Fri Jun 14 09:10:11 2002
What When Who Comment
------ ------ ----- ---------
integrate_fail Mon Dec 31 pmiller the guess regression
19:44:53 2001 test failed
Elapsed time: 0.224
days.
develop_end Mon Dec 31 pmiller
21:25:45 2001
review_pass Mon Dec 31 pmiller
21:25:49 2001
integrate_begin Mon Dec 31 pmiller
21:26:02 2001
integrate_pass Mon Dec 31 pmiller
21:29:26 2001
Project "srecord.1.9", Change 16 Page 1
Change Details Fri Jun 14 09:10:11 2002
NAME
Project "srecord.1.9", Delta 5, Change 16.
SUMMARY
DEC Binary output
DESCRIPTION
This change fixes a problem with DEC Binary output on Windows
machines.
"I brought your software to my NT machine, and built it using
cygwin. Once
I got the right cygwin software downloaded, the build went fine.
However,
when I did the make sure, I got the error below:
/bin/sh test/00/t0075a.sh
srec_cmp: test.out: 2: checksum mismatch (D5)
FAILED test of the DEC Binary functionality"
My thanks to Andy Levin <levina@netscout.com> for reporting this
problem.
This change must pass a full regression test. This change is
exempt from testing against the development directory. This
change is exempt from testing against the baseline.
ARCHITECTURE
This change must build and test in the "linux-i486"
architecture.
CAUSE
This change was caused by external_bug.
FILES
Type Action Edit File Name
------- -------- ------- -----------
source modify 1.2 -> 1.3 include/srec/output/file/dec_
binary.h
source modify 1.2 -> 1.3 lib/srec/output/file/dec_binary.cc
HISTORY
What When Who Comment
------ ------ ----- ---------
new_change Tue Feb 19 pmiller
22:29:20 2002
develop_begin Tue Feb 19 pmiller Elapsed time: 0.030
22:29:21 2002 days.
develop_end Tue Feb 19 pmiller
22:43:01 2002
review_pass Tue Feb 19 pmiller
22:43:07 2002
integrate_begin Tue Feb 19 pmiller
22:43:09 2002
integrate_pass Tue Feb 19 pmiller
22:43:56 2002
Project "srecord.1.9", Change 17 Page 1
Change Details Fri Jun 14 09:10:11 2002
NAME
Project "srecord.1.9", Delta 6, Change 17.
SUMMARY
Motorola format: add S6
DESCRIPTION
This change adds the S6 record type to the Motorola S-Record
format.
This change must pass a full regression test. This change is
exempt from testing against the development directory. This
change is exempt from testing against the baseline.
ARCHITECTURE
This change must build and test in the "linux-i486"
architecture.
CAUSE
This change was caused by external_enhancement.
FILES
Type Action Edit File Name
------- -------- ------- -----------
source modify 1.9 -> 1.10 include/srec/input/file/srecord.h
source modify 1.12 -> 1.13 include/srec/output/file/srecord.h
source modify 1.16 -> 1.17 include/srec/record.h
source modify 1.14 -> 1.15 lib/srec/input/file/srecord.cc
source modify 1.6 -> 1.7 lib/srec/input/file/tektronix_
extended.cc
source modify 1.8 -> 1.9 lib/srec/input/file/wilson.cc
source modify 1.18 -> 1.19 lib/srec/memory.cc
source modify 1.8 -> 1.9 lib/srec/output/file/ascii_hex.cc
source modify 1.3 -> 1.4 lib/srec/output/file/dec_binary.cc
source modify 1.2 -> 1.3 lib/srec/output/file/emon52.cc
source modify 1.1 -> 1.2 lib/srec/output/file/fastload.cc
source modify 1.3 -> 1.4 lib/srec/output/file/four_packed_
code.cc
source modify 1.16 -> 1.17 lib/srec/output/file/intel.cc
source modify 1.8 -> 1.9 lib/srec/output/file/mos_tech.cc
source modify 1.3 -> 1.4 lib/srec/output/file/signetics.cc
source modify 1.15 -> 1.16 lib/srec/output/file/srecord.cc
source modify 1.18 -> 1.19 lib/srec/output/file/tektronix.cc
source modify 1.7 -> 1.8 lib/srec/output/file/tektronix_
extended.cc
source modify 1.9 -> 1.10 lib/srec/output/file/ti_tagged.cc
source modify 1.10 -> 1.11 lib/srec/output/file/wilson.cc
source modify 1.9 -> 1.10 man/man5/srec_motorola.5
HISTORY
What When Who Comment
------ ------ ----- ---------
new_change Thu May 9 pmiller
08:59:38 2002
develop_begin Thu May 9 pmiller Elapsed time: 0.071
08:59:38 2002 days.
Project "srecord.1.9", Change 17 Page 2
Change Details Fri Jun 14 09:10:11 2002
What When Who Comment
------ ------ ----- ---------
develop_end Thu May 9 pmiller
09:31:38 2002
review_pass Thu May 9 pmiller
09:31:42 2002
integrate_begin Thu May 9 pmiller
09:31:46 2002
integrate_pass Thu May 9 pmiller
09:33:48 2002
Project "srecord.1.9", Change 18 Page 1
Change Details Fri Jun 14 09:10:11 2002
NAME
Project "srecord.1.9", Delta 7, Change 18.
SUMMARY
seek less on binary files
DESCRIPTION
This change causes srec_cat to seek less when it outputs to
binary files. This was not a problem for regular files, but it
made a mess when piping the standard output to some other
program (you can't seek on pipes). Most of the the the seeks
were unnecessary, so they are avoided whenever possible.
My thanks to Stuart Warren <Stuart.WARREN@dds.delphiauto.com>
for this suggestion.
This change must pass a full regression test. This change is
exempt from testing against the development directory. This
change is exempt from testing against the baseline.
ARCHITECTURE
This change must build and test in the "linux-i486"
architecture.
CAUSE
This change was caused by external_improvement.
FILES
Type Action Edit File Name
------- -------- ------- -----------
source modify 1.20 -> 1.21 include/srec/output/file.h
source modify 1.21 -> 1.22 lib/srec/output/file.cc
HISTORY
What When Who Comment
------ ------ ----- ---------
new_change Tue Jun 11 pmiller
11:39:41 2002
develop_begin Tue Jun 11 pmiller Elapsed time: 0.053
11:39:41 2002 days.
develop_end Tue Jun 11 pmiller
12:03:44 2002
review_pass Tue Jun 11 pmiller
12:03:47 2002
integrate_begin Tue Jun 11 pmiller
12:03:50 2002
integrate_pass Tue Jun 11 pmiller
12:05:07 2002
Project "srecord.1.9", Change 19 Page 1
Change Details Fri Jun 14 09:10:11 2002
NAME
Project "srecord.1.9", Delta 8, Change 19.
SUMMARY
intel hex
DESCRIPTION
This change updates the Intel Hex format to emit the first
(usually redundant) extended linear address record (type 4)
before the first file data. Previously it was omitted until the
2nd 64K was accessed.
My thanks to Stuart Warren <Stuart.WARREN@dds.delphiauto.com>
for reporting this problem.
This change must pass a full regression test. This change is
exempt from testing against the baseline.
ARCHITECTURE
This change must build and test in the "linux-i486"
architecture.
CAUSE
This change was caused by external_bug.
FILES
Type Action Edit File Name
------- -------- ------- -----------
source modify 1.2 -> 1.3 etc/new.1.9.so
source modify 1.6 -> 1.7 etc/template/cc
source modify 1.15 -> 1.16 lib/srec/input/file/intel.cc
source modify 1.17 -> 1.18 lib/srec/output/file/intel.cc
test modify 1.8 -> 1.9 test/00/t0003a.sh
test modify 1.6 -> 1.7 test/00/t0007a.sh
test modify 1.6 -> 1.7 test/00/t0032a.sh
HISTORY
What When Who Comment
------ ------ ----- ---------
new_change Fri Jun 14 pmiller
08:26:37 2002
develop_begin Fri Jun 14 pmiller Elapsed time: 0.084
08:26:37 2002 days.
develop_end Fri Jun 14 pmiller
09:04:33 2002
review_pass Fri Jun 14 pmiller
09:04:35 2002
integrate_begin Fri Jun 14 pmiller
09:04:37 2002
integrate_pass Fri Jun 14 pmiller
09:05:47 2002
|