Results for: fpga

Questa Verification is the first verification platform with a UVM-aware debug solution that provides engineers essential information about the operation of their dynamic class-based testbenches in the familiar context of source code and waveform viewing. The Questa verification solution is an assemblage of technologies, methodologies, and libraries for modern ASIC and FPGA designs. Questa continues to evolve in response to the growing complexity of SoC designs. Insight and updates on concepts, values, standards, methodologies, and examples to assist with the understanding of what advanced functional verification technologies can do and how to most effectively apply them. The Verification Horizons publication provides concepts, values, methodologies and examples to assist with the understanding of what advanced functional verification technologies can do and how to most effectively apply them.

...LabWindows/CVI includes tools for advanced debugging, code documentation, and system deployment so you can integrate source code control, requirements, and data management systems. The software also makes it easier to quickly acquire data from GPIB, USB, serial, Ethernet, PXI, VXI, and FPGA instruments using the built-in instrument I/O libraries, built-in instrument drivers, or the two interactive measurement assistants. LabWindows/CVI provides an all in one work environment for ANSI C development to create test and measurement applications.

OpenCL (Open Computing Language) is an open, royalty-free standard for cross-platform parallel programming of heterogeneous computing systems that lets developers accelerate computing tasks by leveraging diverse processors such as CPUs, GPUs, DSPs, and FPGAs across supercomputers, cloud servers, personal computers, mobile devices, and embedded platforms. It defines a programming framework including a C-based language for writing compute kernels and a runtime API to control devices, manage memory, and execute parallel code, giving portable and efficient access to heterogeneous hardware. ...

SYCL is an open, royalty-free, cross-platform programming standard defined by the Khronos Group that enables heterogeneous and offload computing in modern ISO C++ by providing a single-source abstraction layer where host and device code coexist in the same C++ source and can target a wide range of devices such as CPUs, GPUs, FPGAs, and other accelerators. It is a C++ API and abstraction designed to make heterogeneous computing more productive and portable by using standard language features such as templates, inheritance, and lambda expressions so developers can write and manage data and execution across diverse hardware without resorting to proprietary languages or extensions. ...

...Instead of writing thousands of lines of code by hand, automatically generate production-quality C and HDL code that behaves the same way as the model you created in Simulink. Then deploy it directly onto your embedded processor or FPGA/ASIC.

...There’s no need to rewrite your code or learn big data programming and out-of-memory techniques. Automatically convert MATLAB algorithms to C/C++, HDL, and CUDA code to run on your embedded processor or FPGA/ASIC. MATLAB works with Simulink to support Model-Based Design.