Search Results for "ic design"
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Showing 24 open source projects for "ic design"
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MongoDB Atlas runs apps anywhereMongoDB Atlas gives you the freedom to build and run modern applications anywhere—across AWS, Azure, and Google Cloud. With global availability in over 115 regions, Atlas lets you deploy close to your users, meet compliance needs, and scale with confidence across any geography.
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Yeastar: Business Phone System and Unified CommunicationsUser-friendly, optimized, and scalable, the Yeastar P-Series Phone System redefines business connectivity by bringing together calling, meetings, omnichannel messaging, and integrations in one simple platform—removing the limitations of distance, platforms, and systems.
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PICSimLab - Prog. IC Simulator Lab.
PICSimLab is a realtime emulator for PIC, Arduino, STM32, ESP32, ...
PICSimLab is a realtime emulator of development boards with MPLABX/avr-gdb debugger integration. PICSimLab supports microcontrollers from picsim, simavr, uCsim, qemu-stm32, qemu-esp32, and gpsim. PICSimLab has integration with MPLABX/Arduino IDE for programming the microcontroller's boards. As the purpose of PICSimLab is to emulate real hardware it does not have any source code editing support. For code editing and debugging the same tools used for a real board should be used with PICSimLab,...">
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XSCHEM
Schematic circuit editor for VLSI and Mixed mode circuit simulation.
Xschem is a schematic capture program, it allows to create a hierarchical representation of circuits with a top down approach . By focusing on interconnections, hierarchy and properties a complex system (IC) can be described in terms of simpler building blocks. A VHDL, Verilog or Spice netlist can be generated from the drawn schematic, allowing the simulation of the circuit. Key feature of the program is its drawing engine written in C and using directly the Xlib drawing primitives; this... -
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This project provides a analog / mixed signal IC schematic capture and layout tool with the accompanying netlisters, simulators, and verification tools.
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GDS3D
Interactive 3D Layout Viewer for GDSII
GDS3D is a cross-platform 3D hardware accelerated viewer for chip layouts. Read standalone GDS files or use the Cadence plugin for easy integration with your Virtuoso environment. Developed by PhDs of the IC-Design Group, University of Twente, The Netherlands The GDS3D project is also hosted on Github: https://github.com/icdut24/GDS3D, but currently not actively maintained by us. Forks can be found at https://github.com/trilomix/GDS3D and https://github.com/skuep/GDS3D -
Planview is the leading end-to-end platform for Strategic Portfolio Management (SPM) and Digital Product Development (DPD)Planview AdaptiveWork (formerly Clarizen) with embedded AI helps you proactively plan and deliver any type and size of portfolio, project, and work. Gain AI-enhanced visibility and insights, drive collaboration, and achieve better business outcomes across your organization.
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Digital Logic Design
Digital Circuits Design and Simulation
...You may even use SOP expressions to generate digital circuits in IC form. You can use this software to design Combinational, Synchronous and Asynchronous Sequential Circuits. The circuit working can be analyzed by using output parts like LEDs, Seven Segment Display as well as CRT and digital Oscilloscope all provided in the software. This Software may be used by professionals, hobbyists and students alike.">
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ePnR
ePnR is an IC block standard cell placement & routing tool
ePnR is a simple Integrated Circuit (IC) block standard cell placement & routing tool. ePnR currently supports only circuit blocks using equal height standard cells arranged in one or more channels of user configurable length. Standard cells are described in a simple text based library (compliant with eLogSim). Placement follows initially the cell call order in the SPICE like circuit input netlist. However, a placement optimization, aiming at minimum weighted accumulated wire length, by... -
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L-ink_Card
Smart NFC & ink-Display Card
...Because it uses e-ink, the card can display static content with minimal power drain, making it practical for real-world card use. The repository includes board design files, firmware, and supporting software for customizing what the card shows. For hardware hackers and smart-card enthusiasts, it’s a fascinating hybrid of microcontroller, low-power display, and NFC tech in a familiar credit-card size. -
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Integrated Circuit Design Software that quickly automates design of analog and digital circuits for use in schematics, device modelling, design re-use, architecture, signal processing and IC manufacture.
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pr0ntrace
Integrated circuit digitization
Collaborates converting microscope die images into original IC design files -
See what everyone is allocated to. Projects, clients, meetings - all in one tool.Designed to replace clunky, old scheduling spreadsheets, Resource Guru helps managers get organized fast. The platform covers resource planning, resource scheduling, resource management, staff leave management, reporting, and more.
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Caneda
Caneda (Circuits and Networks EDA) is an open source EDA software.
Caneda (Circuits and Networks EDA) is an open source EDA software focused on easy of use and portability. While in the short term schematic capture and simulation is the primary goal, in the long term future, PCB and layout edition will be covered. -
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This is a collection of (hopefully) useful productivity enhancements of Mentor Graphics IC-Station tools
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Spider PCB
Hierarchical Schematic and PCB
This project is in a pre-alpha stage and is intended to give a rough idea about the final program. It does not do much more than draw pretty pictures. Hierarchical circuit layout is commonplace amongst IC designers, but Spider PCB brings hierarchical layout to the PCB industry. Not only is the schematic hierarchical, but also the layout. Ever wanted to lay out a 16-band equaliser, with 5 sound channels? Lots of copying and pasting on the PCB-side. Just imagine if you could lay out one... -
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A IC/MEMS layout editor. Features: all angle, font generator, macros, boolean operations, design rule checker, supported formats:Calma GDSII, OASIS (Open Artwork System Interchange Standard), OpenAccess, DXF, CIF (Caltech Intermediate Form), ...
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IC on Bread
A easy to use Digital IC prototyping software
IC on Bread is a simulation of Digital Integrated Circuits on a Breadboard. Interface is kept easy, fun and natural. It is targeted for beginners, students, hobbyists, and to a extent professionals in IC design. -
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graphICs
graphICs is a converter transforming GDS II-data to Asymptote-code
graphICs is used to visualize IC-layout-data from GDS II-files. It reads a stream of GDS II-records, optimizes it by removing objects smaller than a user-defined minimal size an writes it to Asymptote-code. This code can be translated via Asymptote to PDF, PNG or other formats. The output can be specified to be printed on an A-format paper, portrait or landscape, top/right, center or bottom/left align. -
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Bliss synthesizes logic circuits in BLIF format to an equivalent SPICE netlist. Bliss is intended for use in mixed signal IC design and VLSI research.
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This project design the universal smart card (IC card) issue system based on smart card personalization machine such as DATACARD 7000/9000 and other vendor's personalization machines to faciliate the software development of smart card personalization
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The comprehensive C++ library MGEN for IC layout and connectivity comes with the X11/Motif full custom layout editor PARIS and the powerful waveform viewer/processor MANIAC. Industry proven, it is the basis for layout generators, placers, routers etc.
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This project is developed for Full Customer Design Enviroment. Schematic Entry/SPICE/SPICE(RF)/Layout/Verilog-AMS Via /Verilog Via Will be included.
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Digital circuit simulator with an own IC-scripting-language, programmed in Visual C++ 2003.net, currently only available for Windows. Major technical goals: Creation of a bugfree interface and effective signal simulation. All config-files in txt-format.
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IC CAD tools, documentation, scripts, and libraries for designing high-performance ICs, including SUE for schematics, MAX for layouts, DPC for datapaths and MCC for megacells. Prebuilt binaries for Linux, Sparc-Solaris, and HP-PA.
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A static timing analysis program written in C++. Cadence LEF/DEF definitions of circuit geometry and SDF definitions of circuit timing data of a synchronous circuit are compiled in order to generate timing constraints for non-zero skew circuit operation.
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Various scripts for several EDA tools such as: RTL Compiler, spyglass, lec, temposync, etc. Scripts are useful in IC design.
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