Search Results for "memory"

Maxima is a computer algebra system comparable to commercial systems like Mathematica and Maple. It emphasizes symbolic mathematical computation: algebra, trigonometry, calculus, and much more. For example, Maxima solves x^2-r*x-s^2-r*s=0, giving the symbolic results [x=r+s, x=-s]. It can also calculate with exact integers and fractions, native floating-point, and high-precision big floats. Maxima has user-friendly front-ends, an online manual, plotting commands, and numerical...

...One can create IP-XACT Component, Design or Registers by importing Ip in System Verilog/Verilog-95/VHDL, instantiate Bus Interfaces with proper port maps and attributes as needed. Smart GUI to create IP-XACT Registers, Memory Maps, Address Blocks for IP- has feature to import XLS or Verilog . It has Tcl/Python API support. ipxact2verilog - Generate Verilog module from IP-XACT definition ipxact2vhdlentity - Generate VHDL entity from IP-XACT Component definition verilog2ipxact - Generates IP-XACT definition from Verilog modules vhdl2ipxact - Generates IP-XACT definition from VHDL source ipxactcoherencycheckerverilog / ipxactcoherencycheckervhdl - Validates IP-XACT Component definition with RTL validateipxact - IP-XACT Linting tool

...Hierarchy Manipulation to create Power Domain, Voltage Domain, comply with Floor planning 8.a. Insert new hierarchy 8.b. Remove existing hierarchy 9. Associate the IP-XACT memory maps with the SoC component instances 10. Dump out the C Model for the entire design 11. Glue-Logic insertion 12. Spare port insertion across hierarchies 13. Automatic creation of the top module and it's ports based upon specified rule 14. Creates stub module

Platform for advanced open source IP-Core development, i. e. dynamic memory controllers for FPGAs.

TArray is a Tcl extension that implements typed arrays. The primary motivation is to minimize memory usage and parallelize operations when dealing with large data sets. TArray provides a raw array data type that can then be scripted to provide more sophisticated collection structures.

ixbar3000 is a frontend, it allows you to browse/launch games from a centralized place. While doing so it’ll keep statistics on your usage. You can also use it to store highscores on games that doesn’t have battery memory. Demo videos: http://www.youtube.com/playlist?list=PLsYn7B5Y4pDxKzEfZSIqlG62yswJXgBu2&feature=plcp

iTclC is a framework for [incr Tcl]. It makes Itcl more flexible. Provides: memory management and mechanisms for creating user interfaces. Not yet suitable for developing professional applications with - of course it is a very basic framework.

In-memory channels for Tcl. Chunks and fifos.

Covered is a Verilog code coverage utility using VCD/LXT/FST dumpfiles (or VPI interface) and the design to generate line, toggle, memory, combinational logic, FSM state/arc and assertion coverage report metrics viewable via GUI or ASCII format. This project is ported to github and can be found at: https://github.com/chiphackers/covered

A Tcl interface to the POSIX mmap(2) system call. It provides a Tcl package that allows Tcl scripts to: 1) Memory map files for improved access efficiency; 2) Share memory between related processes; 3) Easily implement cyclic persistent log files.

Efficient Symbolic Tools package (EST) is a BDD based tool for the formal verification of concurrent systems. Its advantages are flexibility, portability and an efficient memory management. It runs under different OS, including Linux and Windows 2000/XP.