Search Results for "compiler design"
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Showing 16 open source projects for "compiler design"
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Unicorn Engine
Unicorn CPU emulator framework (ARM, AArch64, M68K, Mips, Sparc
...Implemented in pure C language, with bindings for Pharo, Crystal, Clojure, Visual Basic, Perl, Rust, Haskell, Ruby, Python, Java, Go, D, Lua, JavaScript, .NET, Delphi/Pascal & MSVC available. Native support for Windows & *nix (with macOS, Linux, Android, *BSD & Solaris confirmed). High performance by using the Just-In-Time compiler technique. Support fine-grained instrumentation at various levels. Thread-safe by design. Distributed under free software license GPLv2. Another significant change on this version is the addition of some new APIs to allow better control on how the core engine works. -
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Perf Book
The book "Performance Analysis and Tuning on Modern CPU"
...It explains how caches, TLBs, prefetchers, branch predictors, and out-of-order execution influence real program speed, then connects those concepts to concrete optimization strategies. Readers learn how to design trustworthy benchmarks, avoid measurement traps (warmup, turbo, frequency scaling), and interpret hardware performance counters. The book walks through vectorization, memory layout, data-oriented design, and algorithmic choices, illustrating when compiler flags, intrinsics, or hand-rolled assembly make sense. It also demonstrates tool-driven workflows—using profilers and PMU events—to locate true bottlenecks and validate that changes actually help. ... -
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F´
A flight software and embedded systems framework
F´ (or F Prime) is a software framework for the rapid development and deployment of embedded systems and spaceflight applications. Originally developed at NASA’s Jet Propulsion Laboratory, F´ is open-source software that has been successfully deployed for several space applications. It has been used for but is not limited to, CubeSats, SmallSats, instruments, and deployable. Component architecture with well-defined interfaces. To develop applications with F´, the following requirements of... -
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AWS EC2 FPGA
AWS EC2 FPGA hardware and software development Kit
AWS EC2 FPGA Development Kit is a set of development and runtime tools to develop, simulate, debug, compile and run hardware-accelerated applications on Amazon EC2 F1 instances. It is distributed between this GitHub repository and FPGA Developer AMI - Centos/AL2 provided by AWS with no cost of development tools. After creating an FPGA design (also called CL - Custom logic), developers can create an Amazon FPGA Image (AFI) and easily deploy it to an F1 instance. AFIs are reusable, shareable and can be deployed in a scalable and secure way. Development experience leverages an optimized compiler to allow easy new accelerator development or migration of existing C/C++/openCL, Verilog/VHDL to AWS FPGA instances. ... -
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Snap7
32/64 bit multi-platform Ethernet S7 PLC communication suite
Snap7, through three specialized components: Client and the inedited Server and Partner, allows you to definitively integrate your PC based systems into a PLC automation chain. Designed to transfer large amounts of hi-speed data in industrial facilities, it scales easily, down to small Linux Arm boards such as Raspberry PI. Hi level object oriented wrappers are provided, currently C/C++, .NET/Mono, Pascal, LabVIEW, Python with many source code examples. Very easy to use, a full...">
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System Programming Roadmap
A roadmap to teach myself compiler dev, malware reverse engineering
system-programming-roadmap is a curated roadmap and resource guide designed to help learners navigate the complex world of system-level programming. It aggregates high-quality tutorials, books, project ideas, and documentation links related to topics such as operating systems, file systems, kernel development, networking, and compilers. This repository is ideal for beginners looking to structure their learning or for experienced developers seeking to expand their knowledge in a structured... -
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OpenShader
Open architecture GPU simulator and implementation
Documentation, simulator, compiler, and Verilog implementation of a completely open-architecture graphics processing unit. This design is intended for academic and commercial purposes. The first step is to develop a detailed GPU simulator and compiler. The second step is to implement the GPU in synthesizable Verilog. The third step is to develop a feedback loop between the simulator and implementation, allowing power, performance, and reliability aspects of the hardware to feed back into ever more detailed and accurate simulations of a complete GPU. ... -
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ACPUProject
ACPU Emulation and Design
In this project I'll try to reinvent the wheel by designing the ACPU. In this Project I'll upload the official Emulator, Compiler and Docs -- !!! Anouncment !!! -- Searching Developer for USBSupport and one for OSDev -- !!! Anouncment !!! -- -
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LiteASM
Light Weight & Customizable Assembly Compiler & Virtual Machine
LiteASM is a light weight and reconfigurable Assembly language compiler and Virtual Machine. It is specially design for embedded systems to use as a portable script interface. -
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ASDM-NoC
Asynchronous Spatial Division Multiplexing Router for On-Chip Networks
...Features: * 5-port router for mesh network (0 south, 1 west, 2 north, 3 east, 4 local) * The dimension order routing (XY routing) * Available flow control methods: wormhole, SDM, VC * Reconfigurable number of virtual circuits, buffer size, data width * Fully synthesizable router implementation * SystemC testbench provided Languages: * Routers are written in synthesizable SystemVerilog * Test benches are provided by SystemC Software requirements: * The open source Nangate 45nm cell library * Synopsys Design Compiler (Synthesis) * Cadence IUS -- NC Simulator (for SystemC/Verilog co-simulation) -
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FpgaC compiles a subset of the C language to net lists which can be imported into an FPGA vendors tool chains. C provides an excellent alternative to VHDL/Verilog for algorithmic expression of FPGA reconfigurable computing tasks. More info in wiki.
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Open Embedded Real Time Operating System. Widely and graphically configurable from a very small non-preemtive OS up to a fully featured pre-emptive system. First target is to cover 8-bit AVR microncotroller's family with GCC - AVR compiler.
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SimpleAVROS is RTOS designed special for AVR microcontrollers. Supported Compiler - AVR Studio. Language - Assembly. This is RTOS consist of source code. Supported microcontrollers - ATmega48; In the future- ATmega88/168, ATmega164/324/644, AT90usb82/162
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MEDDAC is the seeding point for designing a new approach to Operating System design itself. It is an Open Source project with roots in mainframe design and development the author began in 1979. Monitor Editor Disassembler Decompiler Assembler Compiler
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SDL REFLEX is the micro kernel of a real time operating system for the AVR microcontroller family. The kernel is especially designed to implement systems described in SDL The Specification and Description Language . Compiler GNU ANSI-C for AVR v.3.3
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RSTK is a C language program that generates Reed-Solomon HDL source code modules that can be compiled and synthesized using standard VHDL or Verilog compilers and synthesis tools.
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