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WO2002067359A1 - Circuit de traitement de signaux - Google Patents

Circuit de traitement de signaux Download PDF

Info

Publication number
WO2002067359A1
WO2002067359A1 PCT/JP2002/001393 JP0201393W WO02067359A1 WO 2002067359 A1 WO2002067359 A1 WO 2002067359A1 JP 0201393 W JP0201393 W JP 0201393W WO 02067359 A1 WO02067359 A1 WO 02067359A1
Authority
WO
WIPO (PCT)
Prior art keywords
signal
circuit
phase shifter
frequency
processing circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2002/001393
Other languages
English (en)
Japanese (ja)
Inventor
Yuji Nakagawa
Keizou Miyamoto
Yasuo Nitani
Hideaki Fujiura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electronic Components Co Ltd
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electronic Components Co Ltd, Sanyo Electric Co Ltd filed Critical Sanyo Electronic Components Co Ltd
Publication of WO2002067359A1 publication Critical patent/WO2002067359A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00—Auxiliary devices
    • H01P1/20—Frequency-selective devices, e.g. filters
    • H01P1/213—Frequency-selective devices, e.g. filters combining or separating two or more different frequencies
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/46—Networks for connecting several sources or loads, working on different frequencies or frequency bands, to a common load or source

Definitions

  • the present invention relates to a signal processing circuit for receiving signals of a plurality of different bands and an information terminal device including the same.
  • Fig. 6 shows a system (70) in which the above circuit is applied to a mobile phone terminal device.
  • the mobile phone device shown in this example uses three band signals, namely, a digital cellular system (DCS) using the 180 MHz band used in Europe and a 190 MHz band used in North America.
  • DCS digital cellular system
  • the system (70) consists of an antenna ANT, a diplexer (41), a first transmitting / receiving circuit (20) that inputs and outputs either the DCS or PCS signal on the high frequency side, and inputs and outputs a GSM signal on the low frequency side Consists of the second transmission / reception circuit (30) Is done.
  • the diplexer (41) separates the signal input from the antenna ANT into one of the DCS or PCS signal whose center frequency band is close on the high frequency side and the GSM signal on the low frequency side. One of these signals is output to the first transmission / reception circuit (20), and the GSM signal is output to the second transmission / reception circuit (30). Further, either the signal DCS or the signal PCS input from the first transmitting / receiving circuit (20) and the signal GSM input from the second transmitting / receiving circuit (30) are combined and transmitted from the antenna MT.
  • the first transmitting / receiving circuit (20) includes a first switching circuit (21) for performing transmission / reception distribution according to the control signal VC1, and a first receiving circuit (11) connected to the first switching circuit (21). And a first transmission circuit ( ⁇ ).
  • the switching circuit (74) is operated by the control signal VC as described later. If the received signal of the first transmission / reception circuit (20) is a DCS signal, the switching circuit (74) is switched to the receiving section RX d and the DCS signal is switched to the receiving section RX d If the received signal is a PCS signal, the signal is switched to the receiving unit RXp and the PCS signal is output from the receiving unit Rxp.
  • either the DCS signal or the PCS signal to be transmitted is input from the transmission unit TX dp to the first transmission circuit (23), passes through the first switching circuit (2 1) and the diplexer (41), and passes through the antenna. Sent from ANT.
  • the second transmission / reception circuit (30) also performs a second transmission / reception distribution by the control signal VC2, a second reception circuit (32) connected to the second switching circuit, and a second transmission / reception circuit (32). It is composed of a circuit (33).
  • GSM signal input from the diplexer (41) to the second transmitting / receiving circuit (30) Is input to the second receiving circuit (32) through the second switching circuit (31), and is output from the receiving unit R xg.
  • the GSM signal to be transmitted is input from the transmission unit T Xg to the second transmission circuit (33), and is transmitted from the antenna ANT through the second switching circuit (31) and the diplexer (41).
  • the first receiving circuit (11) includes a switching circuit (74) and two passband filters (2) (4) (hereinafter, referred to as “SAW filters”).
  • SAW filters Two passband filters (2) (4)
  • One of the S AW filters (2) and (4) is a DCS band-pass type, and the other (4) is a PCS band-pass type.
  • the switching circuit (74) switches the selection of the S AW filters (2) and (4) to be connected by the control signal VC.
  • the S AW filter for the DCS is switched by the control signal VC.
  • the switching circuit (74) itself has a function of distributing signals by the control signal VC, and the SAW filter (2) (4) also has a function of passing only a predetermined band signal. Therefore, the signal is separated in two stages, and the functions are duplicated.
  • the switching circuit (74) is generally composed of a diode switch, but the diode cannot be formed directly on the substrate and must be mounted on the substrate. was there.
  • An object of the present invention is to provide a signal processing circuit which does not need to distribute signals by switching, can be used for an information terminal, and can achieve downsizing, power saving and simplification of a circuit. Disclosure of the invention
  • a signal processing circuit includes a first signal path in which a first phase shifter and a first pass band filter are connected in series, a second phase shifter and a second pass band filter. And a second signal path in which the first and second signal paths are connected in series, and the first signal path and the second signal path are connected in parallel.
  • the first phase shifter and the second phase shifter have a function of converting an input signal into signals having phases opposite to each other,
  • the first passband filter and the second passband filter are characterized by having passband characteristics whose center frequencies are close to each other.
  • the signal processing circuit may use a DCS (digital cellular system) using the 180 MHz band on the first signal path, and a PCS (e.g., ij) using the 900 MHz band on the second signal path. It is used as a receiving circuit for receiving personal communications services).
  • DCS digital cellular system
  • PCS PCS
  • a signal input to the signal processing circuit (for example, a signal in an area where DCS is used) is passed through a first signal path through a pass band defined by a first phase shifter and a first pass band filter. Pass the frequency f1 with low loss, and in the second signal path, the second phase shifter and the second passband filter pass through the frequency band f2 which is a frequency near the frequency band f1 with reverse phase shift and low loss.
  • the frequency band f 1 the side close to f 2 is sharp
  • a signal having a frequency characteristic attenuated in the above manner can be formed. That is, the frequency characteristics can be obtained such that the output of the frequency ⁇ 1 is maximized and the frequency f2 near f1 is minimized.
  • the input signal is mainly at the band frequency f2 (for example, when used in the PCS area), it is possible to obtain a characteristic in which the frequency f2 is the maximum output and the frequency f1 is attenuated.
  • the selectivity of the adjacent f1 and f2 with respect to each other is increased, so that it is easy to select the desired frequency and a receiver that is strong against noise etc. is configured. it can.
  • the signal processing circuit does not require a control signal VC for switching and switching for signal distribution, one signal can be reduced as a system, and power consumption due to switching is not required. Can be.
  • first and second phase shifters can be patterned directly on the board, the number of elements mounted on the board can be reduced as compared with the conventional case, and the system can be downsized and simplified.
  • FIG. 1 is a circuit block diagram of the present invention.
  • FIG. 2 is a circuit diagram showing one embodiment of the information terminal device of the present invention.
  • FIG. 3 is a frequency output characteristic diagram of the signal processing circuit of the present invention.
  • FIG. 4 is a frequency output characteristic diagram of the signal processing circuit of the present invention.
  • FIG. 5 is a conventional circuit block diagram.
  • FIG. 6 is a circuit diagram showing one embodiment of a conventional information terminal.
  • FIG. 7 is a diagram illustrating frequency characteristics and impedance distribution of the first signal processing circuit of the present invention.
  • FIG. 8 is a diagram showing frequency output and impedance distribution of the second signal processing circuit of the present invention.
  • FIG. 9 is a graph showing a conventional waveform after passing through a filter.
  • FIG. 10 is a graph showing a conventional waveform after passing through a filter.
  • a signal including a certain frequency band from the outside is input to an input terminal (7).
  • the first signal path (5) is a path for extracting the frequency band f1
  • the second signal path (6) is a path for extracting the frequency band f2 near the frequency passing through the first signal path.
  • FIG. 2 shows an example in which the present invention is used as an information terminal such as a mobile phone. Note that the same reference numerals are given to the configurations described in FIG. 6 described above, and description thereof will be omitted.
  • the characteristics of the first phase shifter (1) and the first S AW filter (2) are as follows: frequency band: f1 (for example, DCS band signal: 1805 to 188 MHz)
  • frequency band f1 (for example, DCS band signal: 1805 to 188 MHz)
  • the impedance becomes 50 ⁇ (indicated by point ⁇ ; 1 in the figure), and for the signal in the PCS band (1930 to 199 MHz), the high impedance (point in the figure) (Indicated by 2).
  • the characteristics of the second phase shifter (3) and the second S AW filter (4) show that the impedance is 5 for the PCS band (1930 to 199 MHz). 0 ⁇ (indicated by point iS 1 in the figure), and designed so that the signal in the DCS band (1805 to: 880 MHz) becomes high impedance (indicated by point 2 in the figure) Have been.
  • the first phase shifter passes the frequency band f 1 with low loss and the first pass
  • the frequency band: f1 is selectively extracted by a bandpass filter (SAW filter).
  • the circuit is configured so that the second phase shifter is in phase shift with respect to the first phase shifter, and the second pass band filter (SAW filter) is applied to the frequency band f 1.
  • the adjacent frequency band f2 is selectively passed, and the second signal path passes through the frequency band f2, which has a phase shift opposite to that of the first signal path.
  • the output signal between the frequency f 1 and the frequency f 2 becomes a steep signal. That is, the frequency characteristics of the input signal after passing through the receiving circuit are as shown in FIG. On the other hand, when the input frequency is f2 (for example, when used in the PCS area), the same applies to FIG.
  • the signal processing circuit of the present invention it is possible to configure a receiver that can select a desired frequency, is resistant to noise and the like.
  • the signal processing circuit of the present invention can be used for information terminals such as mobile phones.

Landscapes

  • Transceivers (AREA)
  • Control Of Motors That Do Not Use Commutators (AREA)
  • Waveguide Switches, Polarizers, And Phase Shifters (AREA)

Abstract

L'invention concerne un circuit de traitement de signaux qui rend superflue la séparation des signaux par commutation, et qui permet de réduire leur taille, d'économiser de l'énergie et de simplifier ledit circuit. Un premier (1) et un second (3) décaleurs de phase possèdent une fonction de conversion de signaux d'entrée en signaux dont les phases sont inversées les unes par rapport aux autres, et un premier (2) et un second (4) filtres passe-bande possèdent des caractéristiques de passe-bande telles que les fréquences centrales sont proches les unes des autres.
PCT/JP2002/001393 2001-02-19 2002-02-18 Circuit de traitement de signaux Ceased WO2002067359A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2001-041412 2001-02-19
JP2001041412A JP2002246809A (ja) 2001-02-19 2001-02-19 信号処理回路

Publications (1)

Publication Number Publication Date
WO2002067359A1 true WO2002067359A1 (fr) 2002-08-29

Family

ID=18903861

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2002/001393 Ceased WO2002067359A1 (fr) 2001-02-19 2002-02-18 Circuit de traitement de signaux

Country Status (2)

Country Link
JP (1) JP2002246809A (fr)
WO (1) WO2002067359A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109301457A (zh) * 2018-10-15 2019-02-01 京信通信系统（中国）有限公司 基站天线及其馈电网络系统

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3919194B2 (ja) * 2003-08-11 2007-05-23 ソニー・エリクソン・モバイルコミュニケーションズ株式会社 フロントエンドモジュール
US20080242344A1 (en) * 2004-03-01 2008-10-02 Sanyo Electric Co., Ltd. Isolation Trap Circuit, Antenna Switch Module, and Transmission Circuit

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04196829A (ja) * 1990-11-28 1992-07-16 Hitachi Ltd 分波装置およびそれを用いた移動無線機
JPH09270604A (ja) * 1996-03-29 1997-10-14 Oki Electric Ind Co Ltd 分波器パッケ−ジ
JPH10270914A (ja) * 1997-03-25 1998-10-09 Oki Electric Ind Co Ltd ストリップ線路及び分波回路

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04196829A (ja) * 1990-11-28 1992-07-16 Hitachi Ltd 分波装置およびそれを用いた移動無線機
JPH09270604A (ja) * 1996-03-29 1997-10-14 Oki Electric Ind Co Ltd 分波器パッケ−ジ
JPH10270914A (ja) * 1997-03-25 1998-10-09 Oki Electric Ind Co Ltd ストリップ線路及び分波回路

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109301457A (zh) * 2018-10-15 2019-02-01 京信通信系统（中国）有限公司 基站天线及其馈电网络系统
CN109301457B (zh) * 2018-10-15 2023-09-05 京信通信技术(广州)有限公司 基站天线及其馈电网络系统

Also Published As

Publication number Publication date
JP2002246809A (ja) 2002-08-30

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