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TWI677269B - Method for electroplating circuit board structure in hole - Google Patents

Method for electroplating circuit board structure in hole Download PDF

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Publication number
TWI677269B
TWI677269B TW107130618A TW107130618A TWI677269B TW I677269 B TWI677269 B TW I677269B TW 107130618 A TW107130618 A TW 107130618A TW 107130618 A TW107130618 A TW 107130618A TW I677269 B TWI677269 B TW I677269B
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Taiwan
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current density
density value
circuit board
hole
current
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TW107130618A
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Chinese (zh)
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TW202011782A (en
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鄭國慶
Guo Qing Zheng
羅仕洋
Shiyang Luo
孫奇
Qi Sun
呂政明
Cheng Ming Lu
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健鼎科技股份有限公司
Tripod Technology Corporation
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Publication of TWI677269B publication Critical patent/TWI677269B/en
Publication of TW202011782A publication Critical patent/TW202011782A/en

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Abstract

本發明公開一種電路板結構的孔內電鍍方法,包含:實施一準備步驟:提供一電路板,並且所述電路板包含有一孔洞;其中,所述孔洞具有其孔深除以孔徑的一深寬比,並且所述深寬比不小於4;實施一第一電鍍步驟:以一第一電流對所述電路板的所述孔洞於一第一時段內進行電鍍,並且所述第一電流具有一第一電流密度值;以及實施一第二電鍍步驟:以一第二電流對所述電路板的所述孔洞於一第二時段內進行電鍍,並且所述第二電流具有一第二電流密度值;其中,所述第一電流密度值與所述第二電流密度值彼此相異、並且各介於4 ASF~60ASF。 The invention discloses a method for electroplating in a hole of a circuit board structure, which comprises: implementing a preparation step: providing a circuit board, and the circuit board includes a hole; wherein the hole has a depth and a width of the hole divided by a depth. And the aspect ratio is not less than 4; implementing a first plating step: plating the holes of the circuit board with a first current for a first period of time, and the first current has a A first current density value; and implementing a second electroplating step: electroplating the holes of the circuit board with a second current in a second period, and the second current has a second current density value Wherein, the first current density value and the second current density value are different from each other, and each is between 4 ASF and 60 ASF.

Description

電路板結構的孔內電鍍方法 In-hole plating method for circuit board structure

本發明涉及一種電路板,尤其涉及一種電路板結構的孔內電鍍方法。 The invention relates to a circuit board, in particular to a method for plating in a hole of a circuit board structure.

現有的電路板製造方法在進行電路板的孔洞電鍍時,皆是採用恆定的電流密度(也就是,電流密度保持定值),而為達到均勻電鍍的效果,所以現有電路板製造方法需要採用較小的電流密度來增加灌孔率,但上述較小電流密度則會使電鍍時間加長,因而降低電鍍效率。 Existing circuit board manufacturing methods use constant current density (that is, the current density is maintained at a constant value) when performing hole plating on circuit boards. In order to achieve the effect of uniform plating, the existing circuit board manufacturing methods need to use A small current density increases the rate of hole filling, but the above-mentioned smaller current density will increase the plating time and thus reduce the plating efficiency.

更進一步地說,現有電路板製造方法在對深寬比小於4的孔洞進行電鍍時,其對電鍍時間與電鍍效率的影響較不明顯,但隨著電路板的逐年發展,使得電路板需要形成有高深寬比之孔洞的比例也愈來愈高,所以現有電路板製造方法對於高深寬比之孔洞的電鍍方式也需要被進一步地改良。 Furthermore, when the existing circuit board manufacturing method is used to plate holes having an aspect ratio of less than 4, its influence on the plating time and the plating efficiency is less obvious, but with the development of the circuit board year by year, the circuit board needs to be formed. The ratio of holes with high aspect ratio is also getting higher and higher, so the current circuit board manufacturing method for the plating method of holes with high aspect ratio also needs to be further improved.

於是,本發明人認為上述缺陷可改善,乃特潛心研究並配合科學原理的運用,終於提出一種設計合理且有效改善上述缺陷的本發明。 Therefore, the present inventor believes that the above-mentioned defects can be improved, and with special research and cooperation with the application of scientific principles, he finally proposes an invention with a reasonable design and effective improvement of the above-mentioned defects.

本發明實施例在於提供一種電路板結構的孔內電鍍方法,其 能有效地改善現有電路板製造方法所可能產生的缺陷。 An embodiment of the present invention is to provide an in-hole plating method for a circuit board structure, which It can effectively improve the defects that may occur in the existing circuit board manufacturing methods.

本發明實施例公開一種電路板結構的孔內電鍍方法,包括:實施一準備步驟:提供一電路板,並且所述電路板包含有一孔洞;其中,所述孔洞具有其孔深除以孔徑的一深寬比,並且所述深寬比不小於4;實施一第一電鍍步驟:以一第一電流對所述電路板的所述孔洞於一第一時段內進行電鍍,並且所述第一電流具有一第一電流密度值;以及實施一第二電鍍步驟:以一第二電流對所述電路板的所述孔洞於一第二時段內進行電鍍,並且所述第二電流具有一第二電流密度值;其中,所述第一電流密度值與所述第二電流密度值彼此相異、並且各介於4 ASF~60ASF。 An embodiment of the present invention discloses a method for plating in a hole of a circuit board structure, which includes: implementing a preparation step: providing a circuit board, and the circuit board includes a hole; wherein the hole has a hole depth divided by a hole diameter. Aspect ratio, and the aspect ratio is not less than 4; implementing a first electroplating step: electroplating the holes of the circuit board in a first period with a first current, and the first current Has a first current density value; and implements a second plating step: plating the holes of the circuit board with a second current in a second period of time, and the second current has a second current Density value; wherein the first current density value and the second current density value are different from each other, and each is between 4 ASF and 60 ASF.

本發明實施例也公開一種電路板結構的孔內電鍍方法,包括:實施一準備步驟:提供一電路板,並且所述電路板包含有一孔洞;其中,所述孔洞具有其孔深除以孔徑的一深寬比,並且所述深寬比不小於4;以及依序實施N個電鍍步驟:每個所述電鍍步驟以一電流對所述電路板的所述孔洞進行電鍍,並且所述電流具有一電流密度值;其中,N為不小於2的正整數,並且N個所述電鍍步驟中包含有兩種以上的所述電流密度值,並且任一個所述電流密度值是介於4 ASF~60ASF;其中,當任兩個依序實施的所述電鍍步驟中,其所使用的兩個所述電流密度值之差值大於2 ASF時,實施一電流轉換步驟;其中,所述電流轉換步驟是以一階梯電流對所述電路板的所述孔洞於一轉換時段內進行電鍍,並且所述階梯電流具有一階梯電流密度值,而所述階梯電流密度值在所述轉換時段內、自所使用的兩個所述電流密度值中的實施在前之所述電流密度值逐漸變更至實施在後之所述電流密度值;其中,所述轉換時段介於0~20分鐘。 An embodiment of the present invention also discloses a method for plating in a hole of a circuit board structure, which includes: implementing a preparation step: providing a circuit board, and the circuit board includes a hole; wherein the hole has a hole depth divided by An aspect ratio, and the aspect ratio is not less than 4; and sequentially performing N electroplating steps: each of the electroplating steps electroplating the holes of the circuit board with a current, and the current has A current density value; wherein N is a positive integer not less than 2, and the N number of the electroplating steps includes more than two types of the current density value, and any one of the current density values is between 4 ASF ~ 60ASF; wherein, when the difference between the two current density values used in any two of the electroplating steps sequentially performed is greater than 2 ASF, a current conversion step is performed; wherein, the current conversion step The holes of the circuit board are plated with a step current in a conversion period, and the step current has a step current density value, and the step current density value is in the conversion period The current density of the first two from the current density values used in the embodiment to embodiment gradually changes the value of the current density; wherein said transition period between 0 to 20 minutes.

綜上所述,本發明實施例所公開之電路板結構的孔內電鍍方法,其採用的多個電鍍步驟(如:第一電鍍步驟與第二電鍍步驟)能通過使用介於4 ASF~60ASF且彼此相異的電流密度值,藉以在 盡可能兼顧灌孔率的前提下,有效地提升電鍍效率與電鍍效果(如:達到較佳的灌孔率)。 In summary, in the method for in-hole electroplating of the circuit board structure disclosed in the embodiments of the present invention, multiple electroplating steps (such as the first electroplating step and the second electroplating step) can be used by using between 4 ASF ~ 60ASF And different current density values, so that Under the premise of considering the hole filling rate as much as possible, the plating efficiency and the plating effect can be effectively improved (for example, a better hole filling rate can be achieved).

為能更進一步瞭解本發明的特徵及技術內容,請參閱以下有關本發明的詳細說明與附圖,但是此等說明與附圖僅用來說明本發明,而非對本發明的保護範圍作任何的限制。 In order to further understand the features and technical contents of the present invention, please refer to the following detailed description and drawings of the present invention, but these descriptions and drawings are only used to illustrate the present invention, and not to make any limitation to the scope of the present invention limit.

1‧‧‧電路板 1‧‧‧Circuit Board

11‧‧‧孔洞 11‧‧‧ Hole

2‧‧‧傳導體 2‧‧‧ Conductor

21‧‧‧空間 21‧‧‧ space

3‧‧‧傳導體 3‧‧‧ Conductor

X‧‧‧第一電流 X‧‧‧first current

Y‧‧‧第二電流 Y‧‧‧second current

Z‧‧‧階梯電流 Z‧‧‧ Ladder current

T1‧‧‧第一時段 T1‧‧‧First Session

T2‧‧‧第二時段 T2‧‧‧Second Session

Tc‧‧‧轉換時段 Tc‧‧‧ Conversion Period

I‧‧‧第一電流密度值 I‧‧‧First current density value

Ⅱ‧‧‧第二電流密度值 Ⅱ‧‧‧Second current density value

R‧‧‧孔徑 R‧‧‧ Aperture

D‧‧‧孔深 D‧‧‧hole depth

圖1為本發明電路板結構的孔內電鍍方法實施例一的準備步驟示意圖。 FIG. 1 is a schematic diagram of preparation steps in Embodiment 1 of a method for plating in a hole of a circuit board structure according to the present invention.

圖2為本發明電路板結構的孔內電鍍方法實施例一的第一電鍍步驟與第二電鍍步驟的電流密度與時間之示意圖。 FIG. 2 is a schematic diagram of current densities and times of a first plating step and a second plating step in Embodiment 1 of a method for plating a hole in a circuit board structure according to the present invention.

圖3為本發明電路板結構的孔內電鍍方法實施例一經實施後的電路板結構示意圖。 FIG. 3 is a schematic diagram of a circuit board structure after an embodiment of a method for plating in a hole of a circuit board structure according to the present invention is implemented.

圖4為本發明電路板結構的孔內電鍍方法實施例二的第一電鍍步驟與第二電鍍步驟的電流密度與時間之示意圖。 FIG. 4 is a schematic diagram of the current density and time of the first plating step and the second plating step in the second embodiment of the in-hole plating method of the circuit board structure of the present invention.

圖5為本發明電路板結構的孔內電鍍方法實施例二經實施後的電路板結構示意圖。 FIG. 5 is a schematic diagram of a circuit board structure after the second embodiment of the in-hole plating method of the circuit board structure of the present invention is implemented.

圖6為本發明電路板結構的孔內電鍍方法實施例三的第一電鍍步驟與第二電鍍步驟的電流密度與時間之示意圖(一)。 FIG. 6 is a schematic diagram (1) of the current density and time of the first plating step and the second plating step in the third embodiment of the in-hole plating method of the circuit board structure of the present invention.

圖7為本發明電路板結構的孔內電鍍方法實施例三的第一電鍍步驟與第二電鍍步驟的電流密度與時間之示意圖(二)。 FIG. 7 is a schematic diagram (2) of current densities and times of the first plating step and the second plating step in the third embodiment of the in-hole plating method of the circuit board structure of the present invention.

請參閱圖1至圖7所示,其為本發明的實施例,需先說明的是,本實施例對應附圖所提及的相關數量與外型,僅用來具體地說明本發明的實施方式,以便於了解本發明的內容,而非用來侷限本發明的保護範圍。 Please refer to FIG. 1 to FIG. 7, which are embodiments of the present invention. It should be noted that this embodiment corresponds to the related quantities and appearances mentioned in the drawings, and is only used to specifically describe the implementation of the present invention. Mode to facilitate understanding of the content of the present invention, but not to limit the protection scope of the present invention.

[實施例一] [Example 1]

需先說明的是,為便於說明本實施例,圖式僅呈現相關的局部構造。其中,如圖1至圖3所示,本實施例公開一種電路板結構的孔內電鍍方法,其包含有一準備步驟、一第一電鍍步驟、及一第二電鍍步驟。其中,本實施例電路板結構的孔內電鍍方法中的任何電鍍步驟可以是由一電鍍設備(圖略)實施,也就是說,所述任何電鍍步驟中的各種參數可以由電鍍設備來控制。 It should be noted that, to facilitate the description of this embodiment, the drawings only show relevant local structures. As shown in FIG. 1 to FIG. 3, this embodiment discloses a method for in-hole plating of a circuit board structure, which includes a preparation step, a first plating step, and a second plating step. Wherein, any electroplating step in the in-hole electroplating method of the circuit board structure of this embodiment may be implemented by an electroplating device (not shown), that is, various parameters in the electroplating step may be controlled by the electroplating device.

再者,本發明電路板結構的孔內電鍍方法不受限於上述多個步驟的順序或實施方式。舉例來說,在本發明未繪示的其他實施例中,上述多個步驟也可以依據實際的設計需求而加以調整變化或增減。另,以下將分別介紹本實施例電路板結構的孔內電鍍方法各個步驟。 Furthermore, the in-hole plating method of the circuit board structure of the present invention is not limited to the sequence or implementation of the above steps. For example, in other embodiments not shown in the present invention, the above multiple steps may also be adjusted, changed, increased or decreased according to actual design requirements. In addition, each step of the in-hole plating method of the circuit board structure of this embodiment will be described below.

如圖1所示,實施所述準備步驟:提供一電路板1,並且所述電路板1包含有一孔洞11。其中,所述電路板1於本實施例中可以採用多層板或單層板,並且上述孔洞11於圖1是以貫穿上述電路板1的一貫孔來說明,但本發明不受限於此。舉例來說,在本發明未繪示的其他實施例中,所述孔洞11也可以未貫穿電路板1的一盲孔。 As shown in FIG. 1, the preparation step is implemented: a circuit board 1 is provided, and the circuit board 1 includes a hole 11. The circuit board 1 in this embodiment may be a multi-layer board or a single-layer board, and the hole 11 is illustrated in FIG. 1 as a through hole penetrating the circuit board 1, but the present invention is not limited thereto. For example, in other embodiments not shown in the present invention, the hole 11 may not pass through a blind hole of the circuit board 1.

再者,所述孔洞11於本實施例中具有其孔深D除以孔徑R的一深寬比(aspect ratio,AR),並且所述深寬比不小於4。也就是說,本實施例電路板結構的孔內電鍍方法所適用的物件或對象較佳是排除深寬比小於4的孔洞。 Furthermore, in the embodiment, the hole 11 has an aspect ratio (AR) divided by a hole depth D divided by an aperture R, and the aspect ratio is not less than 4. That is, the object or object to which the in-hole plating method of the circuit board structure of this embodiment is applicable is to exclude holes having an aspect ratio of less than 4.

如圖2所示,實施所述第一電鍍步驟:以一第一電流X對所述電路板1的孔洞11於一第一時段T1內進行電鍍,並且所述第一電流X具有一第一電流密度值I。於本實施例中,所述第一時段T1是介於5分鐘~80分鐘,而所述第一電流X的第一電流密度值 I介於4 ASF~60ASF。上述ASF於本實施例中是作為一種電流密度單位使用,也就是:安培/平方英尺。 As shown in FIG. 2, the first electroplating step is performed: the holes 11 of the circuit board 1 are electroplated in a first period T1 with a first current X, and the first current X has a first Current density value I. In this embodiment, the first period T1 is between 5 minutes and 80 minutes, and the first current density value of the first current X is I is between 4 ASF and 60 ASF. The ASF is used as a current density unit in this embodiment, that is, ampere / square foot.

如圖2所示,實施所述第二電鍍步驟:以一第二電流Y對所述電路板1的孔洞11於一第二時段T2內進行電鍍,並且所述第二電流Y具有一第二電流密度值Ⅱ。於本實施例中,所述第二時段T2是介於5分鐘~80分鐘,而所述第二電流Y的第二電流密度值Ⅱ介於4 ASF~60ASF。 As shown in FIG. 2, the second plating step is performed: the holes 11 of the circuit board 1 are plated with a second current Y within a second period T2, and the second current Y has a second Current density value II. In this embodiment, the second period T2 is between 5 minutes and 80 minutes, and the second current density value II of the second current Y is between 4 ASF and 60 ASF.

需說明的是,如圖2和圖3所示,所述第一電流密度值I與第二電流密度值Ⅱ彼此相異,並且所述第一電流密度值I與第二電流密度值Ⅱ的差值於本實施例最佳是在2 ASF以下,藉以使上述第一電流密度值I能夠瞬間轉換至第二電流密度值Ⅱ。 It should be noted that, as shown in FIG. 2 and FIG. 3, the first current density value I and the second current density value II are different from each other, and the first current density value I and the second current density value II are different from each other. The difference is better than 2 ASF in this embodiment, so that the first current density value I can be instantly converted to the second current density value II.

再者,所述電路板結構的孔內電鍍方法經由實施上述步驟之後,形成有鍍設於所述孔洞11之孔壁的一傳導體2,並且所述傳導體2內緣包圍形成有一空間21。 Furthermore, after the above-mentioned steps are performed in the in-hole plating method of the circuit board structure, a conductive body 2 plated on the hole wall of the hole 11 is formed, and an inner edge of the conductive body 2 forms a space 21. .

進一步地說,為能在所述孔洞11內有效地形成上述傳導體2,所述第一電流密度值I較佳是小於所述第二電流密度值Ⅱ。其中,所述第一電流密度值I例如是介於4 ASF~12ASF,並且所述第二電流密度值Ⅱ例如是介於10 ASF~30ASF。 Further, in order to effectively form the conductive body 2 in the hole 11, the first current density value I is preferably smaller than the second current density value II. The first current density value I is, for example, between 4 ASF and 12 ASF, and the second current density value II is, for example, between 10 ASF and 30 ASF.

[實施例二] [Example 2]

請參閱圖4和圖5所示,其為本發明的實施例二,本實施例類似於上述實施例一,所以兩個實施例的相同處(如:準備步驟)則不再加以贅述,而本實施例相較於實施例一的差異主要在於:本實施例電路板結構的孔內電鍍方法經實施之後,形成有鍍滿於所述孔洞11的一傳導體3。 Please refer to FIG. 4 and FIG. 5, which is a second embodiment of the present invention. This embodiment is similar to the first embodiment, so the same points (such as the preparation steps) of the two embodiments will not be described again. The difference between this embodiment and the first embodiment is mainly that: after the in-hole electroplating method of the circuit board structure of this embodiment is implemented, a conductive body 3 plated on the hole 11 is formed.

具體來說,為能在所述孔洞11內有效地形成上述傳導體3, 所述第一電流密度值I較佳是大於第二電流密度值Ⅱ。其中,所述第一電流密度值I例如是介於10 ASF~60ASF,而所述第二電流密度值Ⅱ例如是介於4ASF~15ASF。 Specifically, in order to effectively form the conductive body 3 in the hole 11, The first current density value I is preferably greater than the second current density value II. The first current density value I is, for example, between 10 ASF and 60 ASF, and the second current density value II is, for example, between 4 ASF and 15 ASF.

[實施例三] [Example Three]

請參閱圖6和圖7所示,其為本發明的實施例三,本實施例類似於上述實施例一和二,所以上述實施例的相同處(如:準備步驟、第一電鍍步驟、與第二電鍍步驟)則不再加以贅述,而本實施例相較於實施例一和二的差異主要在於:本實施例電路板結構的孔內電鍍方法在上述第一電鍍步驟與第二電鍍步驟之間進一步實施一電流轉換步驟。 Please refer to FIG. 6 and FIG. 7, which is a third embodiment of the present invention. This embodiment is similar to the first embodiment and the second embodiment. Therefore, the same aspects of the above embodiments (such as the preparation step, the first plating step, and The second electroplating step) will not be repeated, and the difference between this embodiment and the first and second embodiments is mainly that the in-hole electroplating method of the circuit board structure of this embodiment is performed in the first electroplating step and the second electroplating step. A current conversion step is further implemented therebetween.

具體來說,所述電流轉換步驟實施如下:以一階梯電流Z對所述電路板1的孔洞11於一轉換時段Tc內進行電鍍,並且所述階梯電流Z具有一階梯電流密度值。其中,上述階梯電流密度值在轉換時段Tc內、自所述第一電流密度值I逐漸變更(如:增加或降低)至第二電流密度值Ⅱ。 Specifically, the current conversion step is implemented as follows: the holes 11 of the circuit board 1 are plated with a step current Z within a conversion period Tc, and the step current Z has a step current density value. The step current density value is gradually changed (eg, increased or decreased) from the first current density value I to the second current density value II within the transition period Tc.

其中,所述轉換時段Tc於本實施例中是介於0~20分鐘,並且上述轉換時段Tc的時間長短是大致依據所述第一電流密度值I與第二電流密度值Ⅱ的差值來決定。進一步地說,本實施例電路板結構的孔內電鍍方法經實際操作後,得出下列的電流密度差值與轉換時段Tc之關係對應表。 The conversion period Tc in this embodiment is between 0 and 20 minutes, and the length of the conversion period Tc is roughly based on the difference between the first current density value I and the second current density value II. Decide. Further, after actual operation of the method for plating in holes in the circuit board structure of this embodiment, the following correspondence table of the relationship between the current density difference and the conversion period Tc is obtained.

依上表所載,所述第一電流密度值I與第二電流密度值Ⅱ的差值在2 ASF以下時,該轉換時段Tc為0分鐘,也就相當於上述實施例一和實施例二中所記載的第一電流密度值I瞬間轉換至第二電流密度值Ⅱ。 According to the above table, when the difference between the first current density value I and the second current density value II is less than 2 ASF, the conversion period Tc is 0 minutes, which is equivalent to the first embodiment and the second embodiment. The first current density value I described in the above is instantly converted to the second current density value II.

再者,所述第一電流密度值I與第二電流密度值Ⅱ的差值介於3~5 ASF時,該轉換時段Tc為1~11分鐘;所述第一電流密度值I與第二電流密度值Ⅱ的差值介於6~9 ASF時,該轉換時段Tc為12~19分鐘;所述第一電流密度值I與第二電流密度值Ⅱ的差值在10 ASF以上時,該轉換時段Tc為20分鐘。 Furthermore, when the difference between the first current density value I and the second current density value II is between 3 and 5 ASF, the conversion period Tc is 1 to 11 minutes; the first current density value I and the second When the difference between the current density values II is 6 to 9 ASF, the conversion period Tc is 12 to 19 minutes; when the difference between the first current density value I and the second current density value II is more than 10 ASF, the The switching period Tc is 20 minutes.

據此,本實施例電路板結構的孔內電鍍方法能夠依據所述第一電流密度值I與第二電流密度值Ⅱ的差值,來調整轉換時段Tc的時間長短,進而能夠使上述電路板1的孔洞11具備有較佳的電鍍效果與電鍍效率。 According to this, the in-hole plating method of the circuit board structure of this embodiment can adjust the time length of the conversion period Tc according to the difference between the first current density value I and the second current density value II, thereby enabling the circuit board described above. The hole 11 of 1 has better plating effect and plating efficiency.

需額外說明的是,上述實施例一至三是以兩個電鍍步驟來說明(如:第一電鍍步驟與第二電鍍步驟),但本發明電路板結構的孔內電鍍方法所實施的電鍍步驟次數並不以此為限。 It should be additionally noted that the first to third embodiments are described by using two electroplating steps (eg, the first electroplating step and the second electroplating step), but the number of electroplating steps performed by the in-hole electroplating method of the circuit board structure of the present invention It is not limited to this.

進一步地說,在本發明未繪示的實施例中,所述電路板結構的孔內電鍍方法可以是依序實施N個電鍍步驟,並且N為不小於2的正整數;其中,所述每個電鍍步驟以一電流對上述電路板1的孔洞11進行電鍍,並且所述電流具有一電流密度值。再者,上述N個電鍍步驟中包含有兩種以上的電流密度值,並且任一個電流密度值是介於4 ASF~60ASF。 Further, in an embodiment not shown in the present invention, the in-hole electroplating method of the circuit board structure may be implemented by sequentially performing N electroplating steps, and N is a positive integer of not less than 2; Each electroplating step electroplats the holes 11 of the circuit board 1 with a current, and the current has a current density value. Furthermore, the above N plating steps include two or more current density values, and any one of the current density values is between 4 ASF and 60 ASF.

更詳細地說,當任兩個依序實施的所述電鍍步驟中,其所使用的兩個所述電流密度值之差值大於2 ASF時,實施一電流轉換步驟;而當上述任兩個依序實施的所述電鍍步驟中,其所使用的兩個所述電流密度值之差值小於2 ASF時,該兩個電流密度值能夠在瞬間進行轉換。 In more detail, when the difference between the two current density values used in any two of the electroplating steps sequentially performed is greater than 2 ASF, a current conversion step is performed; and when any of the two When the difference between the two current density values used in the electroplating step sequentially performed is less than 2 ASF, the two current density values can be instantly converted.

其中,所述電流轉換步驟是以一階梯電流對所述電路板1的孔洞11於一轉換時段內進行電鍍,並且所述階梯電流具有一階梯電流密度值,而所述階梯電流密度值在所述轉換時段內、自所使用的兩個所述電流密度值中的實施在前之所述電流密度值逐漸變更至實施在後之所述電流密度值。再者,所述轉換時段介於0~20分鐘,其具體的時間長短可以參考實施例三所載。 Wherein, the current conversion step is to plate the holes 11 of the circuit board 1 with a step current within a conversion period, and the step current has a step current density value, and the step current density value is During the conversion period, from the implementation of the current density value in the two of the current density values used, the current density value is gradually changed to the implementation of the current density value in the following. Moreover, the conversion period is between 0 and 20 minutes, and the specific time length can be referred to that in the third embodiment.

需額外說明的是,上述N個電鍍步驟中所使用的電流密度值可以依據實際需求而控制為:由高到低、由低到高、或是高低交替,本發明在此不加以限制。 It should be additionally noted that the current density values used in the above-mentioned N electroplating steps can be controlled according to actual needs: from high to low, from low to high, or from high to low, which is not limited in the present invention.

此外,對於現有電路板製造方法來說,其在盡可能兼顧灌孔率的前提下,對於深寬比大於4且小於8的孔洞之電鍍效率會降低10%,並且對於深寬比大於8且小於11的孔洞之電鍍效率會降低40%,而對於深寬比大於11且小於16的孔洞之電鍍效率會降低70%。其中,現有電路板製造方法對於深寬比大於11且小於16的孔洞之灌孔率更是難以達到60%。 In addition, for the existing circuit board manufacturing method, under the premise of taking into account the hole filling ratio as much as possible, the plating efficiency for holes with an aspect ratio greater than 4 and less than 8 will be reduced by 10%, and for aspect ratios greater than 8 and The plating efficiency of holes less than 11 will be reduced by 40%, and the plating efficiency of holes with aspect ratios greater than 11 and less than 16 will be reduced by 70%. Among them, the existing circuit board manufacturing method has a difficulty in achieving a hole filling ratio of 60% for holes having an aspect ratio greater than 11 and less than 16.

然而,本實施例電路板結構的孔內電鍍方法經實際操作後,其在盡可能兼顧灌孔率的前提下,對於深寬比大於4且小於16的孔洞11之電鍍效率相較於現有電路板製造方法來說皆能夠有效地提升。再者,本發明實施例所公開之電路板結構的孔內電鍍方法對於深寬比大於11且小於16的所述孔洞11之灌孔率更是可以達到60%以上。 However, after actual operation, the in-hole electroplating method of the circuit board structure of this embodiment has a plating efficiency of holes 11 with an aspect ratio greater than 4 and less than 16 compared with the existing circuit on the premise of taking into account the filling rate as much as possible. The board manufacturing method can be effectively improved. Furthermore, the in-hole electroplating method of the circuit board structure disclosed in the embodiment of the present invention can achieve a filling rate of the hole 11 with an aspect ratio greater than 11 and less than 16 to reach 60% or more.

[本發明實施例的技術效果] [Technical effect of the embodiment of the present invention]

綜上所述,本發明實施例所公開之電路板結構的孔內電鍍方法,其採用的多個電鍍步驟(如:第一電鍍步驟與第二電鍍步驟)能通過使用介於4 ASF~60ASF且彼此相異的電流密度值,藉以在盡可能兼顧灌孔率的前提下,有效地提升電鍍效率與電鍍效果 (如:達到較佳的灌孔率)。 In summary, in the method for in-hole electroplating of the circuit board structure disclosed in the embodiments of the present invention, multiple electroplating steps (such as the first electroplating step and the second electroplating step) can be used by using between 4 ASF ~ 60ASF And the current density values are different from each other, so that the plating efficiency and the plating effect can be effectively improved under the premise of considering the hole filling rate as much as possible. (Such as: to achieve a better filling rate).

再者,本實施例電路板結構的孔內電鍍方法還能夠進一步依據兩個實施的電鍍步驟之電流密度值差值(如:第一電流密度值與第二電流密度值的差值),來調整轉換時段的時間長短,進而能夠使上述電路板的孔洞具備有較佳的電鍍效果與電鍍效率。 Furthermore, the in-hole plating method of the circuit board structure of this embodiment can further be based on the difference between the current density values (such as the difference between the first current density value and the second current density value) of the two plating steps. By adjusting the length of the conversion period, the holes of the circuit board can have better plating effect and plating efficiency.

以上所述僅為本發明的優選可行實施例,並非用來侷限本發明的保護範圍,凡依本發明專利範圍所做的均等變化與修飾,皆應屬本發明的權利要求書的保護範圍。 The above description is only the preferred and feasible embodiments of the present invention, and is not intended to limit the protection scope of the present invention. Any equivalent changes and modifications made according to the patent scope of the present invention shall fall within the protection scope of the claims of the present invention.

Claims (10)

一種電路板結構的孔內電鍍方法,包括:實施一準備步驟:提供一電路板,並且所述電路板包含有一孔洞;其中,所述孔洞具有其孔深除以孔徑的一深寬比,並且所述深寬比不小於4;實施一第一電鍍步驟:以一第一電流對所述電路板的所述孔洞於一第一時段內進行電鍍,並且所述第一電流具有一第一電流密度值;以及實施一第二電鍍步驟:以一第二電流對所述電路板的所述孔洞於一第二時段內進行電鍍,並且所述第二電流具有一第二電流密度值;其中,所述第一電流密度值與所述第二電流密度值彼此相異、並且各介於4 ASF~60ASF。A method for in-hole plating of a circuit board structure includes: implementing a preparation step: providing a circuit board, and the circuit board includes a hole; wherein the hole has a depth-to-width ratio of its hole depth divided by the hole diameter, and The aspect ratio is not less than 4; a first plating step is performed: the holes of the circuit board are plated with a first current for a first period of time, and the first current has a first current A density value; and implementing a second electroplating step: electroplating the holes of the circuit board with a second current in a second period, and the second current has a second current density value; wherein, The first current density value and the second current density value are different from each other, and each is between 4 ASF and 60 ASF. 如請求項1所述的電路板結構的孔內電鍍方法,其被實施以形成有鍍設於所述孔洞之孔壁的一傳導體,以使所述傳導體內緣包圍形成有一空間,並且所述第一電流密度值小於所述第二電流密度值。The method for in-hole plating of a circuit board structure according to claim 1, is implemented to form a conductive body plated on a wall of the hole of the hole, so that a space is formed around the inner side of the conductive body, and The first current density value is smaller than the second current density value. 如請求項2所述的電路板結構的孔內電鍍方法,其中,所述第一電流密度值介於4 ASF~12ASF,並且所述第二電流密度值介於10 ASF~30ASF。The in-hole plating method for a circuit board structure according to claim 2, wherein the first current density value is between 4 ASF and 12 ASF, and the second current density value is between 10 ASF and 30 ASF. 如請求項1所述的電路板結構的孔內電鍍方法,其被實施以形成有鍍滿於所述孔洞的一傳導體,並且所述第一電流密度值大於所述第二電流密度值。The method for in-hole plating of a circuit board structure according to claim 1 is implemented to form a conductor plated on the hole, and the first current density value is greater than the second current density value. 如請求項4所述的電路板結構的孔內電鍍方法,其中,所述第一電流密度值介於10 ASF~60ASF,並且所述第二電流密度值介於4ASF~15ASF。The in-hole plating method for a circuit board structure according to claim 4, wherein the first current density value is between 10 ASF and 60 ASF, and the second current density value is between 4 ASF and 15 ASF. 如請求項1所述的電路板結構的孔內電鍍方法,其於所述第一電鍍步驟與所述第二電鍍步驟之間進一步包括:實施一電流轉換步驟:以一階梯電流對所述電路板的所述孔洞於一轉換時段內進行電鍍,並且所述階梯電流具有一階梯電流密度值,而所述階梯電流密度值在所述轉換時段內、自所述第一電流密度值逐漸變更至所述第二電流密度值;其中,所述轉換時段介於0~20分鐘。The method for in-hole plating of a circuit board structure according to claim 1, further comprising: implementing a current conversion step: applying a step current to the circuit between the first plating step and the second plating step. The holes of the plate are electroplated in a conversion period, and the step current has a step current density value, and the step current density value gradually changes from the first current density value to The second current density value; wherein the transition period is between 0 and 20 minutes. 如請求項6所述的電路板結構的孔內電鍍方法,其中,所述第一電流密度值與所述第二電流密度值的差值在2ASF以下時,所述轉換時段為0分鐘;所述第一電流密度值與所述第二電流密度值的差值在10ASF以上時,所述轉換時段為20分鐘。The method for in-hole plating of a circuit board structure according to claim 6, wherein when the difference between the first current density value and the second current density value is less than 2ASF, the conversion period is 0 minutes; When the difference between the first current density value and the second current density value is more than 10 ASF, the conversion period is 20 minutes. 如請求項6所述的電路板結構的孔內電鍍方法,其中,所述第一電流密度值與所述第二電流密度值的差值介於3~5ASF時,所述轉換時段為1~11分鐘。The method for in-hole plating of a circuit board structure according to claim 6, wherein when the difference between the first current density value and the second current density value is between 3 and 5 ASF, the conversion period is 1 to 11 minutes. 如請求項6所述的電路板結構的孔內電鍍方法,其中,所述第一電流密度值與所述第二電流密度值的差值介於6~9ASF時,所述轉換時段為12~19分鐘。The in-hole plating method for a circuit board structure according to claim 6, wherein when the difference between the first current density value and the second current density value is between 6 and 9 ASF, the conversion period is 12 to 19 minutes. 一種電路板結構的孔內電鍍方法,包括:實施一準備步驟:提供一電路板,並且所述電路板包含有一孔洞;其中,所述孔洞具有其孔深除以孔徑的一深寬比,並且所述深寬比不小於4;以及依序實施N個電鍍步驟:每個所述電鍍步驟以一電流對所述電路板的所述孔洞進行電鍍,並且所述電流具有一電流密度值;其中,N為不小於2的正整數,並且N個所述電鍍步驟中包含有兩種以上的所述電流密度值,並且任一個所述電流密度值是介於4 ASF~60ASF;其中,當任兩個依序實施的所述電鍍步驟中,其所使用的兩個所述電流密度值之差值大於2ASF時,實施一電流轉換步驟;其中,所述電流轉換步驟是以一階梯電流對所述電路板的所述孔洞於一轉換時段內進行電鍍,並且所述階梯電流具有一階梯電流密度值,而所述階梯電流密度值在所述轉換時段內、自所使用的兩個所述電流密度值中的實施在前之所述電流密度值逐漸變更至實施在後之所述電流密度值;其中,所述轉換時段介於0~20分鐘。A method for in-hole plating of a circuit board structure includes: implementing a preparation step: providing a circuit board, and the circuit board includes a hole; wherein the hole has a depth-to-width ratio of its hole depth divided by the hole diameter, and The aspect ratio is not less than 4; and sequentially performing N electroplating steps: each of the electroplating steps electroplating the holes of the circuit board with a current, and the current has a current density value; wherein , N is a positive integer not less than 2, and N or more of the current density values are included in the N electroplating steps, and any one of the current density values is between 4 ASF and 60 ASF; When the difference between the two current density values used in the two sequentially performed electroplating steps is greater than 2ASF, a current conversion step is performed; wherein, the current conversion step is a step current The holes of the circuit board are electroplated in a conversion period, and the step current has a step current density value, and the step current density value during the conversion period is Said current density in the first embodiment of the current density is gradually changed to the embodiment of the current density value; wherein the transition period between 0 to 20 minutes.
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