TWI663110B - Tray for semiconductor integrated circuit parts having notches for straps - Google Patents

Abstract

An object of the present invention is to be able to bundle a plurality of trays for semiconductor integrated circuit components seamlessly.

The tray for semiconductor integrated circuit parts of the present invention is formed along the peripheral edge portion of the front side surface of the tray 1 for semiconductor integrated circuit parts formed in a substantially rectangular shape in plan view, and is formed slightly inward of the peripheral edge portion. When the plurality of semiconductor integrated circuit component trays are stacked at the outer peripheral wall 12 of a predetermined height, the peripheral edge portion of the front side 4 abuts against the peripheral edge portion of the back side 5 of the other semiconductor integrated circuit component tray located at the upper stage. , And along at least one of the four parts within 3.4cm from the two side faces extending toward the length direction of the tray for semiconductor integrated circuit parts or the two side faces extending toward the width direction A notch is formed at the bottom for binding the bundle of a plurality of semiconductor integrated circuit components with a strap of a tray.

Description

Tray for semiconductor integrated circuit parts having notches for straps

The present invention relates to a tray for accommodating semiconductor integrated circuit components such as an IC package (PKG), etc. In detail, the present invention relates to a method for binding the stacked trays with a strong force during the packing operation of a plurality of trays. Deformation of the trays generated when the straps are held is minimized, thereby preventing gaps between the trays or horizontally shifted trays.

The tray for semiconductor integrated circuit parts used in the steps of manufacturing, measuring, and shipping of electronic components such as ICs must pass various quality tests including drop tests performed by the receiver. As an example of the drop test, the following test was performed: a plurality of semiconductor integrated circuit component trays on which a plurality of semiconductor integrated circuit components (IC packages, etc.) were placed were bundled, and aluminum was packed together with a hygroscopic agent. After the bag is vacuum-sealed, it is put into corrugated cardboard for packing, and it is dropped 20 times from a height of about 1 meter to the concrete floor to give an impact (a total of 10 parts of the 6 faces, 3 sides, and 1 corner (apex) of the pallet Dropping 10 times downwards was performed as one set of drop tests, and two sets of drop tests were performed). After the drop test is completed, if the IC parts on the tray are not damaged, they can be delivered to the receiver as a qualified semiconductor integrated circuit parts tray.

[Prior technical literature]

[Patent Literature]

[Patent Document 1] Japanese Patent Laid-Open No. 2010-189048

[Patent Document 2] Japanese Patent Laid-Open No. 2011-238660

[Patent Document 3] Japanese Patent Laid-Open No. 2001-261089

When a conventional semiconductor integrated circuit component tray is bundled with three bands, the central portion of the semiconductor integrated circuit tray is excessively applied with force and the tray is bent, thereby interposing the stacked semiconductor integrated circuit component trays. The problem of the gap 10 occurs (see FIG. 6 (b)). As disclosed in Patent Document 1, in the case where the interlocking function portion 11 (protruded and concave formed by suppressing stack sloshing) is formed on each tray, a semiconductor integrated circuit is subjected to a large impact in a drop test. The gap between the parts trays also widens, and the horizontal offset between the trays becomes larger. Then, the semiconductor integrated circuit placed on the lower tray is pressed against the front guide 6a of the other tray on the upper tray, and is sandwiched by the front guide 6a and the back guide 6a to be damaged (see FIG. 7 (a)).

In one embodiment of the present invention, a tray for a semiconductor integrated circuit part having a notch for a strap is proposed. The tray is formed in a substantially quadrangular shape in plan view, and is configured to follow the tray of the semiconductor integrated circuit part. The peripheral edge portion of the front side is formed slightly outside the peripheral edge portion, and an outer peripheral wall having a predetermined height is formed. When a plurality of trays for semiconductor integrated circuit components are stacked, the peripheral edge portion of the front side abuts on the upper stage. Another semiconductor integrated circuit The peripheral edge portion (except the arm portion and the like) of the back side of the tray for road parts; and is characterized in that it extends along two sides extending in the lengthwise direction of the tray for semiconductor integrated circuit parts or in the width direction. A notch for binding the bundle of a plurality of the semiconductor integrated circuit parts with a strap of a tray is formed at the lower side of at least one of the four parts within 3.4 cm of each of the two side faces.

Furthermore, the present invention is characterized in that the size of the depth of the notch is shorter than the size of the predetermined height of the outer peripheral wall.

In another embodiment, a tray for a semiconductor integrated circuit component having a notch for a strap is proposed, which is formed in a substantially quadrangular shape in plan view and is configured to follow the front side of the tray for a semiconductor integrated circuit component. The peripheral edge portion is slightly inward of the peripheral edge portion, and a peripheral wall having a predetermined height is formed. When stacking a plurality of the semiconductor integrated circuit component trays, the peripheral edge portion of the front side abuts on another one located in the upper stage. The peripheral edge portion (except the arm portion and the like) of the back surface of the tray for semiconductor integrated circuit components is characterized in that it is located along two sides extending in a direction from the longitudinal direction of the tray for semiconductor integrated circuit components. Or, the outer peripheral wall of the portion above the at least one of the four portions within 3.4 cm of each of the two side surfaces extending in the width direction is formed to bundle a plurality of the semiconductor integrated circuit parts. The notches tied with the straps of the tray.

Furthermore, the present invention is characterized in that the size of the depth of the notch is shorter than the size of the predetermined height of the outer peripheral wall.

According to the present invention, a tray for a semiconductor integrated circuit part having a notch for strapping is formed with a strap for bundling a plurality of the trays for the semiconductor integrated circuit part. Therefore, when the strap is tied, the tray for semiconductor integrated circuit parts does not flex. Therefore, when a large impact is received in the drop test, no gap is generated between the trays for semiconductor integrated circuit parts, and no offset occurs between the trays for semiconductor integrated circuit parts. As a side effect, in the tray for a semiconductor integrated circuit part having a notch for strapping according to the present invention, the semiconductor integrated circuit such as an IC stored in a bag of each tray for the semiconductor integrated circuit part can be prevented from being stolen. The reason is that if the strap is bound by the cutout formed on the tray for semiconductor integrated circuit parts of the present invention, there will be no gap between the trays for semiconductor integrated circuit parts, so even if it is a very thin and small current IC The package (PKG) will not slip off from the gap between the trays for semiconductor integrated circuit parts.

1‧‧‧Tray for Semiconductor Integrated Circuit Parts

1a‧‧‧Hanging arm

2‧‧‧ gap

2a‧‧‧slot

3‧‧‧ strap

4‧‧‧ front side

5‧‧‧ dorsal view

6‧‧‧ bags

6a‧‧‧Front guide

6b‧‧‧Back Guide

7‧‧‧Semiconductor integrated circuit parts (IC package, etc.)

8‧‧‧ buffer sheet

9‧‧‧ Corrugated Cardboard Box

10‧‧‧ Gap

11‧‧‧Chain Function Department

12‧‧‧ peripheral wall

13‧‧‧ (front side) peripheral part

FIG. 1 is a view showing a tray for a semiconductor integrated circuit component having a notch for a band according to the present invention.

FIG. 2 is a side view showing a plurality of trays for semiconductor integrated circuit components bound with bands.

FIG. 3 is a side view showing four notches formed in a tray for a semiconductor integrated circuit component.

FIG. 4 is an enlarged view of the gaps of the four modes.

Fig. 5 is a perspective view showing an embodiment of a tray for semiconductor integrated circuit parts according to the present invention.

Fig. 6 is a diagram schematically showing a packing process of a tray for semiconductor integrated circuit components.

Fig. 7 (a) is a diagram showing a tray of a conventional product with a large offset, and (b) is a diagram showing a tray for a semiconductor integrated circuit part of the present invention without a stack.

Hereinafter, the tray 1 for semiconductor integrated circuit parts (hereinafter referred to simply as "tray 1") having a notch for strapping according to the present invention will be described based on specific examples with reference to the drawings.

Fig. 1 is a perspective view showing a tray 1 having a notch for strapping according to the present invention. In the embodiment shown in FIG. 1, a gap 2 is formed on the two sides extending along the length direction of the tray 1 and only along the lower part of the four parts within 3.4 cm from each end edge (ie, the corner). .

As shown in FIG. 2, when the band 3 is wound around the plurality of trays 1 stacked, the packing operator winds the side of the band 3 with the gaps 2 facing the trays 1, thereby winding the plurality of trays after binding. There is no gap 10 between one.

FIG. 3 shows an embodiment of a tray 1 having various cutouts 2. In the embodiment shown in FIGS. 3 (a) to 3 (c), the end edges (corners) of the two side surfaces extending along the length direction of the semiconductor integrated circuit component tray 1 in a plan view of a substantially quadrangular shape in plan view. Part) is formed with at least one of the upper and lower sides in the vicinity of a notch 2 for binding the strap 3.

In the embodiment shown in FIG. 3 (d), at least one of the upper side and the lower side near the end edges of the two side faces extending in the longitudinal direction of the tray 1 having a substantially rectangular shape in plan view is formed for The notch 2 that binds the strap 3 is further formed at the position of the notch 2, and a groove 2 a is formed on the side of the tray 1 from the upper side to the lower side and has a width substantially the same as the width of the notch 2.

Figures 4 (a) ~ (d) are enlarged views of the gaps in the four patterns shown in Figures 3 (a) ~ (d), respectively. In the embodiment shown in FIG. 4 (a), it is along the lower side of the four parts within 3.4 cm from the end edges of the two side faces extending in the length direction of the tray 1, A notch 2 is formed for binding the band. In the embodiment shown in FIG. 4 (b), the outer peripheral wall of the front side 4 is located above the four sides within 3.4 cm from the ends of the two sides extending in the length direction of the tray 1. 12. A notch 2 is formed for binding the band. Moreover, in the embodiment shown in FIG. 4 (c), the upper and lower sides of the four parts within 3.4 cm from the end edges of the two side faces extending in the length direction of the tray 1 are formed for Tie the gap 2 of the strap 3.

In the embodiment shown in FIG. 4 (d), the upper side and the lower side of the four parts within 3.4 cm away from each end edge of the two side faces extending in the length direction of the tray 1, A notch 2 is formed for binding the strap, and a groove 2a is formed on the side of the tray 1 at the position of the notch 2 from the upper side to the lower side and has a width substantially the same as the width of the notch 2. In this way, when the grooves 2a on the side of the tray 1 are formed at the positions of the various cutouts 2 described above, they can be bundled in such a way that the grooves 2a receive bands, so that a plurality of trays 1 can be securely bundled.

In one embodiment, the peripheral edge portion along the front side surface 4 of the tray 1 is further inside than the peripheral edge portion, and an outer peripheral wall 12 having a predetermined height is extended. In addition, when a plurality of trays 1 are stacked, the outer peripheral wall 12 formed on the front side 4 of the lower tray 1 is overlapped with the recess formed on the back side of the tray 1 on the upper stage, thereby performing the Wait for the alignment of the two pallets 1.

In another embodiment of the present invention shown in FIG. 5, gaps are formed along the upper and lower sides of the four parts within 3.4 cm from the end edges of the two side faces extending in the length direction of the tray 1, except for this. Outside (or instead), gaps are formed along the upper and lower sides of the two parts within 3.4 cm from the end edges of the two sides extending in the width direction of the tray 1. In another embodiment, there may be a case where a notch is formed along the upper side and the lower side near the central portion of the side surface of the tray 1. When a notch is also formed near the central part of the side surface of the tray 1, Since the four bands are tied at the notched parts, the plurality of trays 1 can be tightly connected without gap.

In one embodiment, the size of the predetermined height of the peripheral wall 12 formed on the front side 4 of the tray 1 is about 1.5 mm [0.15 cm], and the size of the depth of the notch 2 of the tray 1 is about 1.0 mm [0.1 cm]. The horizontal length of the notch 2 of the tray 1 is about 1.5 cm. In other embodiments, they are formed in other suitable sizes.

The packing process of the plurality of trays 1 will be described with reference to FIG. 6. In addition, FIG. 6 may be different from the actual size for the sake of emphasis. FIG. 6 (a) is a plan view showing a conventional semiconductor integrated circuit component tray formed with a plurality of bags 5 for accommodating semiconductor integrated circuit components 7 such as ICs. Fig. 6 (b) is a diagram schematically showing a conventional packing process.

The packing operator first loads the semiconductor integrated circuit parts 7 into the bag 5 formed on the semiconductor integrated circuit parts tray as shown in FIG. 6 (a), and then stacks and loads the semiconductors as shown in FIG. 6 (b). The trays of a predetermined number (mostly 5 or 10) of the integrated circuit parts 7 are then mechanically used to bind the straps 3 to a plurality of trays. As shown in FIG. 6 (c), the packing operator winds the buffer sheet 8 formed of an air-sealed bag or the like around a plurality of bundled trays, puts it into a corrugated cardboard box 9, and borrows This completes the packing operation.

As shown in FIG. 6 (b), it is also formed on the hanging arm portion 1a of a conventional tray (the tray for semiconductor integrated circuit components of the JEDEC standard shown in FIG. 1), which is 1 inch [about 2.54 cm] in width and depth It is a recess of 0.1 inch [about 0.254 cm]), which is a holding portion for a robot arm (equivalent to the transfer hook 3 of Patent Document 3) to hold a tray in the steps of manufacturing and detecting semiconductor integrated circuit parts. The recessed portion of the arm portion 1a is formed in a concave shape for binding the strap 3. However, in the current thin semiconductor integrated circuit component tray, the thickness of the tray 1 at the position of the arm portion 1a is very large. Thin (refer to FIG. 9 of Patent Document 3) and fragile, so the arm portion 1a cannot be tied Band 3. The reason for this is that when the tape is wound around a pallet made of polyphenylene ether (PPE), if a force of approximately 23 kg is applied while the tape is wound around the center of the stacked pallets, excessive force is applied near the central portion of the pallet and the pallet is 1 is deformed, and the gap 10 at the end of the stacked trays is enlarged (see FIGS. 6 (b) and (c)).

In contrast, in the tray 1 of the present invention, at least four of the upper and lower sides of the four parts within 3.4 cm from each of the two side edges extending in the length direction or width direction of the tray 1 On one side, a notch for binding a plurality of the straps of the tray 1 is formed, thereby suppressing the deflection (deformation) of the tray 1 bundled by the straps to a minimum. Therefore, it has the advantage that even if a large impact is received in the drop test, the gap generated between the plurality of trays 1 can be minimized, so that the IC package and the like on the tray 1 are not easily broken (see FIG. 7 (b)). .

In another embodiment of the present invention, the size of the depth of the notch 2 is formed to be shorter than the predetermined height of the outer peripheral wall 12, so that when a plurality of trays 1 are stacked, they are located on the front side 4 of the lower tray 1 The peripheral edge portion 13 on the outer side of the outer peripheral wall 12 abuts on the peripheral edge portion of the back side 5 of the tray 1 in the upper stage. The outer periphery of the tray 1 in the upper stage houses the outer peripheral wall 12 of the tray 1 in the lower frame in a nested manner. This way snaps. In addition, it has the advantage that by forming the depth of the notch 2 shallowly, the thickness of the tray 1 is also sufficient at the position of the notch 2, and even if the strap 3 is bound, the tray 1 is not easily damaged.

Claims (2)

A tray for a semiconductor integrated circuit component, which is formed in a substantially quadrangular shape in plan view, and is formed so that a peripheral portion along a front side of the tray for a semiconductor integrated circuit component is formed slightly inward from the peripheral portion. When the plurality of trays for semiconductor integrated circuit components are stacked with a peripheral wall of a predetermined height, the peripheral edge portion of the front side abuts on the peripheral edge portion of the back side surface of the other tray for semiconductor integrated circuit components in the upper stage. ; And is characterized in that at least four of the four parts within 3.4 cm are spaced apart from each other along two sides extending toward the length direction of the tray for semiconductor integrated circuit parts or two sides extending toward the width direction. A notch for binding the bundle of the plurality of semiconductor integrated circuit components with a strap of a tray is formed below one portion. A tray for a semiconductor integrated circuit component having a notch for a strap, which is formed in a substantially quadrangular shape in plan view, and is configured such that a peripheral portion along a front side of the tray for a semiconductor integrated circuit component is formed to be larger than the peripheral portion. Slightly inside, a peripheral wall having a predetermined height is formed. When a plurality of the trays for semiconductor integrated circuit parts are stacked, the peripheral edge portion of the front side abuts against another tray for semiconductor integrated circuit parts located on the upper stage. The peripheral edge portion of the back side surface is characterized by being located within 3.4 cm along each end edge of the two side surfaces extending in the length direction of the tray for semiconductor integrated circuit parts or the two side surfaces extending in the width direction. A cutout is formed in the outer peripheral wall of a part above at least one of the four parts for bundling a plurality of the semiconductor integrated circuit parts with a strap of a tray.