TWI586101B - Transimpedance amplifier - Google Patents
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本發明乃是關於一種轉阻放大器(Trans-Conductance Amplifier;TIA),特別是指一種將縮短傳輸延遲縮短的轉阻放大器。 The present invention relates to a Trans-Conductance Amplifier (TIA), and more particularly to a transimpedance amplifier that shortens the transmission delay.
在光通訊系統中,光接收器之增益與靈敏度是很重要的特性,必須同時提高兩者使傳輸效能達到最佳化。傳統之光接收器所採用的單級(Single-Stage)轉阻放大器的結構簡單,但由於整體增益及頻寬特性與放大器之輸出端阻抗大小有密切關係,單級轉阻放大器的架構會因其電壓增益不足而具有無法獲得高靈敏度的問題。 In optical communication systems, the gain and sensitivity of the optical receiver are important characteristics, and both must be optimized to optimize transmission performance. The single-stage transimpedance amplifier used in the conventional optical receiver has a simple structure, but since the overall gain and bandwidth characteristics are closely related to the impedance of the output of the amplifier, the architecture of the single-stage transimpedance amplifier will be The voltage gain is insufficient and there is a problem that high sensitivity cannot be obtained.
因此,一般來說會採用多級(Multi-Stage)轉阻放大器的架構來設計光接收器,以實現高電壓增益。此種多級轉阻放大器的架構通常包含多個串聯的單一放大器,但由於光接收器之輸入電流係取決於光電二極體所接收的紅外線,因此輸入電流之最大值與最小值可能存在四倍的差距。輸入電流之最大值與最小值之間的差距將拉大轉阻放大器之輸出端電位由高至低的傳輸延遲(Propagation Delay)。 Therefore, the architecture of a multi-stage transimpedance amplifier is generally used to design an optical receiver to achieve high voltage gain. The architecture of such a multi-stage transimpedance amplifier usually includes a plurality of single amplifiers connected in series, but since the input current of the optical receiver depends on the infrared rays received by the photodiode, the maximum and minimum values of the input current may exist four. Double the gap. The difference between the maximum and minimum values of the input current will increase the Propagation Delay from the high to low potential of the output of the transimpedance amplifier.
本發明實施例提供一種轉阻放大器,包括第一級轉導放大器、第二級轉導放大器、第三級放大器與反饋電路。第一級轉導 放大器具有一輸入端與一輸出端,第一級轉導放大器之輸入端電性連接於輸入電流源,以接收第一輸入訊號,再由第一級轉導放大器之輸出端輸出第一輸出訊號。第二級轉導放大器,具有一輸入端與一輸出端,第二級轉導放大器之輸入端電性連接於第一級轉導放大器之輸出端,以接收第一輸出訊號,再由第二級轉導放大器之輸出端輸出第二輸出訊號。第三級放大器,具有一輸入端與一輸出端,第三級放大器之輸入端電性連接於第二級轉導放大器之輸出端,以接收第二輸出訊號,再由第三級放大器之輸出端輸出第三輸出訊號。反饋電路之一端電性連接於第一級轉導放大器之輸入端,反饋電路之另一端電性連接於第三級放大器之輸出端,以穩定第三輸出訊號。其中,第三級放大器係由第一輸出級與第二輸出級所組成。 Embodiments of the present invention provide a transimpedance amplifier including a first stage transconductance amplifier, a second stage transconductance amplifier, a third stage amplifier, and a feedback circuit. First level transduction The amplifier has an input end and an output end. The input end of the first stage transduction amplifier is electrically connected to the input current source to receive the first input signal, and the output end of the first stage transduction amplifier outputs the first output signal. . The second stage transconductance amplifier has an input end and an output end, and the input end of the second stage transduction amplifier is electrically connected to the output end of the first stage transconductance amplifier to receive the first output signal, and then the second The output of the stage transconductance amplifier outputs a second output signal. The third stage amplifier has an input end and an output end, and the input end of the third stage amplifier is electrically connected to the output end of the second stage transconductance amplifier to receive the second output signal, and then the output of the third stage amplifier The terminal outputs a third output signal. One end of the feedback circuit is electrically connected to the input end of the first stage transconductance amplifier, and the other end of the feedback circuit is electrically connected to the output end of the third stage amplifier to stabilize the third output signal. The third stage amplifier is composed of a first output stage and a second output stage.
在本發明其中一個實施例中,第三級放大器之第一輸出級包括電流源,其一端電性連接於供應電壓源,以提供穩定電流,其另一端連接於第三級放大器之輸出端。 In one embodiment of the invention, the first output stage of the third stage amplifier includes a current source having one end electrically coupled to the supply voltage source to provide a regulated current and the other end coupled to the output of the third stage amplifier.
在本發明其中一個實施例中,第三級放大器之第二輸出級包括第一NMOS電晶體與第二PMOS電晶體。第一NMOS電晶體與第二PMOS電晶體之閘極相連接以形成第三級放大器之輸入端。第二PMOS電晶體之源極電性連接於供應電壓源,且第二PMOS電晶體之汲極與第一NMOS電晶體之汲極相連接於第三級放大器之輸出端。第一NMOS電晶體之汲極接地。 In one embodiment of the invention, the second output stage of the third stage amplifier comprises a first NMOS transistor and a second PMOS transistor. The first NMOS transistor is coupled to the gate of the second PMOS transistor to form an input of the third stage amplifier. The source of the second PMOS transistor is electrically connected to the supply voltage source, and the drain of the second PMOS transistor is connected to the drain of the first NMOS transistor to the output of the third stage amplifier. The drain of the first NMOS transistor is grounded.
在本發明其中一個實施例中,轉阻放大器包括參考電壓電路。參考電壓電路包括定電流單元、第三電晶體、第四電晶體與第五電晶體。定電流單元包含電流鏡與偏壓電流源。第三電晶體之閘極、第四電晶體之閘極與電流鏡相互並聯。第四電晶體之汲極形成參考電壓電路之輸出端,以輸出參考電壓訊號。第五電晶體並聯於定電流單元,並且電性連接於供應電壓源與定電流源之輸出端之間。 In one of the embodiments of the invention, the transimpedance amplifier includes a reference voltage circuit. The reference voltage circuit includes a constant current unit, a third transistor, a fourth transistor, and a fifth transistor. The constant current unit includes a current mirror and a bias current source. The gate of the third transistor, the gate of the fourth transistor, and the current mirror are connected in parallel with each other. The drain of the fourth transistor forms an output of the reference voltage circuit to output a reference voltage signal. The fifth transistor is connected in parallel to the constant current unit and electrically connected between the supply voltage source and the output terminal of the constant current source.
綜上所述,本發明實施例所提出之轉阻放大器藉由設置以第一輸出級與第二輸出級所組成之第三級放大器,其中,第一輸出級之電路設計係屬於A類放大器之組態,且第二輸出級之電路設計係屬於AB類放大器之組態,如此一來,便可使得轉阻放大器同時具有A類放大器與AB類放大器之優勢,得以縮短轉阻放大器之傳輸延遲的時間。另一方面,於本發明實施例所提出之轉阻放大器之參考電壓電路中,第五電晶體係被設置並聯於定電流單元,且電性連接於供應電壓源與參考電壓電路之輸出端之間,以改善參考電壓訊號因溫度變化或製造過程中的產生之變化所造成的不穩定。 In summary, the transimpedance amplifier of the embodiment of the present invention is provided with a third-stage amplifier composed of a first output stage and a second output stage, wherein the circuit design of the first output stage belongs to the class A amplifier. The configuration, and the circuit design of the second output stage belongs to the configuration of the class AB amplifier, so that the transimpedance amplifier can have the advantages of the class A amplifier and the class AB amplifier at the same time, thereby shortening the transmission of the transimpedance amplifier. Delayed time. On the other hand, in the reference voltage circuit of the transimpedance amplifier proposed in the embodiment of the present invention, the fifth electro-crystal system is disposed in parallel with the constant current unit, and is electrically connected to the output end of the supply voltage source and the reference voltage circuit. To improve the instability of the reference voltage signal due to temperature changes or changes in the manufacturing process.
為使能更進一步瞭解本發明之特徵及技術內容,請參閱以下有關本發明之詳細說明與附圖,但是此等說明與所附圖式僅係用來說明本發明,而非對本發明的權利範圍作任何的限制。 The detailed description of the present invention and the accompanying drawings are to be understood by the claims The scope is subject to any restrictions.
1、2、3‧‧‧轉阻放大器 1, 2, 3‧‧‧ Transimpedance amplifier
Iin‧‧‧輸入電流源 Iin‧‧‧ input current source
TCA1‧‧‧第一級轉導放大器 TCA1‧‧‧First Stage Transconductance Amplifier
TCA2‧‧‧第二級轉導放大器 TCA2‧‧‧Second stage transconductance amplifier
TSA3‧‧‧第三級放大器 TSA3‧‧‧3rd stage amplifier
OUT1‧‧‧第一輸出級 OUT1‧‧‧ first output stage
OUT2‧‧‧第二輸出級 OUT2‧‧‧second output stage
TIAp‧‧‧第三輸出訊號 TIAp‧‧‧ third output signal
TIAn‧‧‧參考電壓訊號 TIAn‧‧‧ reference voltage signal
MN1‧‧‧第一NMOS電晶體 MN1‧‧‧First NMOS transistor
MN2‧‧‧第二NMOS電晶體 MN2‧‧‧Second NMOS transistor
MP2‧‧‧第二PMOS電晶體 MP2‧‧‧second PMOS transistor
MP3‧‧‧第三PMOS電晶體 MP3‧‧‧ Third PMOS transistor
MP4‧‧‧第四PMOS電晶體 MP4‧‧‧fourth PMOS transistor
MP5‧‧‧第五PMOS電晶體 MP5‧‧‧ Fifth PMOS transistor
MN6‧‧‧第六NMOS電晶體 MN6‧‧‧ sixth NMOS transistor
FB‧‧‧反饋電路 FB‧‧‧ feedback circuit
RC‧‧‧電阻器網路 RC‧‧‧Resistor Network
B1‧‧‧雙極性接面電晶體 B1‧‧‧Bipolar junction transistor
C1、C2‧‧‧電容器 C1, C2‧‧‧ capacitor
R1、R2、R3、R4‧‧‧電阻器 R1, R2, R3, R4‧‧‧ resistors
Vcc‧‧‧供應電壓源 Vcc‧‧‧ supply voltage source
I’‧‧‧定電流單元 I’‧‧‧ Constant current unit
Is‧‧‧電流源 Is‧‧‧current source
MR‧‧‧電流鏡 MR‧‧‧current mirror
REF‧‧‧參考電壓電路 REF‧‧‧reference voltage circuit
IBias‧‧‧偏壓電流源 I Bias ‧‧‧ bias current source
VM、Vm、Ref1、Ref2‧‧‧曲線 V M , V m , Ref1, Ref2‧‧‧ curves
圖1是本發明實施例所提供之轉阻放大器之電路圖。 1 is a circuit diagram of a transimpedance amplifier provided by an embodiment of the present invention.
圖2是本發明另一實施例所提供之轉阻放大器之電路圖。 2 is a circuit diagram of a transimpedance amplifier provided by another embodiment of the present invention.
圖3是本發明另一實施例所提供之轉阻放大器之電路圖。 3 is a circuit diagram of a transimpedance amplifier provided by another embodiment of the present invention.
圖4A是圖2所繪示之實施例所提供之轉阻放大器中參考電壓訊號隨溫度變化之曲線圖。 4A is a graph of a reference voltage signal as a function of temperature in a transimpedance amplifier provided by the embodiment of FIG. 2.
圖4B是圖3所繪示之實施例所提供之轉阻放大器中參考電壓訊號隨溫度變化之曲線圖。 4B is a graph of a reference voltage signal as a function of temperature in a transimpedance amplifier provided by the embodiment of FIG. 3.
在下文將參看隨附圖式更充分地描述各種例示性實施例,在隨附圖式中展示一些例示性實施例。然而,本發明概念可能以許多不同形式來體現,且不應解釋為限於本文中所闡述之例示性實施例。確切而言,提供此等例示性實施例使得本發明將為詳盡且 完整,且將向熟習此項技術者充分傳達本發明概念的範疇。在諸圖式中,可能為了清楚而誇示了層及區之大小及相對大小。類似數字始終指示類似元件。 Various illustrative embodiments are described more fully hereinafter with reference to the accompanying drawings. However, the inventive concept may be embodied in many different forms and should not be construed as being limited to the illustrative embodiments set forth herein. Rather, these exemplary embodiments are provided so that the invention will be exhaustive and It is complete and will fully convey the scope of the inventive concept to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity. Similar numbers always indicate similar components.
應理解,雖然本文中可能使用術語第一、第二、第三等來描述各種元件,但此等元件不應受此等術語限制。此等術語乃用以區分一元件與另一元件。因此,下文論述之第一元件可稱為第二元件而不偏離本發明概念之教示。如本文中所使用,術語「及/或」包括相關聯之列出項目中之任一者及一或多者之所有組合。 It will be understood that, although the terms first, second, third, etc. may be used herein to describe various elements, such elements are not limited by the terms. These terms are used to distinguish one element from another. Thus, a first element discussed below could be termed a second element without departing from the teachings of the inventive concept. As used herein, the term "and/or" includes any of the associated listed items and all combinations of one or more.
請參照圖1,圖1是本發明實施例所提供之轉阻放大器之電路圖。如圖1所示,轉阻放大器1包括第一級轉導放大器TCA1、第二級轉導放大器TCA2、第三級放大器TSA3與反饋電路FB。第一級轉導放大器TCA1具有一輸入端與一輸出端,第一級轉導放大器TCA1之輸入端電性連接於輸入電流源Iin,以接收第一輸入訊號,再由第一級轉導放大器TCA1之輸出端輸出第一輸出訊號。第二級轉導放大器TCA2具有一輸入端與一輸出端,第二級轉導放大器TCA2之輸入端電性連接於第一級轉導放大器TCA1之輸出端,以接收第一輸出訊號,再由第二級轉導放大器TCA2之輸出端輸出第二輸出訊號。第三級放大器TSA3,具有一輸入端與一輸出端,第三級放大器TSA3之輸入端電性連接於第二級轉導放大器TCA2之輸出端,以接收第二輸出訊號,再由第三級放大器TSA3之輸出端輸出第三輸出訊號TIAp。反饋電路FB之一端電性連接於第一級轉導放大器TCA1之輸入端,反饋電路FB之另一端電性連接於第三級放大器TSA3之輸出端,以穩定第三輸出訊號TIAp。其中,第三級放大器TSA3包括第一輸出級OUT1與第二輸出級OUT2所組成。 Please refer to FIG. 1. FIG. 1 is a circuit diagram of a transimpedance amplifier according to an embodiment of the present invention. As shown in FIG. 1, the transimpedance amplifier 1 includes a first stage transconductance amplifier TCA1, a second stage transduction amplifier TCA2, a third stage amplifier TSA3, and a feedback circuit FB. The first stage transconductance amplifier TCA1 has an input end and an output end. The input end of the first stage transduction amplifier TCA1 is electrically connected to the input current source Iin to receive the first input signal, and then the first stage transconductance amplifier The output of TCA1 outputs the first output signal. The second stage transconductance amplifier TCA2 has an input end and an output end. The input end of the second stage transduction amplifier TCA2 is electrically connected to the output end of the first stage transduction amplifier TCA1 to receive the first output signal, and then The output of the second stage transduction amplifier TCA2 outputs a second output signal. The third stage amplifier TSA3 has an input end and an output end. The input end of the third stage amplifier TSA3 is electrically connected to the output end of the second stage transconductance amplifier TCA2 to receive the second output signal, and then the third stage. The output of the amplifier TSA3 outputs a third output signal TIAp. One end of the feedback circuit FB is electrically connected to the input end of the first-stage transduction amplifier TCA1, and the other end of the feedback circuit FB is electrically connected to the output end of the third-stage amplifier TSA3 to stabilize the third output signal TIAp. The third stage amplifier TSA3 includes a first output stage OUT1 and a second output stage OUT2.
接下來要教示的,是進一步說明轉阻放大器1的工作原理。如圖1所示,本實施例之轉阻放大器1之第三級放大器TSA3係由第一 輸出級OUT1與第二輸出級OUT2所組成。第一輸出級OUT1包括電流源Is,其中電流源Is之一端電性連接於供應電壓源Vcc,以提供穩定電流,電流源Is之另一端連接於第三級放大器TSA3之輸出端。第二輸出級OUT2包括第一NMOS電晶體MN1與第二PMOS電晶體MP2。第一NMOS電晶體MN1與第二PMOS電晶體MP2之閘極相連接以形成第三級放大器TSA3之輸入端。第二PMOS電晶體MP2之源極電性連接於供應電壓源Vcc,且第二PMOS電晶體MP2之汲極與第一NMOS電晶體MN1之汲極相連接於第三級放大器TSA3之輸出端。第一NMOS電晶體MN1之源極接地。也就是說,第一輸出級OUT1屬於A類輸出級,且第二輸出級OUT2屬於AB類輸出級。此外,於本實施例中,第三級放大器TSA3可進一步包括第二NMOS電晶體MN2,如圖1所示,第二NMOS電晶體MN2之閘極與源極相連接於第三級放大器TSA3之輸出端。 What is to be taught next is to further explain the working principle of the transimpedance amplifier 1. As shown in FIG. 1, the third stage amplifier TSA3 of the transimpedance amplifier 1 of the present embodiment is first The output stage OUT1 is composed of the second output stage OUT2. The first output stage OUT1 includes a current source Is, wherein one end of the current source Is is electrically connected to the supply voltage source Vcc to provide a stable current, and the other end of the current source Is is connected to the output end of the third stage amplifier TSA3. The second output stage OUT2 includes a first NMOS transistor MN1 and a second PMOS transistor MP2. The first NMOS transistor MN1 is coupled to the gate of the second PMOS transistor MP2 to form an input terminal of the third stage amplifier TSA3. The source of the second PMOS transistor MP2 is electrically connected to the supply voltage source Vcc, and the drain of the second PMOS transistor MP2 is connected to the drain of the first NMOS transistor MN1 to the output terminal of the third-stage amplifier TSA3. The source of the first NMOS transistor MN1 is grounded. That is to say, the first output stage OUT1 belongs to the class A output stage, and the second output stage OUT2 belongs to the class AB output stage. In addition, in this embodiment, the third stage amplifier TSA3 may further include a second NMOS transistor MN2. As shown in FIG. 1, the gate and the source of the second NMOS transistor MN2 are connected to the third stage amplifier TSA3. Output.
於本實施例中,第一輸出級OUT1係為與一參考電壓源(未圖示)連接之電流源Is,其提之供穩定電流為定值。當前述之輸入電流源Iin開始輸入電流後,流經第一NMOS電晶體MN1之電流增加,且同時流經第二PMOS電晶體MP2之電流減少,使得第三輸出訊號TIAp之電壓值增加。最終,轉阻放大器1的輸出電壓係由反饋電路FB中的電阻器R1與R2,以及雙極性接面電晶體B1之基極-發射極電壓所控制。 In this embodiment, the first output stage OUT1 is a current source Is connected to a reference voltage source (not shown), which is provided for the steady current to be a constant value. When the input current source Iin starts to input the current, the current flowing through the first NMOS transistor MN1 increases, and the current flowing through the second PMOS transistor MP2 decreases, so that the voltage value of the third output signal TIAp increases. Finally, the output voltage of the transimpedance amplifier 1 is controlled by the resistors R1 and R2 in the feedback circuit FB and the base-emitter voltage of the bipolar junction transistor B1.
值得注意地是,本實施例中,由於第三級放大器TSA3同時具有A類輸出級與AB類輸出級,故可兼具A類輸出級與AB類輸出級於電路設計上的優點。也就是說,第一輸出級OUT1的元件維持導通狀態,提供較佳的線性度,同時,第二輸出級OUT2又可進一步改善第三級放大器TSA3效率。 It should be noted that, in this embodiment, since the third-stage amplifier TSA3 has both the class A output stage and the class AB output stage, the circuit design advantages of the class A output stage and the class AB output stage can be combined. That is to say, the components of the first output stage OUT1 maintain the on state, providing better linearity, and at the same time, the second output stage OUT2 can further improve the efficiency of the third stage amplifier TSA3.
另一方面,於本實施例中須說明的是,第一級轉導放大器TCA1與第二級轉導放大器TCA2均為A類輸出級,且第一級轉導放大器TCA1、第二級轉導放大器TCA2與第三級放大器TSA3放大器 之間係以直接耦接之方式串聯。也就是說,第一級轉導放大器TCA1、第二級轉導放大器TCA2與第三級放大器TSA3放大器之間未有設置電容器,因此於進行電路設計時,須特別設計各電晶體之間的尺寸比例,如此一來便可以改善整體轉阻放大器對於溫度與不同製程過程的敏感度。 On the other hand, it should be noted in the embodiment that the first stage transconductance amplifier TCA1 and the second stage transduction amplifier TCA2 are both class A output stages, and the first stage transduction amplifier TCA1, the second stage transconductance amplifier TCA2 and third stage amplifier TSA3 amplifier The series are connected in series by direct coupling. That is to say, there is no capacitor between the first stage transconductance amplifier TCA1, the second stage transduction amplifier TCA2 and the third stage amplifier TSA3 amplifier, so the size between the transistors must be specially designed when designing the circuit. The ratio, in this way, can improve the sensitivity of the overall transimpedance amplifier to temperature and different process processes.
除此之外,請復參照圖1,本實施例中之反饋電路FB包括有雙極性接面電晶體B1與電阻器網路RC。其中,雙極性接面電晶體B1之射極電性連接於輸入電流源Iin,雙極性接面電晶體B1之基極與集極相連接於第三級放大器TSA3之輸出端。另外,電阻器網路RC係並聯於雙極性接面電晶體B1,且包括有由三個電阻器R1~R3所組成的橋接式T形網路與電容器C1,其中,電容器C1之一端電性連接於橋接式T形網路,且電容器C1之另一端接地。進一步說明,反饋電路FB可增加本實施例之轉阻放大器1的增益,其中,反饋電路FB中的雙極性接面電晶體B1係用以箝制第三輸出訊號TIAp,以穩定第三輸出訊號TIAp。 In addition, referring to FIG. 1, the feedback circuit FB in this embodiment includes a bipolar junction transistor B1 and a resistor network RC. The emitter of the bipolar junction transistor B1 is electrically connected to the input current source Iin, and the base and collector of the bipolar junction transistor B1 are connected to the output terminal of the third stage amplifier TSA3. In addition, the resistor network RC is connected in parallel to the bipolar junction transistor B1, and includes a bridged T-shaped network composed of three resistors R1 R R3 and a capacitor C1, wherein one end of the capacitor C1 is electrically Connected to a bridged T-shaped network with the other end of capacitor C1 grounded. Further, the feedback circuit FB can increase the gain of the transimpedance amplifier 1 of the embodiment. The bipolar junction transistor B1 in the feedback circuit FB is used to clamp the third output signal TIAp to stabilize the third output signal TIAp. .
為了更詳細地說明本發明所述之轉阻放大器的電路設計,以下將再舉一個實施例來作更進一步的說明。 In order to explain the circuit design of the transimpedance amplifier of the present invention in more detail, an embodiment will be further described below.
在接下來的實施例中,將描述不同於上述圖1實施例之部分,且其餘省略部分與上述圖1實施例之部分相同。此外,為說明便利起見,相似之參考數字或標號指示相似之元件。 In the following embodiments, portions different from the above-described embodiment of Fig. 1 will be described, and the remaining omitted portions are the same as those of the above-described embodiment of Fig. 1. In addition, for the sake of convenience, like reference numerals or numerals indicate similar elements.
請參照圖2,圖2是本發明另一實施例所提供之轉阻放大器之電路圖。與前述圖1所繪示之實施例之間的差異在於,於本實施例中,轉阻放大器2更包括有參考電壓電路,並聯於第三級放大器TSA3,且包括定電流單元I’、第三電晶體MP3、第四電晶體MP4、第六電晶體MN6與電阻器R4。如圖2所示,定電流單元I’包含電流鏡MR與偏壓電流源IBias。第三電晶體MP3、第四電晶體MP4與電流鏡MR相互並聯,且第四電晶體MP4之汲極形成參 考電壓電路REF之輸出端,以輸出參考電壓訊號TIAn。除此之外,電阻器R4之一端電性連接於第六電晶體MN6之汲極與閘極,且電阻器R4之另一端電性連接於參考電壓電路REF之輸出端。 Please refer to FIG. 2. FIG. 2 is a circuit diagram of a transimpedance amplifier according to another embodiment of the present invention. The difference between the embodiment shown in FIG. 1 is that, in this embodiment, the transimpedance amplifier 2 further includes a reference voltage circuit, is connected in parallel to the third-stage amplifier TSA3, and includes a constant current unit I', The tri-crystal transistor MP3, the fourth transistor MP4, the sixth transistor MN6, and the resistor R4. As shown in FIG. 2, the constant current unit I' includes a current mirror MR and a bias current source I Bias . The third transistor MP3, the fourth transistor MP4 and the current mirror MR are connected in parallel with each other, and the drain of the fourth transistor MP4 forms an output terminal of the reference voltage circuit REF to output the reference voltage signal TIAn. In addition, one end of the resistor R4 is electrically connected to the drain and the gate of the sixth transistor MN6, and the other end of the resistor R4 is electrically connected to the output end of the reference voltage circuit REF.
同於圖1所繪示之實施例,本實施例之第一級轉導放大器TCA1與第二級轉導放大器TCA2均為A類輸出級,而第三級放大器TSA3則同時具有A類輸出級與AB類輸出級,故可兼具A類輸出級與AB類輸出級於電路設計上的優點。亦即,第一輸出級OUT1的元件維持導通狀態,提供較佳的線性度,同時,第二輸出級OUT2又可進一步改善第三級放大器TSA3功率效率。同樣地,本實施例之第一級轉導放大器TCA1、第二級轉導放大器TCA2與第三級放大器TSA3放大器之間亦係以直接耦接之方式串聯,且各電晶體之間的尺寸比例係經由特別設計,如此一來便可改善整體轉阻放大器對於溫度與不同製程過程的敏感度。 As with the embodiment shown in FIG. 1, the first-stage transconductance amplifier TCA1 and the second-stage transduction amplifier TCA2 of the present embodiment are both Class A output stages, and the third stage amplifier TSA3 has a Class A output stage. With the class AB output stage, it can combine the advantages of class A output stage and class AB output stage in circuit design. That is, the components of the first output stage OUT1 maintain the on state, providing better linearity, and at the same time, the second output stage OUT2 can further improve the power efficiency of the third stage amplifier TSA3. Similarly, the first stage transconductance amplifier TCA1, the second stage transduction amplifier TCA2 and the third stage amplifier TSA3 amplifier of the embodiment are also connected in series by direct coupling, and the size ratio between the transistors It is specially designed to improve the sensitivity of the overall transimpedance amplifier to temperature and process.
除此之外,關於本實施例中之反饋電路FB的電路設計係同於圖1所繪示之實施例中的反饋電路,且同樣地,反饋電路FB可增加本實施例之轉阻放大器2的增益,其中,反饋電路FB中的雙極性接面電晶體B1可達到箝制第三輸出訊號TIAp,以穩定第三輸出訊號TIAp的效果。 In addition, the circuit design of the feedback circuit FB in this embodiment is the same as the feedback circuit in the embodiment shown in FIG. 1, and similarly, the feedback circuit FB can increase the transimpedance amplifier 2 of the embodiment. The gain of the bipolar junction transistor B1 in the feedback circuit FB can clamp the third output signal TIAp to stabilize the effect of the third output signal TIAp.
為了更詳細地說明本發明所述之轉阻放大器的電路設計,以下將再舉一個實施例來作更進一步的說明。 In order to explain the circuit design of the transimpedance amplifier of the present invention in more detail, an embodiment will be further described below.
在接下來的實施例中,將描述不同於上述圖2實施例之部分,且其餘省略部分與上述圖2實施例之部分相同。此外,為說明便利起見,相似之參考數字或標號指示相似之元件。 In the following embodiments, portions different from the above-described embodiment of Fig. 2 will be described, and the remaining omitted portions are the same as those of the above-described embodiment of Fig. 2. In addition, for the sake of convenience, like reference numerals or numerals indicate similar elements.
請參照圖3,圖3是本發明另一實施例所提供之轉阻放大器之電路圖。與前述圖2所繪示之實施例之間的差異在於,於本實施例之轉阻放大器3中,參考電壓電路REF更包括第五電晶體MP5。第五電晶體MP5並聯於定電流單元I’,並且電性連接於供應電壓 源Vcc與定電流單元I’之輸出端之間。 Please refer to FIG. 3. FIG. 3 is a circuit diagram of a transimpedance amplifier according to another embodiment of the present invention. The difference from the embodiment shown in FIG. 2 above is that in the transimpedance amplifier 3 of the present embodiment, the reference voltage circuit REF further includes a fifth transistor MP5. The fifth transistor MP5 is connected in parallel to the constant current unit I' and is electrically connected to the supply voltage The source Vcc is between the output terminal of the constant current unit I'.
接著,請同時參照圖4A與圖4B,圖4A是圖2所繪示之實施例所提供之轉阻放大器中參考電壓訊號隨溫度變化之曲線圖,且圖4B是圖3所繪示之實施例所提供之轉阻放大器中參考電壓訊號隨溫度變化之曲線圖。 4A and FIG. 4B, FIG. 4A is a graph of a reference voltage signal as a function of temperature in the transimpedance amplifier provided in the embodiment of FIG. 2, and FIG. 4B is an implementation of FIG. The graph of the reference voltage signal as a function of temperature in the transimpedance amplifier provided in the example.
若溫度變化為-40度C至125度C,如圖4A所示,於圖4A中,曲線Vm顯示了轉阻放大器3之第三輸出訊號TIAp於低電位下因溫度所造成的變化,曲線VM顯示了轉阻放大器3之第三輸出訊號TIAp於高電位下因溫度所造成的,且Ref1顯示了參考電壓訊號因溫度所造成的變化。另一方面,如圖4B所示,於圖4B中,曲線Vm顯示了轉阻放大器3之第三輸出訊號TIAp於低電位下因溫度所造成的變化,曲線VM顯示了轉阻放大器3之第三輸出訊號TIAp於高電位下因溫度所造成的變化,且Ref2顯示了參考電壓訊號因溫度所造成的變化。 When the temperature is -40 degrees C to 125 degrees C, shown in Figure 4A, in Figure 4A, the curve shows the variation in V m transimpedance amplifier TIAp 3 of the third output signal at a low potential due to the temperature caused by The curve V M shows that the third output signal TIAp of the transimpedance amplifier 3 is caused by temperature at a high potential, and Ref1 shows the change of the reference voltage signal due to temperature. On the other hand, as shown in FIG. 4B, in FIG. 4B, curve V m shows a third transimpedance amplifier output signal TIAP 3 at a low potential due to the change in temperature caused by the curve V M 3 shows a transimpedance amplifier The third output signal TIAp changes due to temperature at a high potential, and Ref2 shows the change in the reference voltage signal due to temperature.
將圖4A與圖4B相比較便可得知,圖3所繪示之實施例中的參考電壓電路REF的參考電壓訊號之電壓變化率係近似或等於第三輸出訊號TIAp之電壓變化率,但圖2所繪示之實施例中的參考電壓電路REF的參考電壓訊號之電壓變化率卻不然。 4A and FIG. 4B, the voltage change rate of the reference voltage signal of the reference voltage circuit REF in the embodiment shown in FIG. 3 is approximately equal to or equal to the voltage change rate of the third output signal TIAp, but The voltage change rate of the reference voltage signal of the reference voltage circuit REF in the embodiment shown in FIG. 2 is not.
進一步說明,相較於圖2所繪示之實施例中的參考電壓電路REF,圖3所繪示之實施例中的參考電壓電路REF額外設置了第五電晶體MP5,並將第五電晶體MP5並聯於定電流單元I’,且電性連接於供應電壓源Vcc與定電流單元I’之輸出端之間,如此一來便可藉由補償因溫度變化造成的電壓變化,進而使得參考電壓訊號之電壓變化率係近似或等於該第三輸出訊號之電壓變化率,以達到穩定參考電壓訊號的效果。 Further, the reference voltage circuit REF in the embodiment illustrated in FIG. 3 additionally sets the fifth transistor MP5 and the fifth transistor, compared to the reference voltage circuit REF in the embodiment illustrated in FIG. 2 . The MP5 is connected in parallel with the constant current unit I', and is electrically connected between the supply voltage source Vcc and the output end of the constant current unit I', so that the reference voltage can be compensated by compensating for the voltage change caused by the temperature change. The voltage change rate of the signal is approximately equal to or equal to the voltage change rate of the third output signal to achieve the effect of stabilizing the reference voltage signal.
另須說明的是,同於圖1與圖2所繪示之實施例,本實施例之第一級轉導放大器TCA1與第二級轉導放大器TCA2亦均為A類輸出級,而第三級放大器TSA3也同時具有A類輸出級與AB 類輸出級,故可兼具A類輸出級與AB類輸出級於電路設計上的優點。亦即,第一輸出級OUT1的元件維持導通狀態,提供較佳的線性度,同時,第二輸出級OUT2又可進一步改善第三級放大器TSA3的功率效率。同樣地,本實施例之第一級轉導放大器TCA1、第二級轉導放大器TCA2與第三級放大器TSA3放大器之間亦係以直接耦接之方式串聯,且各電晶體之間的尺寸比例係經由特別設計,如此一來便可改善整體轉阻放大器對於溫度與不同製程過程的敏感度。 It should be noted that, as in the embodiment illustrated in FIG. 1 and FIG. 2, the first-stage transduction amplifier TCA1 and the second-stage transduction amplifier TCA2 of the present embodiment are also Class A output stages, and third. Stage amplifier TSA3 also has Class A output stage and AB Class output stage, so it can combine the advantages of class A output stage and class AB output stage in circuit design. That is, the components of the first output stage OUT1 maintain the on state, providing better linearity, and at the same time, the second output stage OUT2 can further improve the power efficiency of the third stage amplifier TSA3. Similarly, the first stage transconductance amplifier TCA1, the second stage transduction amplifier TCA2 and the third stage amplifier TSA3 amplifier of the embodiment are also connected in series by direct coupling, and the size ratio between the transistors It is specially designed to improve the sensitivity of the overall transimpedance amplifier to temperature and process.
除此之外,關於本實施例中之反饋電路FB的電路設計係同於圖1與圖2所繪示之實施例中的反饋電路FB,且同樣地,反饋電路FB可增加本實施例之轉阻放大器3的交流增益,其中,反饋電路FB中的雙極性接面電晶體B1可達到箝制第三輸出訊號TIAp,以穩定第三輸出訊號TIAp的效果。 In addition, the circuit design of the feedback circuit FB in this embodiment is the same as the feedback circuit FB in the embodiment shown in FIG. 1 and FIG. 2, and similarly, the feedback circuit FB can increase the embodiment. The AC gain of the transimpedance amplifier 3, wherein the bipolar junction transistor B1 in the feedback circuit FB can clamp the third output signal TIAp to stabilize the effect of the third output signal TIAp.
綜上所述,本發明實施例所提出之轉阻放大器藉由設置以第一輸出級與第二輸出級所組成之第三級放大器,其中,第一輸出級之電路設計係屬於A類輸出級,且第二輸出級之電路設計係屬於AB類輸出級,如此一來,便可使得轉阻放大器同時具有A類放大器與AB類放大器之優勢,得以縮短轉阻放大器之傳輸延遲的時間。另一方面,於本發明實施例所提出之轉阻放大器之參考電壓電路中,第五電晶體係被設置並聯於定電流單元,且電性連接於供應電壓源與定電流單元之輸出端之間,以改善參考電壓訊號因溫度變化或不同製程方式所造成的不穩定。 In summary, the transimpedance amplifier proposed in the embodiment of the present invention is provided with a third-stage amplifier composed of a first output stage and a second output stage, wherein the circuit design of the first output stage belongs to the class A output. The circuit design of the second output stage belongs to the class AB output stage. In this way, the transimpedance amplifier can have the advantages of both the class A amplifier and the class AB amplifier, thereby shortening the transmission delay time of the transimpedance amplifier. On the other hand, in the reference voltage circuit of the transimpedance amplifier proposed in the embodiment of the present invention, the fifth electro-crystal system is disposed in parallel with the constant current unit, and is electrically connected to the output end of the supply voltage source and the constant current unit. In order to improve the instability of the reference voltage signal due to temperature changes or different process methods.
以上所述僅為本發明之實施例,其並非用以侷限本發明之專利範圍。 The above description is only an embodiment of the present invention, and is not intended to limit the scope of the invention.
1‧‧‧轉阻放大器 1‧‧‧Transistor Amplifier
Iin‧‧‧輸入電流源 Iin‧‧‧ input current source
Is‧‧‧電流源 Is‧‧‧current source
TCA1‧‧‧第一級轉導放大器 TCA1‧‧‧First Stage Transconductance Amplifier
TCA2‧‧‧第二級轉導放大器 TCA2‧‧‧Second stage transconductance amplifier
TSA3‧‧‧第三級放大器 TSA3‧‧‧3rd stage amplifier
OUT1‧‧‧第一輸出級 OUT1‧‧‧ first output stage
OUT2‧‧‧第二輸出級 OUT2‧‧‧second output stage
TIAp‧‧‧第三輸出訊號 TIAp‧‧‧ third output signal
MN1‧‧‧第一NMOS電晶體 MN1‧‧‧First NMOS transistor
MN2‧‧‧第二NMOS電晶體 MN2‧‧‧Second NMOS transistor
MP2‧‧‧第二PMOS電晶體 MP2‧‧‧second PMOS transistor
FB‧‧‧反饋電路 FB‧‧‧ feedback circuit
RC‧‧‧電阻器網路 RC‧‧‧Resistor Network
B1‧‧‧雙極性接面電晶體 B1‧‧‧Bipolar junction transistor
C1‧‧‧電容器 C1‧‧‧ capacitor
R1、R2、R3‧‧‧電阻器 R1, R2, R3‧‧‧ resistors
Vcc‧‧‧供應電壓源 Vcc‧‧‧ supply voltage source
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