TWI484721B - Power storage and energy saving power supply of computer equipment battery system - Google Patents

Description

Computer device battery system capable of generating electricity and energy-saving power supply

The invention relates to a circuit for a "computer device battery system capable of generating electricity and energy-saving power supply", in particular, a battery power supply terminal of a computer device using a plurality of microprocessors, a plurality of IV conversion circuits and a central processing unit to generate chips. a plurality of high-speed power generation chips and a microprocessor power generation chip for directly switching power control of the high-speed chip and the low-speed chip of the computer device, and converting the thermal energy of the power generation chip into electric energy to directly store the power of the battery power terminal. The power supply end of a battery of a computer device can be powered by the power of the power saving, power generation compensation, and the power of the battery to improve the battery life, and the power is supplied to the computer device using the smart device of the energy-saving power supply system.

According to the current era of oil shortages and high oil prices, the cost of using petroleum-related energy has increased substantially. At the same time, in order to avoid the drastic changes in the environment caused by excessive carbon dioxide emissions from the use of oil, all parties have advocated energy conservation. Carbon-related practices, in which efficient use of electrical energy for powering computer devices, is a specific practice for energy conservation and carbon reduction.

The use of computer devices (such as portable or handheld devices: notebook computers, tablets, smart phones, etc.), please refer to Figure 1, mainly using the computer device chipset 01 and A battery 02 power supply is electrically connected by the battery 02 The power supply is directly supplied to the respective chip circuits in the computer device chip set 01, and the battery 02 is continuously supplied with electric energy.

However, due to the frequent use of the computer equipment and the length of time, the continuous supply of power to the battery will cause considerable power loss of the battery itself, which seriously affects the working life of the computer device. The user must always prepare the battery storage equipment, or the user. It must be forced to interrupt the computer work, which makes the use of computer devices inconvenient. Therefore, how to improve the battery life of portable or handheld computer devices has become one of the main research topics of computer products manufacturers.

In view of the shortcomings derived from the above prior art, the creator of the case was improved and innovated by the singer, and after painstaking research, he finally succeeded in research and development of a circuit for the "computer system battery system for power generation and energy-saving power supply".

The purpose of the invention is to provide a smart and energy-saving power supply system (Intelligent and Recycle Supply) with energy saving, power generation compensation characteristics and battery life improvement, as shown in Fig. 2, the concept is in a computer An energy-saving battery system 12 is disposed at the end of the device chipset 11, and the internal battery pack and the multi-core microprocessor of the energy-saving battery system 12 are used for power switching control of the high-speed chip and the low-speed chip inside the computer device, and the internal use of the computer device is utilized. The high-speed chip thermal power generation performs power storage on the battery pack, so that the battery power terminal of a computer device can supply power to the computer device by the dual characteristics of energy saving, power generation compensation, and working power supply for improving battery life.

For the above purposes, the technical means for creating the invention is a computer device in a computer device (eg, a notebook computer, a tablet computer, a smart phone, etc.) An energy-saving battery system is disposed at the chipset end, and the computer device chipset is internally provided with a central processing unit and a power generation chip (CPU chip), and a plurality of high-speed power generation chips (high-speed working chips, such as a memory chip, a graphics chip, etc.) and a plurality of low-speed chips (such as a peripheral control chip, such as a peripheral control chip), the central processing unit and the power generation chip are electrically connected to the plurality of high-speed power generation chips and the plurality of low-speed wafer signals, wherein the energy-saving battery system is provided with a battery Group, a first microprocessor and power generation chip (high speed processing core), a second microprocessor chip (low speed processing core), a plurality of high speed IV conversion circuits (high speed current voltage conversion), a plurality of high speed switches, and a plurality of a low-speed IV conversion circuit (low-speed current-voltage conversion), a plurality of low-speed switches, the first microprocessor and the power generation chip being electrically connected to the plurality of high-speed IV conversion circuits and the plurality of high-speed switching signals, the second microprocessor chip Electrically connecting to the plurality of low-speed IV conversion circuits and the plurality of low-speed switching signals, the battery pack and the plurality of high-speed switches, the plurality of low-speed switches, and the The central processing unit and the power generation chip, the first microprocessor and the power generation chip, and the second microprocessor chip power supply electrical connection, the plurality of high speed switches, the plurality of low speed switches and the plurality of high speed IV conversion circuits respectively The plurality of low speed IV conversion circuit power supplies are electrically connected, and the plurality of high speed IV conversion circuits and the plurality of low speed IV conversion circuits are electrically connected to the plurality of high speed power generation chips and the plurality of low speed chip power sources, respectively.

When the computer device chipset is in a normal working period, the first microprocessor and the power generation chip in the energy-saving battery system can respectively detect the computer device through the plurality of high-speed IV conversion circuits at each high-speed chip duty cycle time. The amount of individual chip power supply current of multiple high-speed power generation chips in the chipset, when the individual chip power supply current of some high-speed power generation chips is higher than a certain current level (wafer heavy-load current, part of high-speed power generation chip is busy work) During the period), the first microprocessor and the power generation chip receive the high speed IV conversion circuit to drive the part of the high speed cum After the voltage signal of the individual chip power supply current conversion of the power generation chip, the high-speed switch can be controlled to be closed for conduction, so that the battery pack inside the energy-saving battery system can be converted by the high-speed switch and the high-speed IV during the next high-speed chip work cycle time. The circuit provides the part of the high-speed power generation chip working power (partial high-speed power generation chip normal working time), and the first microprocessor and power generation chip, the part of the high-speed power generation chip and the central processing unit and the power generation chip The thermal energy of the individual power generation chips can be separately converted into electrical energy during the entire high-speed chip duty cycle to automatically compensate the power supply of the battery pack (power generation wafer power generation feedback); in addition, the amount of individual wafer power supply currents of some high-speed power generation chips Below a certain current level (the wafer light load current, part of the high speed power generation chip is in idle operation), the first microprocessor and the power generation chip can control part of the high speed switch as an open circuit to cut off the conduction, so that the battery The group stops providing the part for a longer period of time before the next high-speed wafer duty cycle The high-speed power generation chip operates the power supply power, and in the short cycle time after the high-speed chip work cycle, the first microprocessor and the power generation chip control the part of the high-speed switch to be closed for conduction, so that the battery pack is connected to the high speed. The switch and high-speed IV conversion circuit provide the power of the part of the high-speed power generation chip (some high-speed and power-saving chip operation time).

In addition, when the computer device chipset is in a normal working period, the second microprocessor chip inside the energy-saving battery system can detect the computer separately through the plurality of low-speed IV conversion circuits at each low-speed chip duty cycle time. The amount of individual chip power supply current of a plurality of low-speed chips in the device chip set, when the amount of individual chip power supply current of some low-speed chips is higher than a certain current level (wafer heavy-load current, part of the low-speed chip is in a busy working period), the first After the microprocessor chip receives the low-speed IV conversion circuit to convert the voltage signal of the individual chip power supply currents of the part of the low-speed chip, the low-speed switch can also be operated as a closed circuit to be turned on, so that the energy-saving electricity is The battery pack inside the pool system can provide the low-speed chip working power (partial low-speed chip normal working time) through the low-speed switch and low-speed IV conversion circuit during the next low-speed chip duty cycle; in addition, when the low-speed chip is partially When the amount of individual chip power supply current is lower than a certain current level (the wafer light load current, part of the low speed chip is in idle operation), the second microprocessor chip can also operate part of the low speed switch as an open circuit to cut off the conduction, so that The battery pack stops supplying the portion of the low-speed wafer operating power for a longer period of time before the next low-speed wafer duty cycle, and the second microprocessor wafer is controlled for a shorter period of time after the low-speed wafer duty cycle The low-speed switch is closed for conduction, and the battery pack provides the low-speed wafer working power (partial low-speed chip energy-saving working time) via a low-speed switch and a low-speed IV conversion circuit.

Therefore, the first microprocessor and the power generation chip can automatically switch the plurality of high-speed power generations in a timely manner by detecting the amount of individual chip power supply currents of the plurality of high-speed power generation chips at each high-speed chip duty cycle time. The normal working time of the chip and the energy-saving working time (variable high-speed and normal working time of the power chip, variable high-speed and power-saving chip working time), the second microprocessor chip, at each low-speed chip duty cycle, By detecting the amount of individual chip power supply current of the plurality of low-speed chips, timely and automatically switching the normal working time and the energy-saving working time of the plurality of low-speed chips (variable low-speed chip normal working time, variable low-speed chip energy-saving working time), The plurality of high-speed power generation chips and the plurality of low-speed chips can alternately use the working power supply (battery power supply and power supply) provided by the battery pack in an instant and energy-saving manner; in addition, the central processing unit and the power generation chip, the A plurality of high-speed power generation chips and the first microprocessor and power generation chips are also available during the busy work of each power generation chip. Converting thermal energy into electrical energy of each power generation chip, timely and automatically compensate for the power supply of the battery (storage battery power generation). Thus, in the creation of the invention, the intelligent energy-saving power supply system of the computer device composed of the energy-saving battery system and the computer device chipset enables the battery power terminal of a computer device to have the dual characteristics of energy saving, power generation compensation, and The working power of the battery to improve the battery life, and the power is supplied to the computer device.

Please refer to the following detailed description of a preferred embodiment of the circuit for a computer device battery system for power generation and energy-saving power supply, and the accompanying drawings, which will further understand the technical content, purpose and efficacy of the present invention. :

11‧‧‧Computer device chipset

1100‧‧‧Central Processing Unit and Power Generation Wafer

1101‧‧‧First high speed and power generation chip

1102‧‧‧Second high speed and power generation chip

1103‧‧‧First low speed chip

1104‧‧‧Second low speed chip

12‧‧‧Energy-saving battery system

1200‧‧‧ battery pack

1201‧‧‧First microprocessor and power generation chip

1202‧‧‧Second microprocessor chip

1203‧‧‧First high speed IV conversion circuit

1204‧‧‧First high speed switch

1205‧‧‧Second high speed IV conversion circuit

1206‧‧‧Second high speed switch

1207‧‧‧First low-speed IV conversion circuit

1208‧‧‧First low speed switch

1209‧‧‧Second low-speed IV conversion circuit

1210‧‧‧Second low speed switch

Figure 1 is a diagram showing the relationship between a computer device chipset and a battery of a conventional computer device.

Figure 2 is a diagram showing the relationship between the computer device chipset and the energy-saving battery system of the invention.

FIG. 3 is a block diagram and a connection diagram of the internal structure of a computer device chip set according to a preferred embodiment of the present invention.

4 is a block diagram and a connection diagram of an internal structure of an energy-saving battery system according to a preferred embodiment of the present invention.

The circuit of the "computer device battery system for power generation and energy-saving power supply" provided by the present invention is shown in Figures 2 and 3, which is a computer device chipset 11 (computer device) of a computer device. The signal processing device is provided with an energy-saving battery system 12 (computer device power supply and energy-saving power-saving device). The computer device chip set 11 is internally provided with a central processing unit and a power generation chip 1100, and a first high-speed power generation and power generation chip 1101. a second high speed power generation chip 1102 and a first low speed wafer 1103 and a second low speed wafer 1104, wherein The central processing unit and the power generation chip 1100 are electrically connected to the first high speed power generation chip 1101 and the second high speed power generation chip 1102 (high speed wafer signal control), and the central processing unit and the power generation chip 1100 are also associated with the first low speed chip. 1103, the second low-speed chip 1104 signal electrical connection (low-speed chip signal control), the energy-saving battery system 12 and the central processing unit and power generation chip 1100 and the first high-speed power generation chip 1101, the second high-speed power generation chip 1102 power supply electrical connection (high-speed chip power supply and power generation feedback), the energy-saving battery system 12 is also electrically connected to the first low-speed wafer 1103 and the second low-speed wafer 1104 power supply (low-speed chip power supply).

Referring to FIG. 2 and FIG. 4, the energy-saving battery system 12 is internally provided with a battery pack 1200 (energy-saving battery system power supply device), a first microprocessor and power generation chip 1201 (high-speed processing core), and a first The second microprocessor chip 1202 (low speed processing core), the first microprocessor and power generation chip 1201 and a first high speed IV conversion circuit 1203, a first high speed switch 1204 and a second high speed IV conversion circuit 1205, a first The two high-speed switch 1206 signals are electrically connected. The second microprocessor chip 1202 is coupled to a first low-speed IV conversion circuit 1207, a first low-speed switch 1208, a second low-speed IV conversion circuit 1209, and a second low-speed switch 1210. Connecting, the battery pack 1200 and the first high speed switch 1204, the second high speed switch 1206, the first low speed switch 1208, the second low speed switch 1210, and the central processing unit and power generation chip 1100, the first micro processing And the second microprocessor chip 1202 power supply electrical connection (battery pack supply power), the first high speed switch 1204, the second high speed switch 1206, the first low speed switch 1208 1210, respectively, the second low-speed switching converter circuit 1203 to the first high-IV, the second high IV conversion circuit 1205, the first low-speed IV conversion circuit 1207, the second low-speed power supply IV conversion circuit 1209 electrically connected The first high-speed IV conversion circuit 1203 and the second high-speed IV conversion circuit 1205 are electrically connected to the first high-speed power generation chip 1101 and the second high-speed power generation chip 1102, respectively. The first low-speed IV conversion circuit 1207 and the second low-speed IV conversion circuit 1209 are electrically connected to the first low-speed wafer 1103 and the second low-speed wafer 1104, respectively (low-speed chip power supply and power control).

When the computer device chipset 11 is in a normal operation period, as shown in FIGS. 3 and 4, the first microprocessor and power generation chip 1201 inside the energy-saving battery system 12 is passed through the first high-speed IV conversion circuit 1203 (high speed). Current and voltage conversion), during each first high-speed chip duty cycle, detecting the amount of individual chip power supply of the first high-speed power generation chip 1101 in the computer device chip set 11 when the individual chip power supply current is higher than a certain amount The first microprocessor and power generation chip 1201 receives the first high speed IV conversion circuit 1203 to receive the first high speed power generation wafer 1101 at the current level (the wafer heavy load current, the first high speed power generation wafer is in a busy operation period). After the voltage signal of the individual chip power supply current conversion, the first high-speed switch 1204 can be controlled to be turned on (ON) to be turned on, so that the battery pack 1200 inside the energy-saving battery system 12 can be operated at the next first high-speed chip duty cycle time. The first high speed switch 1204 and the first high speed IV conversion circuit 1203 provide the first high speed power generation wafer 1101 working power supply energy (the first high speed and power generation crystal Normal working time), at the same time, the first microprocessor and power generating chip 1201, the first high speed power generating chip 1101 and the central processing unit and power generating chip 1100 respectively can respectively generate individual power generating chips in each first high speed chip working cycle time The thermal energy is converted into electrical energy to automatically compensate the power supply of the battery pack 1200 (the first microprocessor and the power generation chip, the first high-speed power generation chip, and the power generation feedback of the central processing unit and the power generation chip); or, when the first high speed When the amount of individual chip power supply current of the power generation chip 1101 is lower than a certain current level (the wafer light load current, the first high speed power generation chip is in an idle operation period), the first microprocessor and power generation chip 1201 can control the first high speed. The switch 1204 is open (OFF) as the cut-off conduction, so that the battery pack 1200 stops supplying the first high-speed power generating chip 1101 working power for a long period of time before the next first high-speed wafer working cycle. After the first high-speed wafer working cycle is short, the first microprocessor and the power generating chip 1201 controls the first high-speed switch 1204 to be turned on (ON) to be turned on, so that the battery pack 1200 passes the first high speed. The switch 1204 and the first high speed IV conversion circuit 1203 provide the first high speed power generation chip 1101 operating power (the first high speed and power generation chip energy saving working time).

Referring to FIG. 3 and FIG. 4, the first microprocessor and power generating chip 1201 inside the energy-saving battery system 12 is connected to each second high-speed chip via a second high-speed IV conversion circuit 1205 (high-speed current-voltage conversion). The duty cycle time can also detect the amount of individual chip power supply current of the second high speed power generation chip 1102 in the computer device chip set 11 when the individual chip power supply current amount is higher than a certain current level (wafer heavy load current, second After the high speed power generation chip is in a busy operation, the first microprocessor and power generation chip 1201 receives the voltage signal of the second high speed IV conversion circuit 1205 to convert the individual chip power supply current of the second high speed power generation chip 1102. The second high-speed switch 1206 can also be operated as a turn-on (ON) to be turned on, so that the battery pack 1200 inside the energy-saving battery system 12 can pass the second high-speed switch 1206, the second at the next second high-speed chip duty cycle time. The high speed IV conversion circuit 1205 provides the second high speed power generation chip 1102 working power (the second high speed and the normal working time of the power generation chip), and the first micro location 1201 cum generating device wafer, the second wafer-speed generator-cum-cum-generator 1102 and a central processor in each of the second wafer 1100 high speed wafer cycle time can work individually, respectively The thermal energy of the power generation chip is converted into electrical energy to automatically compensate the power supply of the battery pack 1200 (the first microprocessor and the power generation chip, the second high-speed power generation chip, and the power generation feedback of the central processing unit and the power generation chip); or, when The first microprocessor and the power generation chip 1201 can also be controlled when the amount of individual chip power supply current of the second high speed power generation chip 1102 is lower than a certain current level (the wafer light load current, the second high speed power generation chip is in an idle operation period). The second high-speed switch 1206 is open (OFF) to be turned off, so that the battery pack 1200 stops providing the second high-speed power generation chip 1102 operating power for a longer period of time before the next second high-speed wafer duty cycle. The first microprocessor and power generating chip 1201 controls the second high speed switch 1206 to be turned on (ON) to be turned on, so that the battery pack 1200 passes through the short period of time after the second high speed wafer working period. The second high speed switch 1206 and the second high speed IV conversion circuit 1205 provide the second high speed power generation chip 1102 working power supply energy (second high speed and power generation crystal Film saving work time).

When the computer device chipset 11 is in normal operation, as shown in FIGS. 3 and 4, the second microprocessor chip 1202 inside the energy-saving battery system 12 passes through the first low-speed IV conversion circuit 1207 (low-speed current voltage). Converting), during each first low-speed chip duty cycle, detecting an individual chip power supply current of the first low-speed chip 1103 in the computer device chip set 11 when the individual chip power supply current is higher than a certain current level ( The second microprocessor chip 1202 receives the voltage signal of the first low-speed IV conversion circuit 1207 to convert the individual chip power supply current of the first low-speed wafer 1103 after the wafer is loaded with the current and the first low-speed wafer is in a busy operation. The first low speed switch 1208 can be controlled to be turned on (ON) to be turned on, so that the battery pack 1200 inside the energy saving battery system 12 can pass the first low speed switch 1208, the first The low speed IV conversion circuit 1207 provides the first low The high speed wafer 1103 operates the power supply energy (the first low speed wafer normal working time); or, when the individual wafer power supply current of the first low speed wafer 1103 is lower than a certain current level (the wafer light load current, the first low speed wafer is idle) During the process, the second microprocessor chip 1202 can control the first low speed switch 1208 to be open (OFF) as the cut-off conduction, so that the battery pack 1200 has a longer cycle time before the next first low-speed wafer duty cycle. Stop providing the first low speed wafer 1103 operating power, and the second microprocessor chip 1202 controls the first low speed switch 1208 to be closed (ON) after a short period of time after the first low speed wafer duty cycle. As the conduction, the battery pack 1200 is supplied with the first low-speed wafer 1103 operating power (the first low-speed chip energy-saving working time) via the first low-speed switch 1208 and the first low-speed IV conversion circuit 1207.

Referring to FIGS. 3 and 4, the second microprocessor chip 1202 inside the energy-saving battery system 12 is passed through a second low-speed IV conversion circuit 1209 (low-speed current-voltage conversion) for each second low-speed wafer duty cycle. Time, the individual chip power supply current of the second low-speed chip 1104 in the computer device chip set 11 can also be detected, when the individual chip power supply current amount is higher than a certain current level (the wafer heavy-load current, the second low-speed chip is busy) During operation, the second microprocessor chip 1202 can also control the second low speed switch 1210 to be closed after receiving the voltage signal of the second low speed IV conversion circuit 1209 for converting the individual chip power currents of the second low speed wafer 1104. (ON) to enable the battery pack 1200 inside the energy-saving battery system 12 to provide the second low speed via the second low speed switch 1210 and the second low speed IV conversion circuit 1209 during the next second low speed wafer duty cycle time. The wafer 1104 operates a power supply (second low speed wafer normal operating time); or, when the second low speed wafer 1104 has an individual chip power supply current below a certain power flow When (light load current wafer, second low-speed idle working of the wafer The second microprocessor chip 1202 can also control the second low speed switch 1210 to be open (OFF) as the cut-off conduction, so that the battery pack 1200 has a longer period before the next second low-speed wafer duty cycle. The second microprocessor chip 1202 controls the second low speed switch 1210 to be closed (ON) during a short period of time after the second low speed wafer duty cycle. In order to conduct, the battery pack 1200 provides the second low-speed wafer 1104 operating power (second low-speed chip energy-saving working time) via the second low-speed switch 1210 and the second low-speed IV conversion circuit 1209.

Therefore, the first microprocessor and the power generation chip 1201 can detect the individual chip power supply currents of the first high speed power generation chip 1101 and the second high speed power generation chip 1102 at each high speed chip duty cycle time. And timely and automatically switch the normal working time and energy-saving working time of the first high-speed power generation chip 1101, the second high-speed power generation chip 1102 (variable first high-speed power generation chip normal working time and energy-saving working time, variable The second microprocessor chip 1202 can also detect the first low speed chip 1103 and the second low speed during each low speed chip duty cycle time of the second high speed chip and the power saving working time. The amount of individual chip power supply current of the chip 1104 is timely and automatically switched between the normal operation time of the first low-speed wafer 1103, the second low-speed wafer 1104, and the energy-saving working time (variable first low-speed wafer normal working time and energy-saving working time, Changing the normal working time of the second low-speed wafer and the energy-saving working time), the first high-speed power generation chip 1101, the second high-speed power generation chip 1 102. The first low-speed wafer 1103 and the second low-speed wafer 1104 can alternately and energy-efficiently use the working power (the battery power supply) provided by the battery pack 1200; in addition, the central processing unit and the power generating chip 1100, the first high-speed power generation chip 1101, the second high-speed power generation chip 1102, and the first microprocessor and power generation chip 1201, in each power generation chip During busy work, the thermal energy of each power generation chip can also be converted into electric energy, and the power supply of the battery pack 1200 (battery power generation and storage) can be automatically and timely compensated. Thus, the intelligent energy-saving power supply system of the computer device composed of the energy-saving battery system 12 and the computer device chipset 11 enables the battery power terminal of a computer device to save power, generate power compensation characteristics, and improve the battery life power supply. The power is supplied to the computer device without causing the continuous loss of the power of the computer device due to the considerable power of the battery itself, which affects the working life of the computer device, so that the user must always prepare the battery storage device or must be forced to interrupt the computer work, so that the computer device is used. Inconvenient situation.

The detailed description above is a detailed description of the possible embodiments of the present invention, but the embodiments are not intended to limit the scope of the invention, and the equivalent implementation or modification of the inventive concept is not deviated from the spirit of the invention. For example, equivalent embodiments of variations, etc., should be included in the scope of the patent of the present invention.

11‧‧‧Computer device chipset

12‧‧‧Energy-saving battery system

Claims (5)

A circuit for a computer device battery system capable of generating electricity and energy-saving power supply, comprising: a computer device chip set disposed in a battery system of the computer device, wherein the computer device chip set is a signal processing device inside a computer device; The processor and the power generation chip are disposed in the computer device chipset, wherein the central processing unit and the power generation chip are main control chip devices of a computer device; and a first high speed power generation chip is disposed in the computer device chip set, The first high-speed power generation chip is a high-speed working chip device of a computer device, and the central processing unit and the power generation chip are electrically connected with the first high-speed power generation chip by a signal, which is a high-speed chip signal control; The chip is disposed in the computer device chipset, and the second high-speed power generation chip is also a high-speed working chip device of a computer device, and the central processing unit and the power generation chip are electrically connected with the second high-speed power generation chip. Also a high-speed wafer signal control; a first low-speed chip disposed in the computer device chip set, A low-speed chip is a low-speed working chip device of a computer device. The central processing unit and the power generating chip are electrically connected to the first low-speed chip by a signal, which is a low-speed wafer signal control; and a second low-speed chip is disposed on the computer device. In the chipset, the second low-speed chip is also a low-speed working chip device of a computer device. The central processing unit and the power generating chip are electrically connected with the second low-speed chip, which is also a low-speed chip signal control; The system is disposed in the battery system of the computer device, wherein the energy-saving battery system is a power supply and energy-saving device of a computer device, and the energy-saving battery system respectively The central processing unit and the power generation chip and the first high-speed power generation chip, the second high-speed power generation chip are electrically connected to the power supply (high-speed chip power supply and power generation feedback), and the energy-saving battery system is also respectively associated with the first low-speed chip, The second low-speed chip is electrically connected by a power source (low-speed chip power supply); a battery pack is disposed in the energy-saving battery system, the battery pack is an electric energy supply device of the energy-saving battery system; a first microprocessor and a power generation chip, In the energy-saving battery system, the first microprocessor and the power generation chip are high-speed processing chip devices of the energy-saving battery system, that is, a high-speed processing core; and a first high-speed IV conversion circuit is disposed in the energy-saving battery system. The first high-speed IV conversion circuit can convert the chip power supply current of the first high-speed power generation chip into a voltage signal, which is a high-speed current-voltage conversion; a first high-speed switch is disposed in the energy-saving battery system, and is located in the Between the battery pack and the first high speed IV conversion circuit; a second high speed IV conversion circuit disposed in the energy saving battery system, the second The speed IV conversion circuit can also convert the chip power supply current of the second high speed power generation chip into a voltage signal, which is also a high speed current voltage conversion; a second high speed switch is disposed in the energy saving battery system and is located in the battery Between the group and the second high speed IV conversion circuit; the first microprocessor and the power generation chip and the first high speed IV conversion circuit, the first high speed switch and the second high speed IV conversion circuit, the second high speed switch Signal electrical connection for high speed voltage signal reception and high speed switching control; a second microprocessor chip is disposed in the energy-saving battery system, the second microprocessor chip is a low-speed processing chip device of the energy-saving battery system, that is, a low-speed processing core; and a first low-speed IV conversion circuit is disposed on the In the energy-saving battery system, the first low-speed IV conversion circuit can convert the chip power supply current of the first low-speed chip into a voltage signal, which is a low-speed current-voltage conversion; and a first low-speed switch is disposed in the energy-saving battery system. Between the battery pack and the first low-speed IV conversion circuit; a second low-speed IV conversion circuit disposed in the energy-saving battery system, the second low-speed IV conversion circuit can also be the second low-speed wafer The power supply current is converted into a voltage signal, which is also a low speed current voltage conversion; a second low speed switch is disposed in the energy saving battery system between the battery pack and the second low speed IV conversion circuit; The processor chip and the first low speed IV conversion circuit, the first low speed switch and the second low speed IV conversion circuit, the second low speed switch are electrically connected by signals for low speed The voltage signal is received and the low speed switch is controlled; further, the battery pack is respectively associated with the first high speed switch, the second high speed switch, the first low speed switch, the second low speed switch, and the central processing unit and the power generation chip, the first The microprocessor and the power generation chip, the second microprocessor chip is electrically connected by a power source, and the power is supplied by the battery pack, and the first high speed switch, the second high speed switch, the first low speed switch, and the second low speed switch respectively And the first high speed IV conversion circuit, the second high speed IV conversion circuit, the first low speed IV conversion circuit, the second low speed IV conversion circuit are electrically connected by a power source, and the power supply is supplied by the battery pack, the first high speed IV conversion Electricity The second high-speed IV conversion circuit is further electrically connected to the first high-speed power generation chip and the second high-speed power generation chip (high-speed chip power supply and power supply control), the first low-speed IV conversion circuit, The second low speed IV conversion circuit is further electrically connected to the first low speed wafer and the second low speed wafer by a power supply (low speed chip power supply and power supply control). According to the circuit of the "computer device battery system for power generation and energy-saving power supply" described in claim 1, when the computer device chip set is in a normal working period, the first microprocessor and the power generation chip inside the energy-saving battery system pass the first The high-speed IV conversion circuit can detect the amount of individual chip power supply of the first high-speed power generation chip in the computer device chip set during each first high-speed chip duty cycle, when the individual chip power supply current amount is higher than a certain current level When the first high speed and power generation chip is in a busy operation period, the first microprocessor and the power generation chip receive the voltage signal of the first high speed IV conversion circuit to convert the individual chip power supply current of the first high speed power generation chip. Thereafter, the first high-speed switch can be controlled to be closed for conduction, so that the battery pack inside the energy-saving battery system can be provided by the first high-speed switch, the first high-speed IV conversion circuit, and the first high-speed IV conversion circuit. The first high speed and power generation chip work power (the first high speed and power generation chip normal working time), meanwhile, A microprocessor and power generation chip, the first high-speed power generation chip and the central processing unit and the power generation chip respectively convert the thermal energy of the individual power generation chips into electric energy in each first high-speed chip work cycle time to automatically compensate the battery group The power of the power source (power generation chip power generation feedback); or, when the amount of individual chip power supply current of the first high speed power generation chip is lower than a certain current level, the first high speed power generation chip system is in an idle working period, the first micro The processor and the power generation chip can control the first high speed switch An open circuit is used as the cut-off conduction, so that the battery pack stops providing the first high-speed power generation chip operating power for a long period of time before the next first high-speed wafer working cycle, and after the first high-speed chip working cycle The first microprocessor and the power generating chip operate the first high speed switch as a closed circuit to be turned on, so that the battery pack provides the first through the first high speed switch and the first high speed IV conversion circuit. High-speed power generation and chip operation power (first high-speed and power-saving chip energy-saving working time); thus, the first high-speed power generation chip can alternately use the working power supply provided by the battery pack in an instant, energy-saving manner, the first high speed The power generation chip and the central processing unit and the power generation chip, the first microprocessor and the power generation chip can also timely compensate the power supply of the battery group to achieve the energy-saving power supply and power generation storage function of the battery power source. The circuit of the "computer device battery system for power generation and energy-saving power supply" as claimed in claim 1, when the computer device chip set is in a normal working period, the first microprocessor and the power generation chip in the energy-saving battery system pass the second The high-speed IV conversion circuit can also detect the amount of individual chip power supply of the second high-speed and power-generating chip in the computer device chipset during each second high-speed chip duty cycle, when the individual chip power supply current is higher than a certain current When the second high-speed power generation chip is in a busy operation period, the first microprocessor and the power generation chip receive the voltage of the second high-speed IV conversion circuit to convert the individual chip power supply current of the second high-speed power generation chip. After the signal, the second high-speed switch can also be operated as a closed circuit to be turned on, so that the battery pack inside the energy-saving battery system can pass the second high-speed switch and the second high-speed IV conversion circuit at the next second high-speed chip duty cycle time. Providing the second high-speed power generation chip working power (second high speed and power generation chip normal working time), The first microprocessor generating cum wafer, the second high-cum The power generation chip and the central processing unit and the power generation chip can also convert the thermal energy of the individual power generation chips into electrical energy during each second high speed chip duty cycle to automatically compensate the power supply of the battery pack (power generation wafer power generation feedback); or, when When the amount of the individual chip power supply current of the second high speed power generation chip is lower than a certain current level, the second high speed power generation chip is in an idle working period, and the first microprocessor and the power generation chip can also control the second high speed switch. An open circuit is used as the cut-off conduction, so that the battery pack stops supplying the second high-speed power generation chip operating power for a long period of time before the next second high-speed wafer working cycle, and after the second high-speed chip working cycle The first microprocessor and the power generation chip control the second high speed switch to be closed for conduction, so that the battery pack provides the second via the second high speed switch and the second high speed IV conversion circuit. High-speed power generation chip operation power (second high speed and power generation chip energy-saving working time); thus, making the second high speed The power generation chip can alternately use the working power supply power provided by the battery pack in an instant and energy-saving manner, and the second high-speed power generation chip and the central processing unit and the power generation chip, the first microprocessor and the power generation chip can also timely compensate the The power supply of the battery pack is used to achieve the energy-saving power supply and power storage of the battery power. The circuit of the "computer device battery system for power generation and energy-saving power supply" as claimed in claim 1, wherein the second microprocessor chip inside the energy-saving battery system passes through the first low-speed IV when the computer device chip set is in a normal working period a conversion circuit capable of detecting an individual chip power supply current of the first low-speed chip in the computer device chip set during each first low-speed chip duty cycle time, when the individual chip power supply current amount is higher than a certain current level, the first During a busy operation, the second microprocessor chip receives the voltage of the first low-speed IV conversion circuit to convert the individual chip power supply current of the first low-speed chip. After the signal, the first low speed switch can be controlled to be closed for conduction, so that the battery pack inside the energy saving battery system can be provided by the first low speed switch, the first low speed IV switching circuit, and the first low speed IV switching circuit. The first low-speed chip is in a power supply (the first low-speed chip normal working time); or, when the individual chip power supply current of the first low-speed chip is lower than a certain current level, the first low-speed chip is in an idle operation period. The second microprocessor chip can control the first low speed switch to be open as a cut-off conduction, so that the battery pack stops providing the first low-speed wafer operating power for a longer period of time before a next first low-speed wafer duty cycle. Electrical energy, and the second microprocessor chip controls the first low speed switch to be closed for conduction during a short period of time after the first low speed wafer duty cycle, so that the battery pack passes the first low speed switch, a first low speed IV conversion circuit provides the first low speed wafer operating power (first low speed wafer energy saving operating time); The first wafer may be instantaneously low, energy-saving operating power to alternating power provided by the battery, in order to achieve the effect of power saving battery power. The circuit of the "computer device battery system for power generation and energy-saving power supply" as claimed in claim 1, wherein the second microprocessor chip inside the energy-saving battery system passes through the second low-speed IV when the computer device chip set is in a normal working period The switching circuit can also detect the amount of individual chip power supply of the second low-speed chip in the computer device chip set during each second low-speed chip duty cycle. When the individual chip power supply current is higher than a certain current level, the The second low-speed chip is in a busy operation period, and the second microprocessor chip can also control the second low-speed switch after receiving the voltage signal of the second low-speed IV conversion circuit to convert the individual chip power currents of the second low-speed chip. For the closed circuit to be turned on, so that the energy-saving electricity The battery pack inside the pool system can provide the second low-speed wafer working power (the second low-speed chip normal working time) via the second low-speed switch and the second low-speed IV conversion circuit during the next second low-speed wafer duty cycle; Alternatively, when the amount of individual chip power supply current of the second low speed chip is lower than a certain current level, the second low speed chip is in an idle operation period, and the second microprocessor chip can also operate the second low speed switch as an open circuit. As the cut-off conduction, the battery pack stops supplying the second low-speed wafer working power for a long period of time before the next second low-speed wafer working cycle, and the short period time after the second low-speed wafer working period The second microprocessor chip controls the second low speed switch to be closed for conduction, so that the battery pack provides the second low speed wafer working power supply via the second low speed switch and the second low speed IV conversion circuit. Two low-speed wafer energy-saving working hours); thus, the second low-speed wafer can be used alternately in an energy-saving manner The operating power for electrical energy, in order to achieve the effect of power saving battery power.