TWI476845B - Bump process and its structure - Google Patents
Bump process and its structure Download PDFInfo
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- TWI476845B TWI476845B TW101100120A TW101100120A TWI476845B TW I476845 B TWI476845 B TW I476845B TW 101100120 A TW101100120 A TW 101100120A TW 101100120 A TW101100120 A TW 101100120A TW I476845 B TWI476845 B TW I476845B
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Description
本發明係有關於一種凸塊製程,特別係有關於一種提高產品良率之凸塊製程。 The present invention relates to a bump process, and more particularly to a bump process for improving product yield.
當電子產品之體積越來越輕、薄、短、小化,內部電路之佈局相對而言會越密集,因此內部電路中相鄰之電連接元件間之距離無法達到短路安全距離範圍而容易導致短路之情形發生。 When the volume of electronic products is lighter, thinner, shorter, and smaller, the layout of internal circuits is relatively denser. Therefore, the distance between adjacent electrical connection elements in the internal circuit cannot reach the short-circuit safe distance range, which is easy to cause A short circuit occurs.
本發明之主要目的係在於提供一種凸塊製程,其包含提供一矽基板,該矽基板係具有一表面、複數個設置於該表面之銲墊及一設置於該表面之保護層,該保護層係具有複數個開口,且該些開口係顯露該些銲墊;形成一含鈦金屬層於該矽基板,該含鈦金屬層係覆蓋該保護層及該些銲墊,且該含鈦金屬層係具有複數個第一區及複數個位於該些第一區外側之第二區;形成一第一光阻層於該含鈦金屬層;圖案化該第一光阻層以形成複數個第一開槽,該些第一開槽係對應該含鈦金屬層之該些第一區;形成複數個銅凸塊於該些第一開槽,各該銅凸塊係具有一第一頂面及一第一環壁;移除該第一光阻層以顯露出該些銅凸塊之該些第一頂面、該些第一環壁及該含鈦金屬層之該些第二區;形成一第二光阻層於該含鈦金屬層並覆蓋該些銅凸塊;圖案化該第二光阻層以形成複數個第二開槽,各該第二開槽係對應各該銅凸塊且各 該第二開槽係具有一內側壁,各該第二開槽之該內側壁及各該銅凸塊之該第一環壁之間係形成有一空間;形成複數個凸塊隔離層於該些空間、各該銅凸塊之該第一頂面及該第一環壁,且各該凸塊隔離層係具有一第二頂面;形成複數個接合層於該些凸塊隔離層之該些第二頂面;移除該第二光阻層;以及移除該含鈦金屬層之該些第二區,以使該含鈦金屬層之各該第一區形成為一位於各該銅凸塊下之凸塊下金屬層。由於各該凸塊隔離層係包覆各該銅凸塊之該第一環壁及該第一頂面,因此可防止該些銅凸塊之銅離子游離而導致電性短路之情形,因此相鄰銅凸塊之間距可進一步縮小,以提昇電路佈線密度。 The main object of the present invention is to provide a bump process comprising providing a germanium substrate having a surface, a plurality of pads disposed on the surface, and a protective layer disposed on the surface, the protective layer And having a plurality of openings, wherein the openings expose the pads; forming a titanium-containing metal layer on the germanium substrate, the titanium-containing metal layer covering the protective layer and the pads, and the titanium-containing metal layer Having a plurality of first regions and a plurality of second regions outside the first regions; forming a first photoresist layer on the titanium-containing metal layer; patterning the first photoresist layer to form a plurality of first regions Slotting, the first slots are corresponding to the first regions of the titanium metal layer; forming a plurality of copper bumps on the first slots, each of the copper bumps having a first top surface and a first ring wall; the first photoresist layer is removed to expose the first top surfaces of the copper bumps, the first ring walls, and the second regions of the titanium-containing metal layer; a second photoresist layer on the titanium-containing metal layer and covering the copper bumps; patterning the second photoresist layer to form A plurality of second slot, each of the second slot corresponding to each of the lines and each copper bump The second slot has an inner side wall, and a space is formed between the inner side wall of each of the second slots and the first ring wall of each of the copper bumps; a plurality of bump isolation layers are formed on the second slot a space, a first top surface of each of the copper bumps, and the first ring wall, and each of the bump isolation layers has a second top surface; forming a plurality of bonding layers on the bump isolation layers a second top surface; removing the second photoresist layer; and removing the second regions of the titanium-containing metal layer such that each of the first regions of the titanium-containing metal layer is formed as a copper bump The underlying metal layer under the bump. Since each of the bump isolation layers covers the first ring wall and the first top surface of each of the copper bumps, the copper ions of the copper bumps are prevented from being detached, thereby causing an electrical short circuit. The distance between adjacent copper bumps can be further reduced to increase the circuit wiring density.
請參閱第1及2A至2L圖,其係本發明之一較佳實施例,一種凸塊製程係包含下列步驟:首先,請參閱第1圖之步驟10及2A圖,提供一矽基板110,該矽基板110係具有一表面111、複數個設置於該表面111之銲墊112及一設置於該表面111之保護層113,該保護層113係具有複數個開口113a,且該些開口113a係顯露該些銲墊112;接著,請參閱第1圖之步驟11及2B圖,形成一含鈦金屬層200於該矽基板110,該含鈦金屬層200係覆蓋該保護層113及該些銲墊112,且該含鈦金屬層200係具有複數個第一區210及複數個位於該些第一區210外側之第二區220;之後,請參閱第1圖之步驟12及2C圖,形成一第一光阻層300於該含鈦金屬層200;接著,請參閱第1圖之步驟13及2D圖,圖案化該第一光阻層300以形成複數個第一 開槽310,該些第一開槽310係對應該含鈦金屬層200之該些第一區210;之後,請參閱第1圖之步驟14及2E圖,形成複數個銅凸塊120於該些第一開槽310,各該銅凸塊120係具有一第一頂面121及一第一環壁122;接著,請參閱第1圖之步驟15及2F圖,移除該第一光阻層300以顯露出該些銅凸塊120之該些第一頂面121、該些第一環壁122及該含鈦金屬層200之該些第二區220;之後,請參閱第1圖之步驟16及2G圖,形成一第二光阻層400於該含鈦金屬層200並覆蓋該些銅凸塊120。 Referring to FIGS. 1 and 2A to 2L, which are a preferred embodiment of the present invention, a bump process system includes the following steps: First, referring to steps 10 and 2A of FIG. 1, a substrate 110 is provided. The cymbal substrate 110 has a surface 111, a plurality of pads 112 disposed on the surface 111, and a protective layer 113 disposed on the surface 111. The protective layer 113 has a plurality of openings 113a, and the openings 113a are The solder pads 112 are exposed; then, referring to steps 11 and 2B of FIG. 1 , a titanium-containing metal layer 200 is formed on the germanium substrate 110, and the titanium-containing metal layer 200 covers the protective layer 113 and the solders Pad 112, and the titanium-containing metal layer 200 has a plurality of first regions 210 and a plurality of second regions 220 located outside the first regions 210; thereafter, refer to steps 12 and 2C of FIG. 1 to form A first photoresist layer 300 is disposed on the titanium-containing metal layer 200; then, referring to steps 13 and 2D of FIG. 1, the first photoresist layer 300 is patterned to form a plurality of first layers. Slotting 310, the first trenches 310 are corresponding to the first regions 210 of the titanium metal layer 200; afterwards, referring to steps 14 and 2E of FIG. 1, a plurality of copper bumps 120 are formed thereon. Each of the first bumps 310 has a first top surface 121 and a first ring wall 122. Next, refer to steps 15 and 2F of FIG. 1 to remove the first photoresist. The layer 300 is used to expose the first top surfaces 121 of the copper bumps 120, the first ring walls 122, and the second regions 220 of the titanium-containing metal layer 200; afterwards, please refer to FIG. In steps 16 and 2G, a second photoresist layer 400 is formed on the titanium-containing metal layer 200 and covers the copper bumps 120.
接著,請參閱第1圖之步驟17及2H圖,圖案化該第二光阻層400以形成複數個第二開槽410,各該第二開槽410係對應各該銅凸塊120且各該第二開槽410係具有一內側壁411,各該第二開槽410之該內側壁411及各該銅凸塊120之該第一環壁122之間係形成有一空間S;之後,請參閱第1圖之步驟18及2I圖,形成複數個凸塊隔離層130於該些空間S、各該銅凸塊120之該第一頂面121及該第一環壁122,且各該凸塊隔離層130係具有一第二頂面131,在本實施例中,該些凸塊隔離層130之材質係選自於鎳、鈀、金或上述金屬之合金其中之一;接著,請參閱第1圖之步驟19及2J圖,形成複數個接合層140於該些凸塊隔離層130之該些第二頂面131,該些接合層140之材質係為金;之後,請參閱第1圖之步驟20及2K圖,移除該第二光阻層400;最後,請參閱第1圖之步驟21及2L圖,移除該含鈦金屬層200之該些第二區220,以使該含鈦金屬層200之各該第一區210形成為一位於各該銅凸塊120下之凸塊下金屬層150,並形成一凸塊結構100,該 些凸塊下金屬層150之材質係選自於鈦/鎢/金、鈦/銅或鈦/鎢/銅其中之一,在本實施例中,各該凸塊下金屬層150係具有一第二環壁151且該第二環壁151係具有一第一外周長151a,各該凸塊隔離層130係另具有一第三環壁132且該第三環壁132係具有一第二外周長132a,該第二外周長132a係不小於該第一外周長151a,且各該凸塊下金屬層150之該第二環壁151及各該銅凸塊120之該第一環壁122係為平齊,此外,該保護層113係另具有一顯露面113b,各該凸塊隔離層130係另具有一底面133,該顯露面113b及該底面133之間係具有一間隙G。在本實施例中,由於各該凸塊隔離層130係包覆各該銅凸塊120之該第一環壁122及該第一頂面121,因此可防止該些銅凸塊120之銅離子游離而導致電性短路之情形,因此相鄰銅凸塊120之間距可進一步縮小,以提昇電路佈線密度。 Next, referring to steps 17 and 2H of FIG. 1 , the second photoresist layer 400 is patterned to form a plurality of second trenches 410 , each of the second trenches 410 corresponding to each of the copper bumps 120 and each The second slot 410 has an inner side wall 411. A space S is formed between the inner side wall 411 of each of the second slots 410 and the first ring wall 122 of each of the copper bumps 120. Referring to steps 18 and 2I of FIG. 1 , a plurality of bump isolation layers 130 are formed in the spaces S, the first top surface 121 of each of the copper bumps 120, and the first ring wall 122, and each of the protrusions The block isolation layer 130 has a second top surface 131. In this embodiment, the material of the bump isolation layer 130 is selected from one of nickel, palladium, gold or an alloy of the above metals; In the steps 19 and 2J of FIG. 1 , a plurality of bonding layers 140 are formed on the second top surfaces 131 of the bump isolation layers 130 , and the bonding layers 140 are made of gold; Steps 20 and 2K of the figure, the second photoresist layer 400 is removed; finally, please refer to steps 21 and 2L of FIG. 1 to remove the second regions 2 of the titanium-containing metal layer 200. 20, the first region 210 of the titanium-containing metal layer 200 is formed as a bump under metal layer 150 under each of the copper bumps 120, and a bump structure 100 is formed. The material of the under bump metal layer 150 is selected from one of titanium/tungsten/gold, titanium/copper or titanium/tungsten/copper. In this embodiment, each of the under bump metal layers 150 has a first The second ring wall 151 and the second ring wall 151 have a first outer circumference 151a, and each of the bump isolation layers 130 has a third ring wall 132 and the third ring wall 132 has a second outer circumference. The second outer circumference 132a is not smaller than the first outer circumference 151a, and the second annular wall 151 of each of the under bump metal layers 150 and the first annular wall 122 of each of the copper bumps 120 are In addition, the protective layer 113 further has a exposed surface 113b. Each of the bump isolation layers 130 further has a bottom surface 133. The exposed surface 113b and the bottom surface 133 have a gap G therebetween. In this embodiment, since the bump isolation layer 130 covers the first ring wall 122 and the first top surface 121 of each of the copper bumps 120, the copper ions of the copper bumps 120 can be prevented. The situation of being free causes an electrical short circuit, so the distance between adjacent copper bumps 120 can be further reduced to increase the circuit wiring density.
接著,請再參閱第2L圖,其係本發明之一較佳實施例之一種凸塊結構100,其至少包含有一矽基板110、複數個凸塊下金屬層150、複數個銅凸塊120、複數個凸塊隔離層130以及複數個接合層140,該矽基板110係具有一表面111、複數個設置於該表面111之銲墊112及一設置於該表面111之保護層113,該保護層113係具有複數個開口113a及一顯露面113b,且該些開口113a係顯露該些銲墊112,該些凸塊下金屬層150係形成於該些銲墊112,該些凸塊下金屬層150之材質係選自於鈦/鎢/金、鈦/銅或鈦/鎢/銅其中之一,該些銅凸塊120係形成於該些凸塊下金屬層150上,且各該銅凸塊120係具有一第一頂面121及一第一環壁122,在本實施例中,各該凸塊下 金屬層150係具有一第二環壁151且該第二環壁151係具有一第一外周長151a,各該凸塊下金屬層150之該第二環壁151及各該銅凸塊120之該第一環壁122係為平齊,該些凸塊隔離層130係包覆各該銅凸塊120之該第一頂面121及該第一環壁122,且各該凸塊隔離層130係具有一第二頂面131、一底面133及一第三環壁132,該第三環壁132係具有一第二外周長132a,該第二外周長132a係不小於各該凸塊下金屬層150之該第二環壁151的該第一外周長151a,該保護層113之該顯露面113b及各該凸塊隔離層130之該底面133之間係具有一間隙G,在本實施例中,該些凸塊隔離層130之材質係選自於鎳、鈀、金或上述金屬之合金其中之一,該些接合層140係形成於該些凸塊隔離層130之該些第二頂面131,該些接合層140之材質係為金。 2L, which is a bump structure 100 according to a preferred embodiment of the present invention, comprising at least one germanium substrate 110, a plurality of under bump metal layers 150, and a plurality of copper bumps 120. The plurality of bump isolation layers 130 and the plurality of bonding layers 140 have a surface 111, a plurality of pads 112 disposed on the surface 111, and a protective layer 113 disposed on the surface 111. The protective layer The 113 series has a plurality of openings 113a and a exposed surface 113b, and the openings 113a expose the pads 112. The under bump metal layers 150 are formed on the pads 112, and the bumps are under the metal layer. The material of 150 is selected from one of titanium/tungsten/gold, titanium/copper or titanium/tungsten/copper, and the copper bumps 120 are formed on the under bump metal layer 150, and each of the copper bumps The block 120 has a first top surface 121 and a first annular wall 122. In this embodiment, each of the bumps is under The metal layer 150 has a second ring wall 151 and the second ring wall 151 has a first outer circumference 151a, and the second ring wall 151 of each of the under bump metal layers 150 and each of the copper bumps 120 The first ring wall 122 is flush, and the bump isolation layer 130 covers the first top surface 121 and the first ring wall 122 of each of the copper bumps 120, and each of the bump isolation layers 130 The second annular wall 132 has a second outer circumference 132a, and the second outer circumference 132a is not less than the metal under the bumps. The first outer circumference 151a of the second ring wall 151 of the layer 150, the exposed surface 113b of the protective layer 113 and the bottom surface 133 of each of the bump isolation layers 130 have a gap G, in this embodiment. The material of the bump isolation layer 130 is selected from one of nickel, palladium, gold or an alloy of the above metals. The bonding layers 140 are formed on the second tops of the bump isolation layers 130. The surface of the bonding layer 140 is gold.
本發明之保護範圍當視後附之申請專利範圍所界定者為準,任何熟知此項技藝者,在不脫離本發明之精神和範圍內所作之任何變化與修改,均屬於本發明之保護範圍。 The scope of the present invention is defined by the scope of the appended claims, and any changes and modifications made by those skilled in the art without departing from the spirit and scope of the invention are within the scope of the present invention. .
10‧‧‧提供一矽基板 10‧‧‧ Provide a substrate
11‧‧‧形成一含鈦金屬層於該矽基板,且該含鈦金屬層係具有複數個第一區及複數個第二區 11‧‧‧ forming a titanium-containing metal layer on the germanium substrate, and the titanium-containing metal layer has a plurality of first regions and a plurality of second regions
12‧‧‧形成一第一光阻層於該含鈦金屬層 12‧‧‧ forming a first photoresist layer on the titanium-containing metal layer
13‧‧‧圖案化該第一光阻層以形成複數個第一開槽,該些第一開槽係對應該含鈦金屬層之該些第一區 13‧‧‧ patterning the first photoresist layer to form a plurality of first trenches, the first trenches corresponding to the first regions containing a titanium metal layer
14‧‧‧形成複數個銅凸塊於該些第一開槽,各該銅凸塊係具有一第一頂面及一第一環壁 14‧‧‧ forming a plurality of copper bumps on the first slots, each of the copper bumps having a first top surface and a first ring wall
15‧‧‧移除該第一光阻層以顯露出該些銅凸塊之該些第一頂面、該些第一環壁及該含鈦金屬層之該些第二區 Removing the first photoresist layer to expose the first top surfaces of the copper bumps, the first ring walls, and the second regions of the titanium-containing metal layer
16‧‧‧形成一第二光阻層於該含鈦金屬層並覆蓋該些銅凸塊 16‧‧‧ forming a second photoresist layer on the titanium-containing metal layer and covering the copper bumps
17‧‧‧圖案化該第二光阻層以形成複數個第二開槽,各該第二開槽係對應各該銅凸塊且各該第二開槽係具有一內側壁,各該第二開槽之該內側壁及各該銅凸塊之該第一環壁之間形成有一空間 17‧‧‧ patterning the second photoresist layer to form a plurality of second slots, each of the second slots corresponding to each of the copper bumps and each of the second slotting portions having an inner sidewall, each of the a space is formed between the inner side wall of the two slots and the first ring wall of each of the copper bumps
18‧‧‧形成複數個凸塊隔離層於該些空間、各該銅凸塊之該第一頂面及該第一環壁 18‧‧‧ forming a plurality of bump isolation layers in the spaces, the first top surface of each of the copper bumps, and the first ring wall
19‧‧‧形成複數個接合層於該些凸塊隔離層 19‧‧‧ forming a plurality of bonding layers on the bump isolation layers
20‧‧‧移除該第二光阻層 20‧‧‧Remove the second photoresist layer
21‧‧‧移除該含鈦金屬層之該些第二區,以使該含鈦金屬層之各該第一區形成為一凸塊下金屬層 21‧‧‧ removing the second regions of the titanium-containing metal layer such that the first regions of the titanium-containing metal layer are formed as a sub-bump metal layer
100‧‧‧凸塊結構 100‧‧‧bump structure
110‧‧‧矽基板 110‧‧‧矽 substrate
111‧‧‧表面 111‧‧‧ surface
112‧‧‧銲墊 112‧‧‧ solder pads
113‧‧‧保護層 113‧‧‧Protective layer
113a‧‧‧開口 113a‧‧‧ openings
113b‧‧‧顯露面 113b‧‧‧ appearance
120‧‧‧銅凸塊 120‧‧‧ copper bumps
121‧‧‧第一頂面 121‧‧‧First top surface
122‧‧‧第一環壁 122‧‧‧First ring wall
130‧‧‧凸塊隔離層 130‧‧‧Bump isolation layer
131‧‧‧第二頂面 131‧‧‧Second top
132‧‧‧第三環壁 132‧‧‧ Third ring wall
132a‧‧‧第二外周長 132a‧‧‧Second outer perimeter
133‧‧‧底面 133‧‧‧ bottom
140‧‧‧接合層 140‧‧‧Connection layer
150‧‧‧凸塊下金屬層 150‧‧‧ under bump metal layer
151‧‧‧第二環壁 151‧‧‧ Second ring wall
151a‧‧‧第一外周長 151a‧‧‧First outer perimeter
200‧‧‧含鈦金屬層 200‧‧‧Titanium-containing metal layer
210‧‧‧第一區 210‧‧‧First District
220‧‧‧第二區 220‧‧‧Second District
300‧‧‧第一光阻層 300‧‧‧First photoresist layer
310‧‧‧第一開槽 310‧‧‧First slotting
400‧‧‧第二光阻層 400‧‧‧second photoresist layer
410‧‧‧第二開槽 410‧‧‧Second slotting
411‧‧‧內側壁 411‧‧‧ inner side wall
G‧‧‧間隙 G‧‧‧ gap
S‧‧‧空間 S‧‧‧ Space
第1圖:依據本發明之一較佳實施例,一種凸塊製程之流程圖。 Figure 1 is a flow chart showing a bump process in accordance with a preferred embodiment of the present invention.
第2A至2L圖:依據本發明之一較佳實施例,該凸塊製程之截面示意圖。 2A to 2L are schematic cross-sectional views of the bump process in accordance with a preferred embodiment of the present invention.
10‧‧‧提供一矽基板 10‧‧‧ Provide a substrate
11‧‧‧形成一含鈦金屬層於該矽基板,且該含鈦金屬層係具有複數個第一區及複數個第二區 11‧‧‧ forming a titanium-containing metal layer on the germanium substrate, and the titanium-containing metal layer has a plurality of first regions and a plurality of second regions
12‧‧‧形成一第一光阻層於該含鈦金屬層 12‧‧‧ forming a first photoresist layer on the titanium-containing metal layer
13‧‧‧圖案化該第一光阻層以形成複數個第一開槽,該些第一開槽係對應該含鈦金屬層之該些第一區 13‧‧‧ patterning the first photoresist layer to form a plurality of first trenches, the first trenches corresponding to the first regions containing a titanium metal layer
14‧‧‧形成複數個銅凸塊於該些第一開槽,各該銅凸塊係具有一第一頂面及一第一環壁 14‧‧‧ forming a plurality of copper bumps on the first slots, each of the copper bumps having a first top surface and a first ring wall
15‧‧‧移除該第一光阻層以顯露出該些銅凸塊之該些第一頂面、該些第一環壁及該含鈦金屬層之該些第二區 Removing the first photoresist layer to expose the first top surfaces of the copper bumps, the first ring walls, and the second regions of the titanium-containing metal layer
16‧‧‧形成一第二光阻層於該含鈦金屬層並覆蓋該些銅凸塊 16‧‧‧ forming a second photoresist layer on the titanium-containing metal layer and covering the copper bumps
17‧‧‧圖案化該第二光阻層以形成複數個第二開槽,各該第二開槽係對應各該銅凸塊且各該第二開槽係具有一內側壁,各該第二開槽之該內側壁及各該銅凸塊之該第一環壁之間形成有一空間 17‧‧‧ patterning the second photoresist layer to form a plurality of second slots, each of the second slots corresponding to each of the copper bumps and each of the second slotting portions having an inner sidewall, each of the a space is formed between the inner side wall of the two slots and the first ring wall of each of the copper bumps
18‧‧‧形成複數個凸塊隔離層於該些空間、各該銅凸塊之該第一頂面及該第一環壁 18‧‧‧ forming a plurality of bump isolation layers in the spaces, the first top surface of each of the copper bumps, and the first ring wall
19‧‧‧形成複數個接合層於該些凸塊隔離層 19‧‧‧ forming a plurality of bonding layers on the bump isolation layers
20‧‧‧移除該第二光阻層 20‧‧‧Remove the second photoresist layer
21‧‧‧移除該含鈦金屬層之該些第二區,以使該含鈦金屬層之各該第一區形成為一凸塊下金屬層 21‧‧‧ removing the second regions of the titanium-containing metal layer such that the first regions of the titanium-containing metal layer are formed as a sub-bump metal layer
Claims (7)
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200845254A (en) * | 2007-03-13 | 2008-11-16 | Megica Corp | Chip assembly |
| TW201128753A (en) * | 2010-02-04 | 2011-08-16 | Taiwan Semiconductor Mfg | Semiconductor devices, packaging assemblies, and method for manufacturing semiconductor devices |
| TWM412460U (en) * | 2011-05-10 | 2011-09-21 | Chipbond Technology Corp | Bump structure |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200845254A (en) * | 2007-03-13 | 2008-11-16 | Megica Corp | Chip assembly |
| TW201128753A (en) * | 2010-02-04 | 2011-08-16 | Taiwan Semiconductor Mfg | Semiconductor devices, packaging assemblies, and method for manufacturing semiconductor devices |
| TWM412460U (en) * | 2011-05-10 | 2011-09-21 | Chipbond Technology Corp | Bump structure |
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