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TWI302075B
TWI302075B TW92103792A TW92103792A TWI302075B TW I302075 B TWI302075 B TW I302075B TW 92103792 A TW92103792 A TW 92103792A TW 92103792 A TW92103792 A TW 92103792A TW I302075 B TWI302075 B TW I302075B
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Taiwan
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vacuum
plasma
voltage
gas
frequency
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TW92103792A
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Chinese (zh)
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TW200417293A (en
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Ken Yoshioka
Tadamitsu Kanekiyo
Hideki Kihara
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Hitachi High Tech Corp
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1302075 (1) 玖、發明說明 【發明所屬之技術領域】 本發明是有關於電漿處理裝置及電漿處理方 是有關可抑制因反應生成物引發產生異物的電漿 及電漿處理方法。 【先前技術】 在半導體裝置製造領域中所採用的被蝕刻材 DRAM ( Dynamic Random Access Memory)或是 IC等使用 Si、A卜Si 02等的揮發性材料。並在 Ferroelectric Random Access Memory )或是 Magnetic Random Access Memory)等等使用 Fe 發性材料。 非揮發性材料由於在鈾刻時所生成的反應生 點很高,因此蝕刻很困難。而且由於蝕刻後的反 的蒸氣壓力很低,往真空容器(真空處理室)內 係數很高,因此光是處理少數(數枚〜數百枚) 真空容器內壁就會因反應生成物的堆積物而被覆 該堆積物一旦剝落還會產生異物。 一旦堆積前述反應生成物,感應天線與反應 漿的結合狀態就會改變,而且蝕刻速度或其均一 垂直性、相對於蝕刻側壁的反應生成物的附著狀 經時間而變化。 再者,前述非揮發性材料的具體例子試舉有 法,特別 處理裝置 料是種在 邏輯電路 FRAM ( MRAM ( 等的非揮 成物的熔 應生成物 壁的附著 的試料, 蓋。而且 容器內電 性、蝕刻 況等會歷 :應用於 -7- (2) 1302075 MRAM或磁頭等的強磁性或是反強磁性材料的Fe、NiFe、 PtMn、IrMn、DRAM的電容器或是閘極部、FRAM的電容 器、MRAM 的 TMR ( Tunneling Magneto Resistive)元件 部的貴金屬材料的 P t、I r、A u、T a、R u。另外,試舉有 :高介電質材料的Al2 03、Hf03、Ta203、強介電質材料 的PZT (鈦酸鈷酸鉛)、BST (鈦酸鋇緦)、SBT (鉅酸 總f必)等。 而在相同的半導體裝置製造領域中,半導體裝置的製 造工程多半是採用藉著電漿CVD法進行Si、Si02或SiN 膜的成摸技術。於此技術中,是將單矽烷等的聚合性氣體 入射到電漿中,而成膜在晶圓上。此時大量的聚合膜會附 著在晶圓以外的反應容器的內壁,阻礙了量產穩定性。亦 即一旦在反應容器內壁堆積太厚的聚合膜,聚合膜就會自 內壁表面剝落,與前述情形同樣地,成爲異物而附著在晶 圓上。因此需要實施利用NF3等的激性特殊氣體的電漿淸 洗,或是打開反應容器進行手動作業的清掃。 並於半導體裝置製造領域中,多半是採用Si02的電 漿乾式蝕刻工程。在該鈾刻中是以C4F8、C5F8、CO、CF4 、chf3等的氟化氮作爲蝕刻氣體使用。在電漿中,該些 氣體經過反應而生成的反應生成物中多半含有C、CF、 C2F2等的遊離基,一旦該些遊離基堆積在反應容器的內壁 上,就會發生與前述情形同樣地,成爲異物發生的原因。 而一旦遊離基自堆積膜再度於電漿中被蒸發,就會改變電 漿中的化學組成,且晶圓的蝕刻速度還會歷經時間產生變 -8- (3) (3)1302075 習知的電漿處理裝置據知有所謂在真空容器外周設置 線圈狀天線的感應型電漿處理裝置,或是對真空容器內導 入微波的電漿處理裝置等。無論那種處理裝置,都不會充 分成爲蝕刻非揮發性材料時往真空容器內壁形成堆積物的 對策’因此隨著前述大氣開放,重複進行經由手動作業的 洗淨。一旦經由前述手動作業的洗淨開始洗淨時,直到開 始處理下一個試料爲止,約需要6〜〗2小時的時間,這樣 會造成裝置作業效率降低。 例如於日本特許文獻1、2、3中,揭示出以感應方式 在處理容器內生成電漿的同時,還於設置在真空容器外周 的感應天線與電漿之間,設置法拉第屏蔽,且在該法拉第 屏蔽連接高頻電源,以供給電力,藉此減低往真空容器內 壁附著反應生成物,或者可淸洗真空容器內壁的電漿處理 裝置。 該裝置對於真空容器中,在以非導電性物質亦即陶瓷 或石英等所形成的部分,且充分達到經由法拉第屏蔽引起 的電場的部分是很有效。但對於以其他非導電性物質所形 成的部分或是以導電性物質所形成的部分就不是很有效。 [特許文獻1] 日本特開平1 0-2 7 5 694號公報 [特許文獻2] 日本特開平;Π - 6 1 8 5 7號公報 -9- (4) (4)1302075 [特許文獻3] 日本特開2 0 0 0 - 3 2 3 2 9 8號公報 [發明欲解決的課題] 如前所述,一在真空容器內壁堆積太多反應生成物’ 堆積膜就會自內壁表面剝落,成爲異物而附著在晶圓上。 而使用感應天線的電漿處理裝置中,感應天線與反應容器 內電漿的結合狀態會有變化,且對於蝕刻速度或其均一性 、鈾刻垂直性、蝕刻側壁附著反應生成物的狀況等會歷經 時間產生變化。而洗淨真空容器內壁的時候,因爲直到開 始處理下一個試料爲止也需要時間,所以造成裝置作業效 率降低。而於設在真空容器外周的感應天線與電漿之間, 設置法拉第屏蔽,且在該法拉第屏蔽連接高頻電源,供給 電力,就能減低反應生成物往真空容器內壁附著,或是在 可淸洗真空容器內壁的電漿處理裝置,其有效範圍有一定 程度。 本發明是有鑑於該些問題點的發明,乃提供一控制堆 積在真空容器內壁的堆積膜,且量產穩定性優的電漿處理 裝置。 【發明內容】 [用以解決課題的手段] 本發明爲了解決上述課題,採用如下的手段。 乃由:構成一部分處理室的同時還具備有處理氣體的 -10- (5) 1302075 噴出口的氣環、和被覆前述氣環的上部而形成真空處理室 的真空鐘罩、和配置在前述真空鐘罩上部,且對前述真空 處理室內供給高頻電場而生成電漿的天線、和在前述真空 處理室內載置試料的載置台、和配置在前述天線與真空鐘1302075 (1) Technical Field of the Invention The present invention relates to a plasma processing apparatus and a plasma processing method relating to a plasma and a plasma processing method capable of suppressing generation of foreign matter by a reaction product. [Prior Art] A volatile material such as Si, A, Si 02 or the like is used as an etched material DRAM (Dynamic Random Access Memory) or an IC used in the field of semiconductor device manufacturing. Fe materials are used in Ferroelectric Random Access Memory or Magnetic Random Access Memory. Non-volatile materials are difficult to etch due to the high reaction sites generated during uranium engraving. Moreover, since the reverse vapor pressure after etching is very low, the coefficient is high in the vacuum vessel (vacuum processing chamber), so the light is processed a small number (several to several hundred). The inner wall of the vacuum vessel is accumulated due to the reaction product. The material is covered with the deposit and once it is peeled off, foreign matter is generated. Once the reaction product is deposited, the bonding state of the sensing antenna and the reaction slurry changes, and the etching rate or its uniform perpendicularity changes with respect to the adhesion state of the reaction product on the etching sidewall. Further, a specific example of the above-mentioned non-volatile material is a method, and a special processing device is a sample which is attached to a wall of a fusion circuit of a non-volatile material such as a MRAM (MRAM), and a container. Internal electricity, etching conditions, etc.: used in -7- (2) 1302075 MRAM or magnetic heads such as ferromagnetic or antiferromagnetic materials, Fe, NiFe, PtMn, IrMn, DRAM capacitors or gates, Capacitors of FRAM and Pt, I r, A u, T a, and R u of precious metal materials in the TMR (Tunneling Magneto Resistive) element portion of MRAM. In addition, Al2 03, Hf03, which are high dielectric materials, are used. Ta203, PZT (lead titanate), BST (barium titanate), SBT (maximum acid), etc. of the ferroelectric material. In the same semiconductor device manufacturing field, the manufacturing process of the semiconductor device In many cases, a Si, SiO 2 or SiN film is formed by a plasma CVD method. In this technique, a polymerizable gas such as monodecane is incident on a plasma to form a film on a wafer. A large amount of polymer film will adhere to the reaction vessel outside the wafer. The production stability is hindered, that is, when a polymer film which is too thick is deposited on the inner wall of the reaction container, the polymer film peels off from the inner wall surface, and as in the case described above, foreign matter adheres to the wafer. Perform plasma cleaning with a special gas such as NF3, or open the reaction vessel for manual cleaning. In the field of semiconductor device manufacturing, most of the plasma dry etching process using SiO2 is used. Fluoride nitrogen such as C4F8, C5F8, CO, CF4, or chf3 is used as an etching gas. In the plasma, most of the reaction products formed by the reaction of these gases contain free radicals such as C, CF, and C2F2. Once the radicals are deposited on the inner wall of the reaction vessel, the same happens as in the case described above, which causes foreign matter to occur. Once the radical is evaporated from the plasma again in the plasma, it changes in the plasma. The chemical composition, and the etch rate of the wafer will change over time. -8- (3) (3) 1302075 The conventional plasma processing apparatus is known to have a so-called coil-like day on the outer circumference of the vacuum vessel. Inductive plasma processing device, or plasma processing device for introducing microwave into a vacuum container, etc. No matter which kind of processing device is used, it is not sufficient to form a deposit on the inner wall of the vacuum container when etching a non-volatile material. 'Therefore, as the atmosphere is opened, the washing by manual operation is repeated. When the washing is started by the manual operation, it takes about 6 to 2 hours until the next sample is processed. For example, in Japanese Patent Publications 1, 2, and 3, it is disclosed that, while inductively generating plasma in the processing container, and also between the sensing antenna and the plasma disposed outside the vacuum container, The Faraday shields and connects the high-frequency power source to the Faraday shield to supply electric power, thereby reducing the plasma treatment device that attaches the reaction product to the inner wall of the vacuum vessel or can wash the inner wall of the vacuum vessel. This apparatus is effective for a portion of a vacuum vessel which is formed of a non-conductive material, i.e., ceramic or quartz, and which sufficiently satisfies the electric field caused by the Faraday shield. However, it is not very effective for a portion formed of other non-conductive substances or a portion formed of a conductive substance. [Patent Document 1] Japanese Laid-Open Patent Publication No. Hei 1 0-2 7 5 694 [Patent Document 2] Japanese Patent Laid-Open; Π - 6 1 8 5 7 -9- (4) (4) 1302075 [Private Document 3] JP-A-2000- 3 2 3 2 9 8 [Problems to be Solved by the Invention] As described above, as soon as a reaction product is deposited on the inner wall of the vacuum vessel, the deposited film peels off from the inner wall surface. It becomes a foreign matter and adheres to the wafer. In the plasma processing apparatus using the inductive antenna, the bonding state of the sensing antenna and the plasma in the reaction container may change, and the etching rate or uniformity thereof, the uranium perpendicularity, and the condition of the etching side wall adhesion reaction product may be It has changed over time. When the inner wall of the vacuum container is washed, it takes time until the next sample is processed, so that the operation efficiency of the device is lowered. The Faraday shield is disposed between the sensing antenna and the plasma disposed on the outer circumference of the vacuum container, and the Faraday shield is connected to the high-frequency power source to supply electric power, thereby reducing the reaction product to adhere to the inner wall of the vacuum container, or The plasma processing device for washing the inner wall of the vacuum container has a certain effective range. SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and provides a plasma processing apparatus which controls a stacked film deposited on an inner wall of a vacuum container and which is excellent in mass production stability. [Discussion] [Means for Solving the Problems] In order to solve the above problems, the present invention employs the following means. And a gas ring including a discharge port of -10 (5) 1302075 of a process gas, a vacuum bell that forms an upper portion of the gas ring to form a vacuum processing chamber, and a vacuum chamber disposed in the vacuum chamber An antenna for supplying a high-frequency electric field to the upper portion of the bell jar to generate a plasma, a mounting table on which the sample is placed in the vacuum processing chamber, and an antenna and a vacuum clock disposed on the upper portion of the bell jar

罩間的同時還賦予高頻偏壓電壓的法拉第屏蔽、和除了前 述處理氣體的噴出口外,被裝脫自如地安裝在前述氣環內 面的防著板所構成,並將包括可自前述試料面看見防著板 的氣環內面的面積,設定成前述試料面積的約1 /2以上。 【實施方式】 [發明實施形態] 以下針對本發明的第一實施例採用圖面做說明。第一 實施例中,進行電漿處理的試料爲非揮發性材料的時候, 以触刻處理爲例,並針對處理中抑制反應生成物往真空容 器內壁堆積的方法做說明。 第1圖是表不有關本實施例的電漿處理裝置的斷面圖 。真空容器2是形成具備有用來閉塞其上部的絕緣材料( 例如石英、陶瓷等的非導電性材料)製的真空鐘罩1 2的 真空處理室。在真空容器的內部具備有用來載置屬於被處 理物的試料1 3的載置台5,在該處理室內生成電漿6來 處理試料。而前述載置台5是形成在包括載置台的資料保 持部9上。 在真空鐘罩1 2的外周配置有:線圈狀的上天線1 a以 及下天線1 b。並在真空鐘罩1 2的外側設有:與電漿6靜 -11 - (6) (6)1302075 電谷里式結合的圓盤狀法拉第屏蔽8。前述天線1 a、1 b 以及法拉第屏蔽8,乃如上所述,介著整合器(匹配箱) 3串連在局頻電源(第一高頻電源)1〇。並在法拉第屏蔽 8與接地間並列可改變阻抗大小的串聯共振電路(可變電 容器VC3及電抗器L2 )。 在真空容器2內介著氣體供給管4 a來供給處理氣體 。而真空容器2內的氣體是經由排氣裝置7被減壓排氣至 所定的壓力。自氣體供給管4 a對真空容器2內供給處理 氣體’且在該狀態藉由將前述處理氣體利用前述天線1 a 及1 b所發生的電場作用加以電漿化。在載置電極5連接 基板偏壓電源(第二高頻電源)1 1。藉此,存在於電漿6 中的離子就會被引入到試料1 3上。 再者,高頻電源 1〇可使用例如 13.56MHz、 27.12MHz、40.68MHZ等的HF頻帶的高頻電力,或是使 用更高頻率的VHF頻帶等的高頻電源,將高頻電力供給 到感應結合天線1 a、1 b及法拉第屏蔽8,藉此就能在真 空容器2內獲得電漿生成用的電場。此時使用整合器(匹 配箱)3,使感應結合天線1 a、1 b的阻抗與高頻電源1 0 的輸出阻抗一致,藉此就能抑制電力的反射。整合器(匹 配箱)3可使用將例如圖面所示,倒L字形連接可變容量 電容器Vcl、Vc2者。 法拉第屏蔽乃如第2圖所示,爲具有直條紋狀縫隙 1 4的導體型,以重疊於陶瓷製的真空容器(真空鐘罩1 2 )的形式被配置。施加在法拉第屏蔽8的電壓可藉由前述 -12- (7) (7)1302075 可變電容器(第1圖所示的V C3 )調節。可對應施加在法 拉第屏蔽8的電壓(屏蔽電壓)的每個晶圓的處理方法, 或是對應淸洗處理的方法設定任意的値。 再者,利用法拉第屏蔽的真空容器內壁淸洗原理,是 根據法拉第屏蔽已知的高頻電壓,使真空容器內部(真空 鐘罩內壁)產生偏壓電壓,藉此將電漿中的離子引入真空 容器壁內,藉由所引入的離子來衝擊真空容器壁,使其產 生物理性、化學性濺鍍,以防止反應生成物往真空容器壁 附著。具有最適於藉由法拉第屏蔽的壁內壁淸洗的法拉第 屏蔽電壓(Faraday Shield Voltage; FSV)。該最適當的 F S V會影響到高頻電源頻率、真空容器壁材料、電漿的密 度、電漿的組成、真空容器全體的構成以及被處理物的材 料、處理速度、處理面積。因而,該F S V的最適値,在 每個製程都需要改變。 第3圖是說明將F S V最適化的方法的圖,表示f S V 與真空容器壁材料(例如壁材料爲氧化鋁的時候,構成氧 化鋁的鋁或是氧)的發光強度(光量)的關係。如圖所示 ’以某一 FSV (第3圖爲b點)爲界限,Fsv變高的話 ’壁材料的發光就會變強。這是表示在b點以下的ρ s V, 堆積物(沈澱物)會堆積在壁上的狀態,且b點以上的 FSV ’表示沈澱物只會濺鍍不會堆積,壁材料本身也會被 濺鍍。 FSV最適値爲b點的電壓,但根據製程也有以&點爲 最適値的時候。例如因真空壁材料的濺鍍,壁材料被釋放 -13- (8) 1302075 在氣相中,藉此假設被處理物的處理反應或氣相 錯開,就會有相當於所希望的製程不能實行的情 即認爲藉由將F S V設定在a點,在真空容器內 堆積沈澱物,藉此壁材料就完全不會被濺鑛。藉 止因壁材料的釋放阻礙製程。但是真空容器內壁 積沈澱物的時候,需要將真空容器內壁在淸洗專 ,利用FSV比b點高的設定來淸洗。 與上述相反地,也有c點爲最適値的製程。 少在真空容器內壁堆積反應生成物的話,會產生 者生成電漿的高頻電力被堆積物吸收,而電漿特 化,不會穩定實行目的製程的情形。在此情形下 前所述,設定在c點。亦即內壁可以稍微減少, 成物也能設定爲完全不堆積的條件。此時,會發 空容器消耗增大的缺點,但內壁的淸洗次數會削 再者,內壁削減、反應生成物的堆積也不是 時候,將FSV設定在b點。此時,FSV的設定 現性良好就很重要。這是因爲以不同的裝置進行 時,或是以同一裝置連續進行同一製程時需要抑 間變化。因此,F S V的回饋控制變得很重要。 第4圖是說明F S V的回饋控制的圖。如圖 電漿生成用的高頻電源1 0的輸出是介著阻抗 VC1、VC2)及天線la、lb被施加至法拉第屏 FSV以電容器C2、C3進行分割,成爲小信號, 波器1 5而在除了高調波或其他頻率成分以外, 一 14- 中的反應 形等。亦 壁會稍微 此就能防 未充分堆 用的製程 例如,至 異物,或 性產生變 ,FSV 如 但反應生 生所謂真 所希望的 電壓的再 同一製程 制歷經時 面所示, 整合器( 蔽 8。將 且通過濾 以檢波器 (9) (9)1302075 1 6進行檢波,並轉換爲D C電壓,且以放大器1 7進行放 大。像這樣,就能得到以F S V爲比例的d C電壓信號。將 該信號與經由比較器i 8以本體裝置控制部2 〇的程序輸出 而設定的預設値或設定値做比較,介著馬達控制機1 9來 控制馬達,以FSV決定電壓旋轉的可變電容器VC3。藉 此’就能將F S V控制在以本體裝置控制部20所設定的値 ’例如以不同的裝置或同一裝置連續處理同一製程的時候 ’也能將F S V的値控制在一定的狀態。而且能抑制裝置 間差距、歷經時間變化。 法拉第屏蔽是通過介電質真空容器的壁(真空鐘罩) 而與電漿進行容量結合。此結果,FSV是藉由利用成爲法 拉第屏蔽與電漿之間的靜電容量與壁的離子鞘的靜電容量 被分割的,分割後的電壓則與離子鞘有關。藉此加速離子 會使真空容器內壁進行離子濺鍍。例如氧化鋁製的真空容 器壁的厚度爲l〇mm的時候,FSV爲500V的話,施加在 離子鞘的電壓約爲60V。 對昇高以很低的FSV施加在離子鞘的電壓是很有用 的。產生很高的FSV是因爲很容易異常放電等的理由, 處理變得更困難。對於昇高以很低的F SV施加在離子鞘 的電壓,且一心一意決定以使用離子鞘的靜電容量製程的 電漿特性的緣故,對於儘量減小法拉第屏蔽與電漿之間的 靜電容量是很有效的。爲了實現這點,只要提高介電質真 空容器材料的感應率,就能儘量減薄介電質真空容器的壁 厚。適合此點的材料可採用強度很強且感應率高的材料爲 -15- (10) (10)1302075 代表的氧化纟呂° 像是以氧化鋁感應率高的材料’來製作壁厚較薄的真 空容器的時候,會發生問題的是法拉第屏蔽與真空容器的 壁(真空鐘罩)間會有間隙。氧化鋁的感應率約爲8, 10mm壁厚的時候’於大氣狀況下換算厚度的話,爲10/ 8 = 1 . 2 5 m m。在此,假設考慮法拉第屏蔽與真空容器的間 隙爲〇至1 m m的時候’法拉第屏蔽與電漿的間隔,若以 大氣換算爲1 . 2 5至2 · 2 5 m m,會很接近二分之一倍。此時 是在剛才的條件下’有關離子鞘的電壓會由約3 3 V變化 至60 V之意。 像這樣’有關離子鞘的電壓產生很大變化的話,堆積 物(沈澱物)會附著在真空容器內壁的某一部分,其他部 分不會附著堆積物,藉此已知的F S V會減少抑制沈澱物 附著的效果。爲了防止這點,就需要將法拉第屏蔽與真空 容器的間隙成爲一定,或是希望以薄膜來製作法拉第屏蔽 ,使真空容器密封。 以加工金屬板製作法拉第屏蔽是很簡單的,但是製作 一與真空容器的壁(真空鐘罩)的間隙爲〇 . 5 m m以下就 不能實現。但是在法拉第屏蔽之下黏貼導電性的彈性體例 如導電性海綿,並藉由該海綿來埋設法拉第屏蔽與真空容 器壁的間隙就可以。 第5圖是表示針對真空鐘罩的法拉第屏蔽的安裝例圖 。第5圖(a )是在法拉第屏蔽! 4與真空鐘罩1 2之間設 有間隙的例子,在間隙的某部分的真空容器內面變得很容 -16- (11) (11)1302075 易堆積堆積物。另一方面,沒有間隙的附近乃爲未堆積堆 積物的狀態。第5圖(b )是表示將前述間隙用彈性導電 體1 2 a例如導電性海綿埋設的例圖。藉此,法拉第屏蔽 1 4就能得到與密封在真空鐘罩1 2同樣的效果。再者,導 電性海綿伸縮性大的緣故,能柔軟地埋設在大大小小的間 隙中。 第6圖是說明防著板的安裝構造圖,第6圖(a )是 表示形成在真空鐘罩1 2的下擺及其下面的氣環的氣體噴 出口 23。於該構成中,繼續電發處理的話,堆積物會堆 積在以圖的A及B所示的部分。在真空鐘罩的內側,比 圖的B更上方的部分,會因藉著F SV的離子濺鍍的效果 ,不能堆積堆積物。在此所產生的問題是以前述 A及B 所示的部分。A的部分是指氣體噴出口 23的周邊,在這 附著堆積物的話,該堆積物會因氣流的效果變得很容易剝 落,剝落的堆積物就會成爲異物附著在屬於被處理物的晶 圓上,妨礙製程。而B的部分是指真空鐘罩1 2的內壁, 但法拉第屏蔽1 4離真空鐘罩內壁很遠。因此利用F s V的 離子鞘電壓會降低,而成爲因離子濺鍍引起的堆積物附著 的抑制效果未充分作用的部分。 第6圖(b )是說明利用防著板22覆蓋氣體噴出口 23的構造圖。前述A的部分是指氣體噴出口附近’需要 極力減低往該部分的堆積物附著。減低往氣體噴出口 2 3 的堆積物附著,就是減低從氣體噴出口 2 3通過防著板22 的孔而看得見的電漿6區域’亦即減少相對於電獎的視角 -17- (12) (12)1302075 ,氣體噴出口 23不會直接看見晶圓,亦即氣體的噴出口 2 3的中心軸,像是前述視角外包括前述試料,都需要設 定在前述試料上方的電漿生成空間方向。 第6圖(c )是表示防著板與氣體噴出口關係的詳細 例圖。此例中,視角會減小到約3 〇度,而不能直接從氣 體噴出口看見晶圓。 此時,在防著板22與氣體噴出口 23之間,隔著間隙 是很有效的。希望間隙的大小爲〇.5mm以上。經由該間 隙會產生幾個優點。首先,通過形成在防著板的氣體的孔 是相同大小,藉由隔著間隙就能減少往電漿的視角,還能 減少附著在氣體噴出口 2 3的堆積物的量。而自氣體噴出 口 23將氣體噴出到真空容器內時,發生很大的壓力下降 ,且會自粘性流往中間流移行,最後成爲分子流。在此, 在氣體噴出口 23周邊,氣體的壓力還是比較高的中間流 狀態下,一旦堆積物附著在這裡,受到來自氣流的力量, 堆積物很容易剝落。.藉由隔著間隙,在防著板22附近的 氣流會成爲分子流,剝落附著在防著板的堆積物力量的氣 流變少,就能減少堆積物的剝落。更如後所述,有效率地’ 提高防著板22的溫度,就能減少附著在防著板22的堆積 物的量。 第7圖是表示防著板的熱計算例的圖。由製程處理的 結果得知,並見識到所謂Fe或Pt等的材料對於2 5 0°C以 上的構件是很難附著的。於是,以前述防著板的溫度爲 2 5 0 °C以上地,設計防著板。以熱設計來計算來自電漿的 -18- (13) (13)1302075 大熱、來自防著板支撐部的熱擴散、來自防著板全體的熱 輻射擴散的三者的熱平衡。將該熱計算的結果表示在第7 圖。 防著板爲SUS (不銹鋼)的時候,了解到往電漿的高 頻(RF )輸入爲5 0 0W左右,平衡溫度會超過250°C。防 著板爲A1 (表面耐酸鋁加工)的時候,RF輸入爲1 000W 以上,防著板平衡溫度則爲250°C以上。以下針對相當於 計算的各部構造上的特徵做記載。 電漿大熱是因電漿在電抗器內做各向擴散,故以往電 漿的RF輸入X防著板面積/電漿接觸全面積來計算。這 次設計的防著板形式是往電漿的RF輸入= 1 200W的話, 往防著板的大熱即爲2 6 0 W。 來自防著板的熱輻射擴散,因爲材料是用S U S,並將 表面做鏡面加工,而表面輻射率爲0.2左右,所以能抑制 的很低。防著板使用 A1 (表面耐酸鋁處理)的時候,因 爲耐酸鋁表面輻射率爲0 · 6左右,所以熱輻射擴散增多。 第8圖是說明防著板的支撐構造圖。防著板爲減少來 自其支撐部的傳熱,以三點支撐整周,且將與氣環本體的 接觸部面積,如第8圖般大致爲點接觸來抑制傳熱面積。 具體而a ’接觸部徑向長度爲3 m m,接觸部同方向長度 爲1mm。估計接觸熱電阻會成爲3000[W/ (m2 K)]程 度的過大値,而來自以接觸面積X接觸熱傳達率x (防著 板內面溫度-氣環溫度)所計算的防著板支撐部的傳熱應 該只有1 0W左右。 ~ 19 - (14) 1302075 實際試作一防著板,且實際測量表面溫度。所 著板的材質爲A1 (表面耐酸鋁)。確認於RF輸入 ,表面溫度約爲2 5 0 °C,約如設計値的値。 如前所述,防著板就算維持在很高的溫度,也 全不附著堆積物。因此,附著在防著板的堆積物要 附著就變得很重要。因此,在防著板的表面,機械 物的附著性佳的緣故,希望稍微具有凹凸。發明人 實驗,了解到希望表面粗度爲ΙΟμπι以上。 但是當堆積物開始附著時,附著的堆積物其膜 博膜狀態慢慢地變厚。例如設在防著板的1 0 μ m的 具有相對於同程度膜厚的堆積物的結合效果。但是 堆積物的膜厚變厚的話,結合效果就很薄弱。因而 積物附著量很少的初期狀態至堆積物量增至某種程 態’有效作用結合效果,是希望同時在表面具有兩 例如ΙΟμηι的凹凸與ΙΟΟμπι的凹凸。形成此種凹凸 法可採用例如對形成1 ΟΟμιη的凹凸進行壓花加工 成1 0 μηι的凹凸形成進行塑性加工。 如以上所述,提高防著板的溫度是將防著板表 鏡面加工,而爲了穩定附著堆積物,希望在表面形 。因而,在防著板附著堆積物的面(向著電漿的面 凹凸,且未附著堆積物的面(例如向著防著板與氣 口的間隙的面)做鏡面加工就可以現實。而爲了反 著板被放射的熱,就希望在氣環的氣體噴出口的某 ’對未附著堆積物的部分的面做鏡面加工。 用的防 1 2 0 0 W 無法完 很穩定 式堆積 等憑著 厚會由 凹凸, 附著的 ,從堆 度的狀 種凹凸 的加工 ,對形 面進行 成凹凸 )形成 體噴出 射由防 一個面 -20- (15) (15)1302075 防著板的大小是希望做成覆蓋氣體噴出口的最小的尺 寸。這是爲了避免少許的堆積物堆積到防著板,爲了減少 堆積物的附著量,除了提高溫度的關係外,在防著板發生 熱滯後作用,且因堆積物與防著板材質的熱量引發的膨張 、收縮量的差異,堆積物就很容易剝落。 而防著板是用具有電氣傳導性的材料所製作的,希望 進行接地。這是爲了增加針對用來生成電漿的高頻的接地 面積外,還能穩定放電。而堆積物帶電的時候,堆積物因 爲經由庫侖力的反撥力堆積物彼此變得很容易剝落,儘量 防止堆積物帶電就能達到目的。 施行如以上的構造設計及熱設計,來製作表面粗度爲 ΙΟμιη及ΙΟΟμηι的防著板,並將粗鉑Pt連續5 00枚進行蝕 刻,調查性能。其結果幾乎看不到堆積物往氣體噴出口的 附著量。而附著在防著板的堆積物是很穩定的,連堆積物 剝落也未發生。 第9圖是針對附著在第6圖的B部分(真空鐘罩12 的內壁的法拉第屏蔽遠離真空鐘罩內壁的部分。因而經由 F SV的離子鞘電壓降低,而因離子濺鍍的堆積物附著抑制 效果未充分作用的部分)的堆積物對策做說明的圖。 第6圖的B部分是由於真空鐘罩12內壁與法拉第屏 蔽1 4的距離很長,難以有效利用F S V的離子濺鍍的區域 。於是延長防著板22,且藉由覆蓋該部分使堆積物附著 量減少的同時還能達到堆積物的穩定化。雖是表示此構造 ,但爲第9圖(a )。用這個對堆積物附著進行試驗的時 - 21 - (16) (16)1302075 候,了解到是以第9圖(a )的c點中心,堆積物附著在 真空鐘罩內壁寬l5mm左右的區域。 第9圖(b )是第9圖(a )的變形例。如圖所示,真 空鐘罩1 2是大致連續在氣環4內面地形成在其內面,將 該真空鐘罩1 2配置在氣環4上而形成真空處理室。 若按該構成,只要將防著板連續形成在真空鐘罩內面 及氣環內面。藉此就能將難以有效利用前述F S V的離子 濺鍍的區域,用防著板做有效的保護。 第1 0圖是說明防著板近傍附著堆積物的圖。首先, 以虛線所不的是指電漿的等密度線。注意看C點的話,C 點是相當於由防著板與真空鐘罩所形成的角隅部,且該部 分的電漿密度與周邊相比當然比較低。 這是由於防著板的厚度很難讓電漿返回C點的原因。 因此,認爲c點減少相當於真空鐘罩內壁單位面積的離子 的濺鍍數的緣故,堆積物很難被取得。更認爲另有一原因 。就是防著板具有電氣傳導性的緣故,F S V對生成在防著 板的離子鞘是無效的,對離子鞘施以根據電漿特性1所決 定的15至2〇V左右的DC電壓。對此,FSV有效的區域 是對形成在真空鐘罩內壁的離子鞘,施加根據電漿特性所 決定的DC電壓更例如60V左右的高頻電壓,這對離子加 速而言會很有效果的濺鍍真空鐘罩內壁。就是C點附近是 相當於自生成的防著板的低電壓的離子鞘,往形成在真空 鐘罩內壁的高電壓的離子鞘的遷移區域,且在C點附近隨 著離開防著板附近,而離子鞘的電壓昇高,慢慢地成爲離 -22- (17) (17)l3〇2〇75 子濺鑛很有效的區域。 根據以上所述的兩個原因,如第1 〇圖所示,考慮在 C點附近,形成利用FSV的弱濺鍍區域。在該區域,除堆 檳物附著外,比利用F S V的濺鍍更具優勢的緣故,認爲 會附著堆積物。 第1 1、12、1 3圖分別表示防著板的構造例圖。如第 1 1圖所示,欲除去造成弱濺鍍區域的原因之一的電漿密 度下降的原因,製作刀刃狀的防著板,進行試驗。其結果 ’如第1 1圖所示,弱濺鍍區域縮小,且確認堆積物附著 區域會縮小。於是,爲了除去另外一個原因,如第1 2圖 所示,將防著板的上部22a變更爲絕緣體(此時爲氧化鋁 )的狀況下,如第12圖所示,就能令強濺鍍區域與堆積 物區域一致,幾乎沒有堆積物的附著。氧化鋁的表面由於 不可進行壓花加工,故利用塑性處理,在表面做凹凸加工 。而絕緣體的材料也可使用石英或氮化鋁。 更徹底防止堆積物附著,乃如第1 3圖所示,強濺鍍 區域當然比堆積物附著區域還廣。於是,能在防著板與真 空鐘罩之間侵入電漿地,在防著板與真空鐘罩間設置間隙 。爲了能讓電漿進入,間隙的間隔需要充分的大於離子鞘 ’間隙的間隔需爲5 m m以上。而太大的話,堆積物會因 擴散回流的緣故,效果很薄弱。堆積物擴散而不回流的間 隙的最大値是因堆積物的材質、氣體種類及其壓力所決定 的緣故’就會因處理製程而異,但試驗結果及其目標爲 1 5mm。製作第〗3圖所示的構造的防著板,進行試驗的結 -23- (18) (18)1302075 果,往真空鐘罩的堆積物附著能完全被抑制。此構造的情 形下,防著板上部不一定是絕緣性材料,就連以電氣傳導 體所構成的,性能也不會變。 屬於載置台5的蓋部的晶座上部也附著堆積物的話, 就會成爲在晶圓上產生異物的原因。於是,也對晶座施加 高頻偏壓,且引起物理式、化學式離子濺鍍,而不會附著 堆積物地進行檢討。 第1 4圖是表示包括載置台的試料保持部9的構造圖 。如圖所示,在接地基層3 6及絕緣基層3 5的上面,搭載 連接基板偏壓電源1 1的載置台。載置台的材質一般是用 鋁或鈦合金。在載置台的上部搭載被處理物(試料13) 的部分,形成介電質膜,就能靜電吸附被處理物。介電質 膜在圖中是成爲溶射膜,但也有以環氧、聚醯亞胺、矽膠 等的高分子系材料形成的情形。而以溶射等所形成的陶瓷 系材料則有現/化銘、氮化銘、PBN (Pyolyc Boron Nitride: 熱分解氮化矽)。而第I4圖是表示爲了防止高頻電力自 載置台5的側面方向被電漿抽取,故用接地基層3 6與絕 緣蓋3 7做爲屏蔽的構造。而晶座是一般以石英或氧化鋁 爲材料’經由覆蓋搭載著載置台的試料以外的電極部的電 漿,防止損傷。 第1 5圖是表不包括晶座表面的基板偏壓電路(等效 電路)的圖。基板偏壓電源1 1是在阻抗整合器(MB ) 3 2 內,與自靜電吸附電源被供給的靜電吸附用的直流電壓混 合後,供給到載置台。在此,基板偏壓電源n的高頻是 -24- (19) (19)1302075 自載置台5穿越晶座3 4,而且也會被供給到晶座上部表 面。此時晶座3 4是形成以晶座材料作爲介電質的電容器 。第15圖是表示以這樣所形成的電容器作爲電容器c( 3 3) 〇 發明人等,首先如第1 4圖所示,當晶座厚度爲5 m m 時,試驗性地調查堆積物的附著。其結果了解到在晶座上 面附著多量的堆積物。 於是’晶座34的厚度與發生在晶座表面的偏壓電壓 的關係進行理論性的檢討。其結果於第1 6圖示之。了解 到發生在真空鐘罩內壁的電壓約爲6〇V以上的話,就能 抑制堆積物附着。而發明人等的試驗,多數是將試驗時的 偏壓電壓(尖峰至尖峰)Vpp設定在約400至500V的範 圍,在該偏壓電壓VPP的範圍,使晶座表面發生6〇v以 上的電壓地,作爲晶座厚度而選擇4 mm。 第1 7、1 8圖是說明針對薄壁(例如4mm厚)的晶座 的堆積物的附著狀況的圖。如第1 7圖所示,晶座上面整 體厚度爲4mm,來實驗堆積物的附著狀況。其結果,確 認在圖面以箭頭所示的範圍(沈澱物附著限制區域),並 沒有堆積物的附著。藉此了解到能用直接與載置台接觸的 部分,抑制堆積物附著。但在第1 7圖的構成,由於堆積 物會附著在晶座上面的外周部,故擔心這個是成爲阻礙往 被處理物的異物的處理。於是,除了形成在載置台的側面 的絕緣蓋3 7外,在晶座上面及晶座側面的整個上部接觸 載置台與晶座。將該構成表示於第1 8圖。使用第1 8圖所 -25- (20) (20)1302075 示的構造’與前述同_ ’實驗性地調查堆積物的附著狀 況。此結帛,在與載置台接觸的晶座上面及晶座側面上部 並沒有堆積物的附著。但是了解到重複裝脫晶座的話,就 算同一條件下,仍有無法充分除去堆積物的情形。而當該 堆積物無法充分除去時,判定堆積物是以具偏離的分佈而 堆積’且特別是在晶座的側面,很容易殘留堆積物。 堆積物是具偏向的分佈做堆積,不能充分除去該堆積 物的理由推定如下。亦即,因爲晶座的材料爲氧化鋁,其 厚度爲4 m m、感應率約爲8,所以一旦換算成空氣層,就 相當於約0.5 m m。此例,在晶座與載置台間,間隙爲例如 0 . 1 mm的話,形成第1 5圖的電容器c的介電質的厚度爲 晶座部分〇 . 5 m m與間隙部分0至〇 . 1 m m的合計,形成〇 . 5 至〇 . 6 m m ( 2 0% )變動。該變動會於晶座表面所產生的高 頻電壓發生偏向,藉此於堆積物除去的一方發生偏向。但 是晶座與載置台以其間隙〇 . 1 mm以下的精度密封地製作 是很困難,無法實現。 爲了解決這個情形,如第1 9圖所示,在晶座34下面 溶射金屬膜,形成金屬溶射膜3 9。溶射金屬是用鎢,但 據知這是因爲對氧化鋁而言接著性良好。金屬膜具有電氣 傳導性,往晶座的接著性佳的話,不一定要是鎢,金、銀 、鋁、銅等也可以。而金屬膜的製造法也不一定是溶射’ 電鍍、濺鍍、蒸鍍、印刷、塗布、薄膜接著等能形成薄膜 的方法無論那一種都可以。藉此採用該構造,金屬膜就可 在一處與載置台5接觸,因爲會在整個金屬膜發生與載置 -26- (21) (21)1302075 台相同的電壓,所以能迴避晶座與載置台的間隙問題。 使用第1 9圖的裝置構成,以實驗來調查堆積物的附 著狀況的結果,在以箭頭所示的堆積物附著限制區域內, 堆積物的附著再現性不佳。此方法的優點是,就算金屬膜 與載置台是以一點來接觸的話,整個金屬膜還是會發生與 載置台5相同的電壓’且可在晶座34的表面產生均句的 高頻電壓。因而,如第2 0圖所示,就連具有絕緣蓋3 7等 其他構造物的狀態下,還是能擴大金屬溶射膜的溶射範圍 ’藉此就能在任意範圍的晶座表面產生均勻的高頻電壓。 再者,於第2 0圖的構成中,在以箭頭所示的堆積物附著 限制區域,經實驗確認再現性佳,能除去堆積物附著。 由以上的結果了解到藉由使用金屬溶射等的金屬膜, 就能在晶座表面均勻地產生高頻電壓,並能均勻抑制堆積 物附著。使用該技術的話,就算構造上晶座的厚度須要很 厚,還是能將金屬膜埋入晶座中,藉此得到同樣的效果。 袠不此構造的是第21、22圖。 如該些圖所示,自晶座3 4表面起在所定深度的位置 (圖中約爲4 m m )埋入金屬溶射膜3 9,且自金屬溶射膜 3 9出現接觸載置台5,而確保電氣的導通,且在金屬溶射 膜3 9產生與載置台5相同的高頻電壓。 在載置試料1 3的載置台,目前爲止,如圖所示,除 了在金屬的載置台上,利用溶射等形成靜電吸附膜的種類 外,尙有在氮化鋁或氧化鋁等的陶瓷介電質製的載置台中 ’埋入金屬電極’自該金屬電極進行靜電吸附施加高頻偏 -27- (22) 1302075 屬 的 此 〇 電 3 9 鎢 堆 相 子 42 入 的 載 壓 表 用 極 在 端 壓的種類。連像這類的載置台,也是藉由對晶座形成金 膜,就能製作具有完全相同機能的晶座。 將此例表示於第23、24圖。第23圖是在晶座34 背面形成金屬膜的情形。載置台5可由氮化鋁製成,在 中埋入用鎢製成的靜電吸附、高頻偏壓施加用電極40 自該電極向著金屬溶射膜3 9,埋入導通圖案(鍔部導 圖案41、42、43 ),藉此獲得電極40與金屬溶射膜 的導通。藉此就可在晶座背面的金屬溶射膜·3 9產生與 電極相同的高頻電壓。當然連經由該構造往晶座表面的 積物附著控制能力,也是與目前爲止所描述的情形完全 同。 第24圖是在晶座3 4內部埋入金屬溶射膜3 9的例 ,延長第23圖所述的導通圖案(鍔部導電用圖案41、 、4 3 ),並藉由接觸連接埋入載置台5的電極4 0和埋 晶座3 4的金屬溶射膜3 9的話,機能性就會與第2 3圖 情形完全相同。 第23、24圖所示的載置電極5的情形下,需要在 置電極5內部製作自埋入電極5內的靜電吸附、高頻偏 外施用電極4 0將高頻供給至金屬溶射膜3 9的圖案,, 不其中一例的是第2 5圖。 第25圖中,在與鎢製的靜電吸附、高頻偏壓外施 電極4 0平行的關係的鍔部導電用圖案4 1,是將與鎢電 相同的鎢薄膜埋入載置電極中。該些埋入的鎢薄膜彼此 載置電極成型後,於需要的部分開設孔部,以焊接貫通 -28- (23) (23)1302075 子的方法完成連接。 對於目前爲止所述的晶座的偏壓外施法,是當載置台 的高頻電壓爲某値時(此例爲4 0 0V ),晶座上面的堆積 物附著正好可被抑制。而且一旦載置台的電壓昇高,晶座 上面的高頻電壓變得太高,就會有縮減晶座,零件壽命變 短的缺點。該缺點乃如第26圖所示,導入用來調節自外 部施加到晶座表面的高頻偏壓電壓的手段就能解決。在第 2 6圖表示將晶座的金屬膜的電壓,以安裝在外部的可變 電容器VC進行調整的電路。將此成爲實際的構造而示之 的是第2 7圖。 於連接在晶座部分的載置台表面,利用溶射等形成陶 瓷被覆5 0,並且不直接接觸晶座金屬溶射膜5 1與載置台 5。該陶瓷被覆5 0是形成第26圖所示的電容器C,且載 置台5具有將所施加的一部分高頻電壓,傳遞到晶座金屬 溶射膜5 1的作用。除此外,載置台5藉由外加的另一可 變電容器VC,將已知的高頻電壓傳遞到晶座金屬溶射膜 5 1。經由這兩個電容器所傳遞的高頻電壓,位相是相同的 ,簡單地加算,根據其電壓就可決定產生在晶座表面的高 頻電壓。例如晶座厚度爲4mm、晶座金屬溶射膜的表面 積爲4〇〇cm、陶瓷皮膜是氧化銘並爲300μπι、可變電容器 VC的最大容量爲8 00 OPf的話,當載置台的偏壓高頻電壓 爲400V時,一旦改變可變電容器VC的容量,晶座表面 電壓就可在約3 0至1 〇 〇 V的範圍做改變。像這樣,晶座 厚度、陶瓷被覆、金屬溶射膜表面積與可變電容器V C經 -29- (24) (24)1302075 由適當選擇,就能控制產生在晶座表面的高頻電壓。而此 時的晶座金屬溶射膜圖未示,但可與可變電容器VC連接 ,也可組裝在晶座內部。 對於在晶座改變已知的偏壓,也可採用有別於對載置 台供給高頻的高頻電源1 1的高頻電源。將此表示在第2 8 圖。此例,有別於對載置台供給偏壓的基板偏壓電源11 ,可採用對晶座金屬膜供給高頻的晶座偏壓電源1 1 a。此 情形的電極構造表示在第2 9圖。在此很重要的是需要將 已知晶座金屬溶射膜5 1的高頻電壓不會受到載置台5的 高頻電壓影響地,在載置台5與晶座金屬溶射膜5 1之間 ,組裝絕緣及接地屏蔽(接地基層36)。藉此會有所謂 需要晶座偏壓電源1 1 a的缺點,但施加在晶座的偏壓可與 施加在試料1 3的高頻電壓完全獨立的加以控制。而此時 的晶座金屬溶射膜5 1圖未示,但可與晶座偏壓電源1 1 a 連接,也可組裝在晶座內部。 第3 0圖是說明晶座偏壓電壓最適化的方法圖。與前 述的F S V同樣地,晶座偏壓電壓也有最適値。該電壓會 影響偏壓電源的頻率、晶座材料或厚度、電漿的密度、電 漿的組成、真空容器整體的構成以及試料的材料、處理速 度、處理面積。因而晶座偏壓電壓的最適値在每個製程都 需要改變。與第3圖的情形同樣地,表示晶座偏壓電壓以 某個値(第3 0圖的b點)爲界限,一旦晶座偏壓電壓昇 高’晶座材料的發光就會變強。用b點以下的晶座偏壓電 壓’就成爲堆積物堆積在晶座的狀態,用b點以上的晶座 -30- (25) (25)1302075 偏壓電壓,堆積物只會濺鍍不會堆積,晶座材料本身也會 濺鍍。 曰曰座偏壓電壓最適電壓是屬於b點的電壓,但根據製 程也有a點的情形。這是經由晶座材料的濺鍍,晶座材料 在氣相中被釋放,假設試料的處理反應或氣相中的反應錯 開’就是相當於無法實行所希望的製程情形等等。亦即藉 由將晶座偏壓電壓設定在a點,認爲在晶座會稍微有堆積 物的堆積’晶座材料完全沒有濺鍍。藉此,就會因晶座材 料的釋放,防止製程受阻。取而代之的是堆積物還未充分 堆積在晶座的時候,晶座就需要以淸洗專用的製程(在此 ’晶座偏壓電壓設定得比b點高)進行淸洗。 相反的,晶座稍微附著堆積物的話,就會因爲產生異 物等的理由,而有無法穩定實行目的製程的情況。此時是 設定在晶座偏壓電壓最適點的c點,也可以稍微縮減晶座 ,但也可以設定在完全沒有附著堆積物的條件。此時,會 發生晶座消耗變大的缺點,但也會發生晶座淸洗減少的優 點。 也希望縮減晶座附著堆積物的時候,晶座偏壓電壓是 設定在b點。此時,經常進行晶座偏壓電壓的設定電壓的 再現性是很重要的。這是因爲需要抑制當以不同的裝置進 行同一製程時,或以同一裝置連續進行同一製程時的歷經 時間變化。因此晶座偏壓電壓的回饋控制變得很重要。 第3 1、32圖是分別對應第26、28圖附有回饋控制電 路的晶座偏壓外施電路。連同兩電路將晶座金屬溶射膜的 -31 - (26) (26)1302075 電壓’介著減衰器及濾波器52進行檢波,且轉換爲直流 電壓。藉此該直流電壓信號就會成爲以晶座偏壓電壓爲比 例的信號。藉由將該信號與以本體裝置控制部5 7的方法 等所設定的預設値或設定値做比較,第3 1.圖的情形是控 制令決定晶座偏壓電壓的可變電容器V C旋轉的馬達。而 第3 2圖的情形是控制晶座偏壓電源〗2 &的輸出。藉由利 用該方法,就能將晶座偏壓電壓控制在以本體裝置所設定 的値’以不同的裝置或同一裝置連續處理相同製程的情況 下’就能一定値地控制晶座偏壓電壓的値,抑制裝置間差 距或歷經時間變化。 以上是針對沒有堆積或附著堆積物地加以控制的區域 ’亦即真空鐘罩12、氣體噴出口 23、晶座34,對其方法 與構造做說明。由試料1 3放出的反應性生物或以氣相合 成的物質,僅限於蒸氣壓高的揮發性成份,該些物質是藉 由排氣裝置自放電部或被處理物周邊被排氣,雖然會稍微 堆積在電極下部或排氣導管等,但較多的會被排氣。 而且堆積性強,就是蒸氣壓低,往固體的附著係數很 接近1 (接觸固體的時候,幾乎被捕捉)物質成爲試料的 反應生成物,或在氣相中被合成的話,該些物質會堆積在 包括試料周邊的真空鐘罩、晶座或是氣體噴出口等的真空 容器壁,幾乎沒有被排氣。 在此種狀況下,無論是真空容器內的那個部位都不會 附著堆積物地加以控制的話,該些堆積性強的物質就會失 去堆積場所。因此,堆積性強的物質在氣相中的密度變高 -32- (27) (27)1302075 ,成爲增加堆積的原動力,結果就會強制性地堆積在真空 鐘罩或晶座上。 亦即,真空鐘罩或晶座等未附著堆積物地加以控制, 準備在那兒都能多量堆積堆積物的場所,藉此發生其效果 。然後增加可堆積的堆積物數量,或由氣相快速地堆積, 藉此就能增加真空鐘罩或晶座方面的堆積物的堆積量控制 能力。 就是需要在發生堆積性強的反應生成物的被處理物的 周邊,或是在電漿區域的周邊設置由氣相快速且大量地堆 積堆積物的區域(堆積物陷阱區域)。前述防著板是作爲 抑制往氣體噴出口附著堆積物的蓋子作用,但這是本身堆 積有堆積物爲前提,所以這個也是陷阱的一種。 第3 3圖是表示在真空容器的內部,分割包括堆積物 陷阱的區域。首先,真空鐘罩區域與晶圓(試料)/晶座 區域是指沒有附著堆積物地加以控制的區域。其他接觸電 漿的區域全部爲堆積物陷阱區域,堆積物陷阱區域①是包 括防著板與氣環下部的區域,並且能直接由晶圓觀察(能 看得見)的區域。該些真空鐘罩區域、晶圓/晶座區域與 堆積物陷阱區域①是全部能由晶圓直接觀察(可看得見) 的區域,爲發生電發的區域,同時是最容易由晶圓或是在 電漿氣相中所形成的堆積性強的物質的區域。在該些區域 內未被控制的狀態下,堆積堆積物的話,就會成爲堆往晶 圓的異物的原因,或發生電漿的歷經時間變化。因而在能 直接由該些晶圓觀察的區域,要儘量附著堆積物,就必須 -33- (28) (28)1302075 完全被控制。 在本發明中,於防著板使用第1 2圖、第1 3圖所示的 構造的時候,能由該些晶圓觀察的區域的1 〇〇%是處於控 - 制堆積物的狀態。連使用第6圖、第9圖、第1 1圖的構 、 造,也需要是能由該些晶圓觀察的區域的表面積的90%以 上來控制堆積。 . 而如前所述,堆積物陷阱區域具有充分的機能,因爲 , 能提高真空鐘罩區域或晶圓/晶座區域的堆積物抑制機能、 ,所以儘量縮小真空鐘罩區域或晶座區域的表面積,而希 望儘量增大堆積物陷阱區域①的表面積。由晶圓產生堆積 性強的反應性生物的時候,晶圓的表面積爲SW和堆積物 陷阱區域①的表面積S1爲S1C0.5SW,而在真空鐘罩區 域或晶圓/晶座區域的堆積物抑制機能降低是根據發明人 等的實驗了解到的。因而將反應性生物快速堆積到堆積物 陷阱,就需要s 1 > =0.5 S 1的關係,希望s I >二S 1爲佳。 堆積物陷阱區域②稱爲環形蓋,位在堆積物陷阱區域 ® ♦ ①的下部。該區域不能直接從晶圓望見,但在其上部會因 擴散引起輸送堆積性強的物質,而附著大量的堆積物。堆 — 積物陷阱區域③是電極側面的蓋子,在此也不能直接從晶 · 圓望見,但與堆積物陷阱區域②同樣地,在其上部附著多 量的堆積物。該些堆積物陷阱區域②③爲不能直接從晶圓 望見的區域,附著在該些的堆積物就成爲晶圓的異物,或 造成電漿歷經時間變化原因的可能性變小,但由於裝置做 大氣開放時的淸掃作業效率良好的施行外,該些堆積物陷 -34- (29) (29)1302075 拼是很重要的。就是,反應性生物堆積性很強的緣故,其 90%以上能附著在堆積物陷阱區域①②③而回收。因而該 些堆積物陷阱區域①②③做交換配套元件化(可交換化) ’大氣解放後全換爲洗淨過後的零件,就能效率良好的淸 掃真空容器內部。因此,堆積物陷阱需要輕量以及拆卸/ 安裝容易的兩個條件。爲了輕量,堆積物陷阱的素材例如 是鋁等輕量的構件就是很重要的。 % 真空容器大氣解放後,從堆積物陷阱①開始按②、③ 順序外,施行最低限度所需要的洗淨作業。最低限度所需 # 要的洗淨場所例如在晶圓搬送用的開口部周邊等。其後依 相反順序安裝洗淨過後的堆積物陷阱的交換配套元件,就 能直接進入真空吸引。藉此就能以最低限度的時間進行洗 淨作業。以此種順序進行洗淨作業,不但能縮短洗淨時間 ,也能縮短真空吸引所需要的時間。其原因是僅最低限度 所需要的時間進行大氣開放,就能以最低限度完成吸附不 是真空零件的大氣中的水份外,使用最低限度所需要的洗 ® Ψ 淨用溶媒(純水或酒精等),就能最低限度完成殘留在真 空容器內的溶媒量。拆下的堆積物陷阱①②③則在洗淨後 6 作爲下一回大氣開放/洗淨作業用的交換配套元件而再加 · 以利用。堆積物陷阱可做交換配套元件化的區域沒有必要 限定爲第3 3圖所示的區域。會因製程或處理的材料而異 ,但以附著堆積物的所有區域作爲堆積物陷阱是很有效的 。例如只在電極蓋上半部以上的區域附著堆積物的情形, 是將電極蓋的上半部進行交換配套元件化。相反的,在直 -35- (30) (30)1302075 到堆積物堆積到排氣導管的條件下,排氣導管內壁也作爲 堆積物陷阱區域’且一旦進行交換配套元件化就變得很有 效。 ' [發明效果] 如以上說明地藉由本發明的話,因爲控制堆積在真空 . 容器內壁的堆積膜,所以就能提供一量產穩定性優的電漿 # 處理裝置及電漿處理方法。 % [圖面的簡單說明] 第1圖是表示有關本發明的實施形態的電漿處理裝置 的圖。 第2圖是表示法拉第屏蔽的圖。 第3圖是說明將F S V最適化的方法的圖。 第4圖是說明FSV的回饋控制的圖。 第5圖是表示針對真空鐘罩安裝法拉第屏蔽實例的圖 ® 〇 第6圖是說明防著板的安裝構造的圖。 第7圖是表示防著板的熱計算實例的圖。 _ 第8圖是說明防著板的支撐構造的圖。 第9圖是說明附著在真空鐘罩內壁的堆積物對策的圖 〇 第1 〇圖是說明防著板近傍的堆積物的附著的圖。 第1 1圖是表示防著板的構造例的圖。 -36- (31) (31)1302075 第1 2圖是表示防著板的其他構造例的圖。 第1 3圖是表示防著板的另外其他構造例的圖。 第1 4圖是表示包括載置台的試料保持部的構造的圖 〇 第1 5圖是表示包括晶座表面的基板偏壓電路的圖。 第I 6圖是說明晶座的厚度與發生在晶座表面的偏壓 電壓的關係的圖。 第1 7圖是說明針對薄壁晶座附著堆積物狀況的圖。 第1 8圖是說明針對薄壁晶座附著堆積物狀況的圖。 第1 9圖是表示在晶座下面溶射金屬膜實例的圖。 第2 0圖是表示在晶座下面溶射金屬膜實例的圖。 第2 1圖是表示在晶座內埋入金屬膜實例的圖。 第2 2圖是表示在晶座內埋入金屬膜實例的圖。 第23圖是表示應用在陶瓷介電質製的載置台具備有 金屬膜的晶座實例的圖I ° 第24圖是表示應用在陶瓷介電質製的載置台具備有 金屬膜的晶座實例的圖。 第2 5圖是表示偏壓外施用電極的連接構造的圖。 第2 6圖是說明調整外施於晶座表面的高頻偏壓電壓 的手段的圖。 第2 7圖是說明調整外施於晶座表面的高頻偏壓電壓 的手段的構造例的圖。 第2 8圖是說明使用別的電源對晶座供給高頻偏壓實 例的圖。 -37- (32) 1302075 第2 9圖是說明使用別的電源對晶座供給高頻偏壓時 的電極構造例的圖。 第3 0圖是說明將晶座偏壓電壓最適化的方法的圖。 第3 1圖是說明附有回饋電路的晶座偏壓外施電路的 圖。 第3 2圖是說明附有回饋電路的晶座偏壓外施電路的 圖。 第3 3圖是說明真空處理室內部各區域的圖。 [圖號說明] la 上天線 lb 下天線 2 真空處理室 3、32、32a 匹配箱(整合器) 4 氣環a Faraday shield that imparts a high-frequency bias voltage to the hood, and an anti-sliding plate that is detachably attached to the inner surface of the gas ring except for the discharge port of the processing gas, and includes the sample from the sample The area of the inner surface of the gas ring of the anti-plate is seen on the surface, and is set to be about 1 /2 or more of the sample area. [Embodiment] [Embodiment of the Invention] Hereinafter, a first embodiment of the present invention will be described with reference to the drawings. In the first embodiment, when the sample subjected to the plasma treatment is a non-volatile material, the etch treatment is taken as an example, and a method of suppressing the accumulation of the reaction product to the inner wall of the vacuum container during the treatment will be described. Fig. 1 is a cross-sectional view showing the plasma processing apparatus of the present embodiment. The vacuum vessel 2 is a vacuum processing chamber in which a vacuum bell cover 1 2 made of an insulating material (for example, a non-conductive material such as quartz or ceramic) for closing the upper portion thereof is formed. The inside of the vacuum container is provided with a mounting table 5 for placing the sample 1 belonging to the workpiece, and a plasma 6 is generated in the processing chamber to process the sample. The mounting table 5 is formed on the data holding portion 9 including the mounting table. On the outer circumference of the vacuum bell cover 12, a coil-shaped upper antenna 1a and a lower antenna 1b are disposed. On the outside of the vacuum bell jar 12 is provided a disk-shaped Faraday shield 8 which is combined with the plasma 6 static -11 - (6) (6) 1302075 electric valley type. The antennas 1a, 1b and the Faraday shield 8 are connected in series to a local frequency power supply (first high frequency power supply) via the integrator (matching box) 3 as described above. A series resonant circuit (variable capacitor VC3 and reactor L2) which can change the impedance between the Faraday shield 8 and the ground is juxtaposed. The processing gas is supplied to the vacuum vessel 2 via the gas supply pipe 4a. The gas in the vacuum vessel 2 is decompressed and evacuated to a predetermined pressure via the exhaust unit 7. The processing gas is supplied from the gas supply pipe 4a to the inside of the vacuum vessel 2, and in this state, the processing gas is plasmatized by the electric field generated by the antennas 1a and 1b. A substrate bias power supply (second high frequency power supply) 11 is connected to the mounting electrode 5. Thereby, ions existing in the plasma 6 are introduced onto the sample 13. Furthermore, the high frequency power supply can be used, for example. 56MHz, 27. 12MHz, 40. High-frequency power in the HF band such as 68MHZ or a high-frequency power source such as a VHF band of a higher frequency is used to supply high-frequency power to the inductive coupling antennas 1a, 1b and the Faraday shield 8, thereby enabling vacuum An electric field for plasma generation is obtained in the container 2. At this time, the integrator (matching box) 3 is used to make the impedance of the inductive coupling antennas 1a, 1b coincide with the output impedance of the high-frequency power source 10, whereby the reflection of electric power can be suppressed. The integrator (matching box) 3 can be connected to the variable capacity capacitors Vcl, Vc2 in an inverted L shape as shown, for example. As shown in Fig. 2, the Faraday shield is a conductor type having a straight stripe slit 14 and is disposed so as to overlap with a ceramic vacuum vessel (vacuum bell jar 1 2 ). The voltage applied to the Faraday shield 8 can be adjusted by the aforementioned -12-(7) (7) 1302075 variable capacitor (V C3 shown in Fig. 1). The processing method for each wafer applied to the voltage (shielding voltage) of the Faraday shield 8 or the method corresponding to the rinsing treatment may be set to an arbitrary value. Furthermore, the principle of rinsing the inner wall of the vacuum vessel shielded by Faraday is to generate a bias voltage in the interior of the vacuum vessel (the inner wall of the vacuum bell) according to the known high frequency voltage of the Faraday shield, thereby absorbing the ions in the plasma. Introduced into the wall of the vacuum vessel, the vacuum vessel wall is impacted by the introduced ions to cause physical and chemical sputtering to prevent the reaction product from adhering to the vacuum vessel wall. It has a Faraday Shield Voltage (FSV) that is most suitable for rinsing the inner wall of the wall by Faraday shielding. The most appropriate F S V affects the frequency of the high-frequency power source, the material of the vacuum vessel wall, the density of the plasma, the composition of the plasma, the composition of the entire vacuum vessel, and the material, processing speed, and processing area of the workpiece. Therefore, the optimum fit of the F S V needs to be changed in each process. Fig. 3 is a view for explaining a method of optimizing F S V, showing the relationship between f S V and the luminous intensity (light amount) of the vacuum vessel wall material (for example, aluminum or oxygen constituting alumina when the wall material is alumina). As shown in the figure, 'When a certain FSV (Fig. 3 is point b) is the limit, if Fsv becomes high, the light emission of the wall material becomes stronger. This is a state indicating that ρ s V below point b, deposits (precipitates) will accumulate on the wall, and FSV ' above b point means that the precipitate will only be deposited without sputtering, and the wall material itself will be Sputtering. The FSV is best suited to the voltage at point b, but depending on the process, the & point is also the most appropriate. For example, due to the sputtering of the vacuum wall material, the wall material is released -13- (8) 1302075 in the gas phase, thereby assuming that the treatment reaction of the treated material or the gas phase is staggered, there is a process equivalent to the desired process. It is believed that by setting the FSV at point a, deposits are deposited in the vacuum vessel, whereby the wall material is not splashed at all. The process is hindered by the release of wall material. However, when depositing sediment on the inside of the vacuum vessel, it is necessary to wash the inner wall of the vacuum vessel with a setting that is higher than the b point by the FSV. Contrary to the above, there is also a point c which is the most suitable process. When the reaction product is accumulated on the inner wall of the vacuum vessel, the high-frequency power generated by the generator is absorbed by the deposit, and the plasma is specialized, and the intended process is not stably performed. In this case, as described earlier, it is set at point c. That is, the inner wall can be slightly reduced, and the product can be set to a condition that does not accumulate at all. At this time, there is a disadvantage that the consumption of the empty container is increased, but the number of times of washing the inner wall is reduced, and the inner wall is cut and the reaction product is not accumulated, and the FSV is set at point b. At this point, it is important that the FSV settings are good. This is because when a different device is used, or when the same process is continuously performed for the same device, a change in suppression is required. Therefore, the feedback control of F S V becomes very important. Fig. 4 is a diagram for explaining the feedback control of F S V . The output of the high-frequency power supply 10 for plasma generation is applied to the Faraday screen FSV via the impedances VC1 and VC2), and the capacitors C2 and C3 are divided by the capacitors C2 and C3 to form a small signal. In addition to high-modulation waves or other frequency components, the reaction shape in a 14-etc. In this way, the wall can be prevented from being insufficiently stacked, for example, to foreign matter, or the property is changed. The FSV is reacted to the so-called true desired voltage, and the same process is shown in the time series. 8. Detect and filter through the detector (9) (9) 1302075 16 and convert it to DC voltage and amplify it with amplifier 17. Thus, a d C voltage signal proportional to FSV can be obtained. This signal is compared with a preset 値 or setting 设定 set by the comparator i 8 by the program output of the main body control unit 2 ,, and the motor is controlled by the motor control unit 19 to determine the voltage rotation by the FSV. The variable capacitor VC3 can thereby control the FSV to be controlled by the main device control unit 20, for example, when the same process is continuously processed by different devices or the same device, and the FSV can be controlled to a certain state. Moreover, it can suppress the gap between devices and the change of time. The Faraday shield is combined with the plasma through the wall of the dielectric vacuum vessel (vacuum bell jar). As a result, the FSV is The electrostatic capacitance between the Faraday shield and the plasma and the ion sheath of the wall are divided, and the divided voltage is related to the ion sheath, thereby accelerating the ions to cause ion sputtering on the inner wall of the vacuum vessel. When the thickness of the vacuum vessel wall made of alumina is 10 mm, the voltage applied to the ion sheath is about 60 V when the FSV is 500 V. It is useful to increase the voltage applied to the ion sheath with a very low FSV. The high FSV is generated because it is easy to discharge abnormally, etc., and the processing becomes more difficult. For the rise of the voltage applied to the ion sheath with a very low F SV , and the determination of the electrostatic capacity process using the ion sheath For the sake of slurry properties, it is very effective to minimize the electrostatic capacitance between the Faraday shield and the plasma. To achieve this, as long as the induction rate of the dielectric vacuum vessel material is increased, the dielectric vacuum can be minimized. The wall thickness of the container. The material suitable for this point can be made of -15- (10) (10) 1302075. When the material is used to make a vacuum container with a thin wall thickness, there is a problem that there is a gap between the Faraday shield and the wall of the vacuum vessel (vacuum bell jar). The alumina induction rate is about 8, 10 mm wall thickness. When the thickness is converted to atmospheric conditions, it is 10/ 8 = 1.  2 5 m m. Here, it is assumed that the gap between the Faraday shield and the plasma is considered to be 1 in the atmosphere when the gap between the Faraday shield and the vacuum vessel is 〇 to 1 m m .  2 5 to 2 · 2 5 m m, which is very close to one-half times. At this time, under the previous conditions, the voltage of the ion sheath will vary from about 3 3 V to 60 V. When the voltage of the ion sheath changes greatly, the deposit (precipitate) adheres to a certain part of the inner wall of the vacuum vessel, and the other parts do not adhere to the deposit, whereby the known FSV reduces the suppression of sediment. The effect of attachment. In order to prevent this, it is necessary to make the gap between the Faraday shield and the vacuum container constant, or to form a Faraday shield by a film to seal the vacuum container. It is very simple to make a Faraday shield from a machined metal sheet, but the gap between the wall and the wall of the vacuum vessel (vacuum bell jar) is 〇.  It cannot be achieved below 5 m m. However, a conductive elastomer such as a conductive sponge is adhered under the Faraday shield, and the sponge is used to bury the gap between the shield and the vacuum container wall. Fig. 5 is a view showing an example of mounting of a Faraday shield for a vacuum bell jar. Figure 5 (a) is shielded in Faraday! In the case where a gap is provided between the vacuum bell jar 1 and the vacuum bell jar 12, the inner surface of the vacuum vessel in a certain portion of the gap becomes very dense. -16-(11) (11) 1302075 is easy to accumulate deposits. On the other hand, the vicinity of the gap is a state in which no accumulation is accumulated. Fig. 5(b) is a view showing an example in which the gap elastic conductor 1 2 a is embedded, for example, a conductive sponge. Thereby, the Faraday shield 14 can obtain the same effect as the sealing of the vacuum bell 1 . Further, since the conductive sponge has a large stretchability, it can be softly embedded in a gap having a large size. Fig. 6 is a view showing a mounting structure of the squeegee, and Fig. 6(a) is a view showing a gas discharge port 23 formed in the hem of the vacuum bell 1 and the gas ring below it. In this configuration, when the electric hair treatment is continued, the deposits are accumulated in the portions indicated by A and B in the figure. On the inside of the vacuum bell jar, the portion above the B of the figure will not accumulate deposits due to the effect of ion sputtering by F SV. The problems generated here are the parts shown in the aforementioned A and B. The portion of A refers to the periphery of the gas discharge port 23. When the deposit adheres to the deposit, the deposit becomes easily peeled off due to the effect of the air flow, and the peeled deposit becomes foreign matter attached to the wafer belonging to the processed object. On, hinder the process. The portion of B refers to the inner wall of the vacuum bell cover 12, but the Faraday shield 14 is far from the inner wall of the vacuum bell jar. Therefore, the ion sheath voltage by F s V is lowered, and the effect of suppressing the deposition of deposits due to ion sputtering is insufficient. Fig. 6(b) is a structural view for explaining that the gas discharge port 23 is covered by the anti-slip plate 22. The portion of the aforementioned A means that the vicinity of the gas discharge port is required to minimize the adhesion of deposits to the portion. Decreasing the adhesion of the deposit to the gas discharge port 2 3 is to reduce the area of the plasma 6 which is visible from the gas discharge port 2 3 through the hole of the prevention plate 22, that is, to reduce the angle of view relative to the electric prize -17- ( 12) (12) 1302075, the gas discharge port 23 does not directly see the wafer, that is, the central axis of the gas discharge port 23, and the sample is included in the above-mentioned viewing angle, and plasma generation above the sample is required. Spatial direction. Fig. 6(c) is a detailed view showing the relationship between the anti-slip plate and the gas ejection port. In this case, the viewing angle is reduced to about 3 degrees, and the wafer cannot be seen directly from the gas ejection orifice. At this time, it is effective to prevent the gap between the preventing plate 22 and the gas discharge port 23 with a gap therebetween. I hope the size of the gap is 〇. 5mm or more. Several advantages are created via this gap. First, the holes formed by the gas formed on the preventing plate are the same size, and the viewing angle to the plasma can be reduced by the gap, and the amount of the deposit adhering to the gas discharge port 23 can be reduced. When the gas is ejected from the gas ejection port 23 into the vacuum vessel, a large pressure drop occurs, and the flow proceeds from the viscous flow to the intermediate flow, and finally becomes a molecular flow. Here, in the vicinity of the gas discharge port 23, the pressure of the gas is still relatively high in the intermediate flow state, and once the deposit adheres thereto, the force from the air flow is absorbed, and the deposit is easily peeled off. . By the gap, the airflow in the vicinity of the anti-plate 22 becomes a molecular flow, and the flow of the deposit which adheres to the deposit of the anti-plate is reduced, and the peeling of the deposit can be reduced. Further, as described later, the amount of the deposit adhering to the preventing plate 22 can be reduced by efficiently increasing the temperature of the preventing plate 22. Fig. 7 is a view showing an example of heat calculation of the anti-sliding plate. As a result of the processing of the process, it was found that a material such as Fe or Pt was hard to adhere to a member of 250 ° C or more. Then, the anti-plate is designed such that the temperature of the above-mentioned anti-slip plate is 250 ° C or higher. The thermal balance of the -18-(13) (13)1302075 heat from the plasma, the heat diffusion from the support of the anti-plate, and the diffusion of the heat radiation from the entire plate are calculated by thermal design. The result of this heat calculation is shown in Fig. 7. When the anti-slip board is SUS (stainless steel), it is known that the high frequency (RF) input to the plasma is about 500 W and the equilibrium temperature will exceed 250 °C. When the anti-plate is A1 (surface acid-resistant aluminum processing), the RF input is 1 000 W or more, and the plate balance temperature is 250 ° C or more. The following describes the characteristics of each part corresponding to the calculation. The large heat of the plasma is caused by the plasma diffusion in the reactor. Therefore, the RF input X of the conventional plasma is used to prevent the board area/plasma from contacting the entire area. The design of the anti-plate form is that the RF input to the plasma = 1 200W, the heat to the anti-plate is 2 60 W. The thermal radiation from the anti-plate is diffused because the material is S U S and the surface is mirror finished with a surface emissivity of 0. 2 or so, so it can be suppressed very low. When the anti-plate is used with A1 (surface acid-resistant aluminum treatment), since the surface resistance of the acid-resistant aluminum is about 0.6, the thermal radiation diffusion increases. Fig. 8 is a view showing a support structure of the anti-sliding plate. In order to reduce the heat transfer from the support portion, the anti-sliding plate supports the entire circumference at three points, and the contact portion area with the gas ring main body is substantially in point contact as shown in Fig. 8 to suppress the heat transfer area. Specifically, the a' contact portion has a radial length of 3 mm and the contact portion has a length in the same direction of 1 mm. It is estimated that the contact thermal resistance will become too large for the degree of 3000 [W / (m2 K)], and the anti-plate support calculated from the contact area X contact heat transfer rate x (the inner surface temperature of the plate - the gas ring temperature) The heat transfer of the part should be only about 10W. ~ 19 - (14) 1302075 Actually try to prevent the board and actually measure the surface temperature. The material of the board is A1 (surface acid-resistant aluminum). Confirmed at the RF input, the surface temperature is about 205 °C, which is about the design flaw. As mentioned earlier, even if the anti-plate is maintained at a very high temperature, no deposits are attached. Therefore, it is important that the deposit adhering to the anti-sliding plate adheres. Therefore, it is desirable to have a slight unevenness on the surface of the anti-sliding plate because the adhesion of the mechanical material is good. The inventors experimented and learned that the desired surface roughness is ΙΟμπι or more. However, when the deposit starts to adhere, the deposited deposit gradually thickens its membrane state. For example, the 10 μm of the anti-plate has a bonding effect with respect to a deposit having the same film thickness. However, if the film thickness of the deposit becomes thick, the bonding effect is weak. Therefore, the initial state in which the amount of deposits is small to the amount of deposits is increased to a certain extent. The effective effect of the bonding effect is that it is desired to have both the unevenness of the ΙΟμηι and the unevenness of ΙΟΟμπι on the surface. Such a concavity and convexity method can be formed by, for example, embossing the concavities and convexities forming 1 ΟΟμη into a concave-convex formation of 10 μm. As described above, increasing the temperature of the anti-plate is to mirror the surface of the anti-plate, and it is desirable to form a surface in order to stably adhere the deposit. Therefore, it is possible to mirror the surface on which the deposit is adhered to the surface of the plasma (the surface on which the surface of the plasma is uneven, and the surface on which the deposit is not adhered (for example, the surface facing the gap between the plate and the gas port) is mirror-finished. The heat radiated from the plate is expected to be mirror-finished on the surface of the gas discharge port of the gas ring that is not attached to the deposit. The anti-1 2 0 0 W can not be completely stabilized and stacked. By the processing of the unevenness, the adhesion, and the irregularity of the shape of the pile, the surface is formed into a concave-convex). The formed body is sprayed out and the surface is prevented from being -20- (15) (15) 1302075. Covers the smallest size of the gas outlet. This is to prevent a small amount of deposits from accumulating on the anti-plate. In order to reduce the amount of deposits, in addition to the relationship between the temperature, the thermal hysteresis of the anti-plate is caused, and the heat of the deposit and the anti-plate material is caused. The difference in the amount of expansion and contraction, the deposit is easily peeled off. The anti-slip board is made of a material that is electrically conductive and is intended to be grounded. This is to increase the discharge area in addition to the grounding area of the high frequency used to generate the plasma. When the deposit is charged, the deposits become easily detached from each other due to the counter-distribution of the Coulomb force, and the deposit can be prevented from being charged as much as possible. The above structural design and thermal design were carried out to produce an anti-scratch sheet having a surface roughness of ΙΟμιη and ΙΟΟμηι, and the crude platinum Pt was etched continuously for 500 pieces to investigate the performance. As a result, the amount of deposition of the deposit to the gas discharge port was hardly observed. The deposit attached to the anti-sliding plate is very stable, and even the exfoliation of the deposit does not occur. Fig. 9 is for the portion of the B portion attached to Fig. 6 (the Faraday shield of the vacuum bell jar 12 is away from the inner wall of the vacuum bell jar. Therefore, the ion sheath voltage is lowered by the F SV, and the ion sputtering is deposited. The illustration of the deposit measures for the part of the part where the effect of the object adhesion suppression is not sufficient is explained. Part B of Fig. 6 is because the inner wall of the vacuum bell jar 12 has a long distance from the Faraday shield 14 and it is difficult to effectively utilize the region of the ion sputtering of the F S V . Thus, the anti-plate 22 is extended, and by covering the portion, the amount of deposition of the deposit is reduced, and the accumulation of the deposit can be achieved. Although this structure is shown, it is Fig. 9 (a). When using this test for the adhesion of deposits - 21 - (16) (16) 1302075, it is understood that at the center of point c of Fig. 9 (a), the deposit adheres to the inner wall of the vacuum bell jar by about 15 mm. region. Fig. 9(b) is a modification of Fig. 9(a). As shown in the figure, the vacuum bell cover 12 is formed substantially continuously on the inner surface of the gas ring 4, and the vacuum bell cover 12 is placed on the gas ring 4 to form a vacuum processing chamber. According to this configuration, the anti-plate is continuously formed on the inner surface of the vacuum bell jar and the inner surface of the gas ring. Thereby, it is possible to effectively protect the region where the ion sputtering of the aforementioned F S V is effectively protected by the anti-plate. Fig. 10 is a view for explaining the deposition of deposits on the near plate. First, what is not indicated by a broken line refers to an iso-density line of plasma. Note that point C is equivalent to the corner portion formed by the anti-slip plate and the vacuum bell, and the plasma density of this portion is of course lower than that of the periphery. This is because it is difficult to return the plasma to point C due to the thickness of the anti-plate. Therefore, it is considered that the c-point is reduced by the number of ions corresponding to the unit area of the inner wall of the vacuum bell jar, and the deposit is difficult to obtain. I think there is another reason. That is, the anti-plate has electrical conductivity, and F S V is ineffective for the ion sheath generated on the anti-plate, and the ion sheath is subjected to a DC voltage of about 15 to 2 〇V determined according to the plasma characteristic 1. In this regard, the effective region of the FSV is an ion sheath formed on the inner wall of the vacuum bell, and a high-frequency voltage of, for example, about 60 V, which is determined according to the characteristics of the plasma, is applied, which is effective for ion acceleration. Splash the inner wall of the vacuum bell. In the vicinity of point C, it is a low-voltage ion sheath corresponding to the self-generated anti-slip plate, and is moved to the transition region of the high-voltage ion sheath formed on the inner wall of the vacuum bell jar, and moves away from the anti-plate near the point C. While the voltage of the ion sheath rises, it slowly becomes a very effective area from the -22-(17)(17)l3〇2〇75 subspray. For the two reasons described above, as shown in Fig. 1 , it is considered to form a weakly sputtered region using FSV near the point C. In this area, in addition to the attachment of the cane, it is considered to be more likely to adhere to deposits than the sputtering using F S V. The first, fourth, and twelfth drawings respectively show an example of the structure of the anti-sliding plate. As shown in Fig. 1, in order to remove the cause of the decrease in the plasma density which is one of the causes of the weak sputtering region, a blade-shaped anti-scratch plate was produced and tested. As a result, as shown in Fig. 1, the weak sputtering region is reduced, and it is confirmed that the deposit adhering region is reduced. Therefore, in order to remove another cause, as shown in Fig. 2, in the case where the upper portion 22a of the anti-plate is changed to an insulator (in this case, alumina), as shown in Fig. 12, strong sputtering can be performed. The area is consistent with the deposit area and there is almost no deposit attachment. Since the surface of alumina cannot be embossed, plastic processing is used to perform uneven processing on the surface. The material of the insulator can also be quartz or aluminum nitride. More complete prevention of deposits, as shown in Figure 13, the strong sputter area is of course wider than the deposit attachment area. Thus, it is possible to invade the plasma between the anti-plate and the vacuum bell, and to provide a gap between the anti-plate and the vacuum bell. In order to allow plasma to enter, the gap spacing needs to be sufficiently larger than the ion sheath gap to be more than 5 m m. If it is too large, the deposit will be weak due to the diffusion backflow. The maximum enthalpy of the gap in which the deposit diffuses without reflow is determined by the material of the deposit, the type of gas, and the pressure thereof. The process varies depending on the treatment process, but the test result and its target are 15 mm. The anti-sliding plate of the structure shown in Fig. 3 was produced, and the test was carried out. -23-(18) (18)1302075 The adhesion of the deposit to the vacuum bell jar was completely suppressed. In the case of this configuration, the anti-plate portion is not necessarily an insulating material, and even if it is composed of an electric conductor, the performance does not change. When deposits adhere to the upper portion of the crystal holder of the cover portion of the mounting table 5, foreign matter is generated on the wafer. As a result, a high-frequency bias is applied to the crystal holder, and physical and chemical ion sputtering is caused, and the deposit is not adhered to. Fig. 14 is a structural view showing the sample holding portion 9 including the mounting table. As shown in the figure, a mounting table for connecting the substrate bias power source 1 1 is mounted on the upper surface of the ground base layer 36 and the insulating base layer 35. The material of the mounting table is generally made of aluminum or titanium alloy. A portion of the object to be processed (sample 13) is placed on the upper portion of the mounting table to form a dielectric film, whereby the object to be processed can be electrostatically adsorbed. The dielectric film is a solvent film in the drawing, but it may be formed of a polymer material such as epoxy, polyimide or silicone. Ceramic materials formed by spraying or the like are available in the name of Shimyo, Niobium, PBN (Pyolyc Boron Nitride). On the other hand, in the case of Fig. 4, the grounding layer 36 and the insulating cover 37 are shielded in order to prevent the high-frequency power from being extracted by the plasma in the side surface direction of the mounting table 5. On the other hand, the crystal holder is generally made of quartz or alumina as a material to prevent damage by covering the electrode portion of the electrode portion other than the sample on which the mounting table is mounted. Fig. 15 is a view showing a substrate bias circuit (equivalent circuit) excluding the surface of the wafer. The substrate bias power supply 1 1 is mixed with a DC voltage for electrostatic adsorption supplied from the electrostatic adsorption power source in the impedance integrator (MB) 3 2 and then supplied to the mounting table. Here, the high frequency of the substrate bias power supply n is -24-(19) (19)1302075 from the mounting table 5 through the crystal holder 34, and is also supplied to the upper surface of the crystal holder. At this time, the crystal holder 34 is a capacitor which is formed of a dielectric material as a dielectric. Fig. 15 shows a capacitor formed by using the capacitor formed as the capacitor c (3 3). First, as shown in Fig. 14, when the thickness of the crystal holder is 5 m m, the adhesion of the deposit is tentatively investigated. As a result, it was found that a large amount of deposits were attached to the upper surface of the crystal seat. Thus, the relationship between the thickness of the crystal holder 34 and the bias voltage occurring on the surface of the crystal holder is theoretically reviewed. The result is shown in Fig. 16. It is understood that when the voltage generated on the inner wall of the vacuum bell jar is about 6 〇 V or more, deposit adhesion can be suppressed. In many experiments, the inventors have set the bias voltage (spike to spike) Vpp during the test to a range of about 400 to 500 V, and in the range of the bias voltage VPP, the surface of the crystal seat is 6 〇 v or more. Voltage ground, 4 mm is selected as the thickness of the crystal seat. Figures 17 and 18 are diagrams for explaining the adhesion of deposits to a thin-walled (e.g., 4 mm thick) crystal holder. As shown in Figure 17, the overall thickness of the crystal holder is 4 mm to test the adhesion of the deposit. As a result, it was confirmed that the surface of the drawing was indicated by an arrow (precipitate adhesion restriction region), and no deposit was attached. This makes it possible to suppress the adhesion of deposits by using a portion directly in contact with the mounting table. However, in the configuration of Fig. 7, the deposit adheres to the outer peripheral portion of the upper surface of the crystal holder, and this is a treatment for obstructing foreign matter to the object to be processed. Then, in addition to the insulating cover 37 formed on the side surface of the mounting table, the mounting table and the crystal holder are contacted on the upper portion of the wafer holder and the entire upper surface of the wafer holder. This configuration is shown in Fig. 18. The structure of the deposited matter was experimentally investigated using the structure shown in Fig. 18 -25-(20) (20)1302075 and the same as above. In this case, there is no deposit of the deposit on the upper surface of the crystal seat which is in contact with the mounting table and the upper side of the crystal seat. However, if it is known that the refilling of the crystal holder is repeated, it is still impossible to sufficiently remove the deposit under the same conditions. On the other hand, when the deposit cannot be sufficiently removed, it is judged that the deposit is deposited with a deviation from the distribution, and particularly on the side of the crystal holder, the deposit is likely to remain. The deposit is distributed in a biased manner, and the reason why the deposit cannot be sufficiently removed is estimated as follows. That is, since the material of the crystal holder is alumina, the thickness is 4 m, and the inductivity is about 8, so once converted into an air layer, it is equivalent to about 0. 5 m m. In this case, the gap is, for example, 0 between the crystal holder and the mounting table.  At 1 mm, the thickness of the dielectric forming the capacitor c of Fig. 15 is the crystal seat portion 〇.  5 m m and the gap portion 0 to 〇.  The total of 1 m m forms a 〇.  5 to 〇.  6 m m (20%) changes. This variation causes a deflection of the high-frequency voltage generated on the surface of the crystal seat, thereby deflecting the one on which the deposit is removed. However, the crystal holder and the mounting table are separated by a gap.  Sealing with an accuracy of 1 mm or less is difficult and impossible to achieve. In order to solve this problem, as shown in Fig. 19, the metal film is sprayed under the crystal holder 34 to form a metal spray film 39. The molten metal is tungsten, but it is known that this is because the adhesion to alumina is good. The metal film is electrically conductive, and if it has good adhesion to the crystal seat, it is not necessarily tungsten, gold, silver, aluminum, copper or the like. The method for producing a metal film is not necessarily a method of forming a film by sputtering, plating, sputtering, evaporation, printing, coating, film bonding, or the like. With this configuration, the metal film can be brought into contact with the mounting table 5 at one place, since the same voltage is generated throughout the metal film and the mounting of -26-(21)(21)1302075, so that the crystal holder can be avoided. The problem of the clearance of the mounting table. As a result of examining the attachment state of the deposit by the experiment using the apparatus configuration of Fig. 9, the adhesion reproducibility of the deposit was poor in the deposit adhesion restriction area indicated by the arrow. The advantage of this method is that even if the metal film and the mounting table are in contact with each other, the entire metal film will generate the same voltage as the mounting table 5, and a high-frequency voltage of a uniform sentence can be generated on the surface of the crystal holder 34. Therefore, as shown in Fig. 20, even in the state in which other structures such as the insulating cover 37 are provided, the melting range of the metal spray film can be enlarged, whereby uniformity can be generated in the crystal seat surface of any range. Frequency voltage. Further, in the configuration of Fig. 20, in the deposit adhesion restriction region indicated by the arrow, it was experimentally confirmed that the reproducibility was good, and the deposit adhesion was removed. From the above results, it has been found that by using a metal film such as metal spray, a high-frequency voltage can be uniformly generated on the surface of the crystal seat, and deposition of deposits can be uniformly suppressed. With this technique, even if the thickness of the crystal holder is required to be thick, the metal film can be buried in the crystal holder, thereby achieving the same effect. What is not constructed is the 21st and 22nd drawings. As shown in the figures, the metal-dissolving film 3 9 is buried at a predetermined depth (about 4 mm in the drawing) from the surface of the crystal holder 34, and the contact mounting table 5 is formed from the metal-dissolving film 39, thereby ensuring Electrical conduction is performed, and the same high-frequency voltage as that of the mounting table 5 is generated in the metal-solubilized film 39. In the mounting table on which the sample 13 is placed, as shown in the figure, in addition to the type in which the electrostatic adsorption film is formed by spraying or the like on the metal mounting table, ceramics such as aluminum nitride or aluminum oxide are used. In the electric-made mounting table, the 'embedded metal electrode' is electrostatically adsorbed from the metal electrode to apply a high-frequency bias -27- (22) 1302075 genus of the genus 3 9 tungsten stack phase 42 into the load-carrying table pole The type of pressure at the end. Even a mounting table of this type can form a crystal seat having exactly the same function by forming a gold film on the crystal seat. This example is shown in Figures 23 and 24. Fig. 23 is a view showing a case where a metal film is formed on the back surface of the crystal holder 34. The mounting table 5 can be made of aluminum nitride, and an electrode for electrostatic adsorption and high-frequency bias application 40 made of tungsten is embedded therein, and a conductive pattern is embedded from the electrode toward the metal-dissolving film 319. , 42, 43), thereby obtaining conduction between the electrode 40 and the metal spray film. Thereby, the metal spray film on the back surface of the crystal holder can generate the same high-frequency voltage as the electrode. Of course, even the attachment control ability to the surface of the crystal holder via the structure is exactly the same as that described so far. Fig. 24 is an example in which the metal-solubilized film 39 is buried in the inside of the crystal holder 34, and the conduction pattern (the crotch-conduction patterns 41, 4 3) described in Fig. 23 is extended, and buried by the contact connection. When the electrode 40 of the stage 5 and the metal film 38 of the buried crystal holder 34 are placed, the functionality is exactly the same as in the case of Fig. 2 . In the case of placing the electrode 5 shown in FIGS. 23 and 24, it is necessary to form the electrostatic adsorption in the inside of the electrode 5 and the high-frequency externally applied electrode 40 to supply the high frequency to the metal spray film 3. The pattern of 9 is not the case of Figure 25. In Fig. 25, the crotch portion conductive pattern 411 in a relationship parallel to the electrostatic adsorption of the tungsten and the high-frequency bias external application electrode 40 is buried in the mounting electrode by the same tungsten film as tungsten. After the embedded tungsten thin films are placed on the electrodes, the holes are formed in the required portions, and the joints are completed by soldering through -28-(23) (23) 1302075. For the bias external application of the crystal holder described so far, when the high-frequency voltage of the mounting table is a certain value (in this example, 400 V), the deposition of deposits on the crystal holder can be suppressed. Moreover, once the voltage of the stage rises and the high-frequency voltage on the crystal holder becomes too high, there is a disadvantage that the crystal holder is reduced and the life of the part is shortened. This disadvantage is solved by introducing a means for adjusting the high-frequency bias voltage applied from the outside to the surface of the crystal seat as shown in Fig. 26. Fig. 26 shows a circuit in which the voltage of the metal film of the crystal holder is adjusted by the externally mounted variable capacitor VC. This is shown in the actual structure and is shown in Fig. 27. The ceramic coating 50 is formed by spraying or the like on the surface of the mounting table connected to the crystal holder portion, and does not directly contact the crystal seating metal spray film 51 and the mounting table 5. The ceramic coating 50 forms the capacitor C shown in Fig. 26, and the mounting table 5 has a function of transmitting a part of the applied high-frequency voltage to the crystal-plated metal-dissolving film 51. In addition, the stage 5 transmits a known high-frequency voltage to the crystal-plated metal-dissolving film 51 by means of another applied variable capacitor VC. The high-frequency voltages transmitted through the two capacitors have the same phase, simply added, and the high-frequency voltage generated on the surface of the crystal seat can be determined according to the voltage. For example, if the thickness of the crystal seat is 4 mm, the surface area of the metallographic film of the crystal seat is 4 〇〇cm, the ceramic film is oxidized and 300 μm, and the maximum capacity of the variable capacitor VC is 800 00 OPf, when the bias voltage of the stage is high, When the voltage is 400V, once the capacity of the variable capacitor VC is changed, the surface voltage of the crystal seat can be changed in the range of about 30 to 1 〇〇V. Thus, the thickness of the crystal seat, the ceramic coating, the surface area of the metal spray film, and the variable capacitor V C are appropriately selected by -29-(24) (24) 1302075 to control the high-frequency voltage generated on the surface of the crystal seat. The crystallographic metal spray film pattern at this time is not shown, but it may be connected to the variable capacitor VC or may be assembled inside the crystal seat. For changing the known bias voltage at the crystal holder, a high-frequency power source different from the high-frequency power source 11 for supplying high frequency to the stage can be used. This is shown in Figure 28. In this case, unlike the substrate bias power supply 11 that supplies a bias voltage to the mounting table, a crystal holder bias power supply 1 1 a for supplying a high frequency to the base metal film can be employed. The electrode configuration in this case is shown in Fig. 29. It is important here that the high-frequency voltage of the known metal-plated film 5 1 is not affected by the high-frequency voltage of the mounting table 5, and is assembled between the mounting table 5 and the crystal-plated metal-dissolving film 51. Insulation and grounding shield (grounding base 36). There is a disadvantage that the crystal holder bias power supply 1 1 a is required, but the bias applied to the crystal holder can be controlled completely independently of the high frequency voltage applied to the sample 13. At this time, the crystal metal spray film 51 is not shown, but may be connected to the crystal seat bias power supply 1 1 a or may be assembled inside the crystal seat. Figure 30 is a diagram illustrating the method of optimizing the voltage of the crystal seat bias voltage. As with the F S V described above, the crystal holder bias voltage is also optimal. This voltage affects the frequency of the bias supply, the material or thickness of the crystal holder, the density of the plasma, the composition of the plasma, the overall composition of the vacuum vessel, and the material, processing speed, and processing area of the sample. Therefore, the optimum voltage of the pad bias voltage needs to be changed in each process. Similarly to the case of Fig. 3, it is indicated that the cell bias voltage is limited to a certain 値 (point b in Fig. 30), and once the cell bias voltage is raised, the luminescence of the crystal material becomes strong. Using the crystal holder bias voltage below point b, the deposit is deposited in the crystal holder. With a paddle of -30-(25) (25)1302075 above b point, the deposit will only be sputtered. Will accumulate, the crystal material itself will also be sputtered. The optimum voltage for the sag bias voltage is the voltage at point b, but there is also a point depending on the process. This is by sputtering of the crystal material, and the crystal material is released in the gas phase, assuming that the processing reaction of the sample or the reaction in the gas phase is staggered, which is equivalent to the inability to carry out the desired process and the like. That is, by setting the terminal bias voltage at point a, it is considered that there is a slight accumulation of deposits in the crystal holder. The crystal material is completely free of sputtering. As a result, the process can be prevented from being blocked due to the release of the crystal holder material. Instead, when the deposit is not fully deposited in the crystal holder, the crystal holder needs to be rinsed with a special process for cleaning (where the 'holder voltage is set higher than point b'). On the other hand, if the crystal seat is slightly attached to the deposit, the target process may not be stably performed due to the occurrence of foreign matter or the like. At this time, it is set to point c at the optimum point of the crystal grid bias voltage, and the crystal holder can be slightly reduced. However, it is also possible to set the condition that no deposit is attached at all. At this time, there is a disadvantage that the crystal seat consumption becomes large, but the advantage of the reduction of the crystal seat rinsing also occurs. Also, when it is desired to reduce the deposit of the crystal holder, the crystal holder bias voltage is set at point b. At this time, it is important to frequently perform the reproducibility of the set voltage of the crystal holder bias voltage. This is because it is necessary to suppress the change in elapsed time when the same process is performed by different devices, or when the same process is continuously performed by the same device. Therefore, the feedback control of the crystal seat bias voltage becomes important. The third and third figures are the base bias bias external circuits corresponding to the feedback control circuits of Figs. 26 and 28, respectively. Together with the two circuits, the -31 - (26) (26) 1302075 voltage of the crystal metal spray film is detected by the damper and the filter 52, and converted into a DC voltage. Thereby, the DC voltage signal becomes a signal with a ratio of the gate bias voltage. By comparing this signal with the preset 値 or setting 设定 set by the method of the main body device control unit 57, etc., the third one is 1. The case of the figure is a motor that controls the rotation of the variable capacitor V C that determines the gate bias voltage. The case of Fig. 3 is to control the output of the crystal seat bias power supply 〖2 & By using this method, the crystal seat bias voltage can be controlled to be controlled in a case where the same process is continuously processed by different devices or the same device set by the main device. The embarrassment, suppresses the gap between devices or changes in time. The above is the area where the control is not carried out or adhered to the deposits, i.e., the vacuum bell 12, the gas discharge port 23, and the crystal holder 34, and the method and structure thereof will be described. The reactive organisms released from the sample 13 or the substances synthesized in the gas phase are limited to volatile components having a high vapor pressure, and these substances are exhausted from the discharge portion or the periphery of the workpiece by the exhaust device, although It is slightly deposited on the lower part of the electrode, the exhaust duct, etc., but it is often exhausted. Moreover, the stacking property is high, that is, the vapor pressure is low, and the adhesion coefficient to the solid is very close to 1 (almost caught when the solid is contacted). The substance becomes a reaction product of the sample, or is synthesized in the gas phase, and the substances are accumulated in the gas. The vacuum vessel wall including the vacuum bell, the crystal holder or the gas discharge port around the sample is hardly exhausted. In such a situation, the substances which are highly deposited will be lost in any place where the deposit is not adhered to the part in the vacuum container. Therefore, the density of the highly accumulating substance in the gas phase becomes high -32-(27) (27)1302075, which becomes the motive force for increasing the accumulation, and as a result, it is forcibly deposited on the vacuum bell or the crystal holder. That is, a vacuum bell jar or a crystal seat is controlled without depositing a deposit, and a place where a large amount of deposits can be accumulated there is prepared, whereby the effect is obtained. Then, the amount of deposits that can be accumulated is increased, or it is quickly accumulated by the gas phase, thereby increasing the stacking amount control ability of the deposit in the vacuum bell or the crystal holder. In other words, it is necessary to provide a region (a deposit trap region) in which a deposit is rapidly and largely accumulated in the gas phase around the object to be treated in which a highly reactive reaction product is generated or in the vicinity of the plasma region. The above-mentioned anti-slip plate functions as a cover for suppressing the deposition of deposits to the gas discharge port, but this is a premise that the deposit itself is accumulated, so this is also a type of trap. Fig. 3 is a view showing an area including a deposit trap in the inside of the vacuum container. First, the vacuum bell area and the wafer (sample)/crystal holder area are areas that are controlled without adhering deposits. The other areas in contact with the plasma are all the deposit trap area, and the accumulation trap area 1 is an area including the area of the anti-plate and the lower part of the gas ring, and can be directly observed by the wafer (visible). The vacuum bell area, the wafer/seat area, and the deposit trap area 1 are all areas that can be directly observed (visible) by the wafer, and are the areas where the electric wave is generated, and are the easiest to be wafers. Or a region of a highly depositing substance formed in the plasma gas phase. When the deposits are accumulated in an uncontrolled state in these areas, the foreign matter piled up in the crystals may be caused, or the elapsed time of the plasma may change. Therefore, in areas where the wafers can be directly observed, it is necessary to adhere to the deposit as much as possible, and -33- (28) (28) 1302075 must be completely controlled. In the present invention, when the structure shown in Figs. 2 and 13 is used for the anti-sliding plate, 1% of the area which can be observed by the wafers is in a state of controlling the deposit. It is also necessary to use the structure of Fig. 6, Fig. 9, and Fig. 1 to control the deposition of 90% or more of the surface area of the region which can be observed by the wafers. .  As mentioned above, the deposit trap area has sufficient function because it can improve the deposit suppressing function in the vacuum bell area or the wafer/seat area, so the surface area of the vacuum bell area or the crystal seat area is minimized. It is desirable to maximize the surface area of the deposit trap area 1. When a highly reactive reactive organism is produced from a wafer, the surface area of the wafer is SW and the surface area S1 of the trap region 1 is S1C0. 5SW, and the reduction of the deposit suppression function in the vacuum bell area or the wafer/crystal holder area is known from experiments by the inventors. Therefore, the rapid accumulation of reactive organisms into the accumulation trap requires s 1 > =0. 5 S 1 relationship, I hope s I > two S 1 is better. The deposit trap area 2 is called a ring cover and is located in the lower part of the deposit trap area ® ♦ 1. This area cannot be seen directly from the wafer, but a large amount of deposits are attached to the upper part of the material due to diffusion. Stack — The trap area 3 is a cover on the side of the electrode. Here, it cannot be seen directly from the crystal. However, similarly to the deposit trap area 2, a large amount of deposit is attached to the upper portion. The deposit trap regions 23 are regions that cannot be directly seen from the wafer, and the deposits attached to the deposits become foreign matter of the wafer, or the possibility of causing the plasma to change over time becomes small, but In addition to the efficient operation of the sweeping operation when the atmosphere is open, it is important that these deposits sink into -34- (29) (29) 1302075. That is, since the reactivity of the reactive organism is strong, 90% or more of the reactive organisms can adhere to the deposit trap region 123 and be recovered. Therefore, the deposit trap regions 123 are exchanged and componentized (recyclable). After the atmosphere is released, the parts are replaced by the cleaned parts, and the inside of the vacuum container can be efficiently scanned. Therefore, the deposit trap requires two conditions that are lightweight and easy to disassemble/install. In order to be lightweight, it is important that the material of the deposit trap is, for example, a lightweight member such as aluminum. % After the atmosphere of the vacuum container is released, the cleaning operation required at the minimum is performed in the order of 2 and 3 from the pile trap 1. Minimum required # The cleaning place to be used is, for example, around the opening for wafer transfer. Thereafter, the exchange kits of the deposited traps after the cleaning are installed in the reverse order, and the vacuum suction can be directly entered. This allows cleaning operations to be carried out in a minimal amount of time. Washing in this order not only shortens the washing time, but also shortens the time required for vacuum suction. The reason is that only the minimum time required for the atmosphere to be opened can be used to minimize the amount of water in the atmosphere that is not vacuumed, and to use the minimum required cleaning solution (pure water or alcohol, etc.). ), the amount of solvent remaining in the vacuum vessel can be minimized. The removed deposit trap 123 is used as an exchange kit for the next atmospheric opening/cleaning operation after washing 6 . The area where the deposit trap can be exchanged for componentization is not necessarily limited to the area shown in Fig. 3 . It will vary depending on the process or material being processed, but it is effective to use all areas where deposits are attached as a deposit trap. For example, in the case where deposits are adhered only to the upper half of the electrode cover, the upper half of the electrode cover is exchanged and matched. Conversely, in the case of straight-35-(30) (30)1302075 to the accumulation of deposits to the exhaust duct, the inner wall of the exhaust duct also acts as a deposit trap area' and becomes very versatile once the components are exchanged. effective. [Effect of the Invention] As described above, by the present invention, since the control is accumulated in a vacuum.  The film is deposited on the inner wall of the container, so that a plasma treatment device and a plasma treatment method with excellent mass production stability can be provided. [Brief Description of Drawings] Fig. 1 is a view showing a plasma processing apparatus according to an embodiment of the present invention. Figure 2 is a diagram showing the Faraday shield. Fig. 3 is a view for explaining a method of optimizing F S V . Fig. 4 is a diagram for explaining the feedback control of the FSV. Fig. 5 is a view showing an example of mounting a Faraday shield for a vacuum bell jar. 〇 Fig. 6 is a view for explaining a mounting structure of the damper plate. Fig. 7 is a view showing an example of heat calculation of the anti-plate. _ Fig. 8 is a view for explaining a support structure of the anti-sliding plate. Fig. 9 is a view for explaining measures against deposits adhering to the inner wall of the vacuum bell jar. Fig. 1 is a view for explaining adhesion of deposits against the near-plate. Fig. 1 is a view showing an example of the structure of the guard plate. -36- (31) (31) 1302075 Fig. 1 2 is a view showing another structural example of the anti-sliding plate. Fig. 13 is a view showing another structural example of the anti-sliding plate. Fig. 14 is a view showing the structure of a sample holding portion including a mounting table. Fig. 15 is a view showing a substrate biasing circuit including a surface of a crystal holder. Figure I6 is a graph illustrating the relationship between the thickness of the crystal holder and the bias voltage occurring on the surface of the crystal holder. Fig. 17 is a view for explaining the state of deposits deposited on a thin-walled crystal seat. Figure 18 is a diagram illustrating the condition of deposits deposited on a thin-walled crystal seat. Fig. 19 is a view showing an example of spraying a metal film under the crystal holder. Fig. 20 is a view showing an example of spraying a metal film under the crystal holder. Fig. 21 is a view showing an example of embedding a metal film in a crystal holder. Fig. 2 is a view showing an example of embedding a metal film in a crystal seat. Fig. 23 is a view showing an example of a crystal holder having a metal film applied to a ceramic dielectric substrate. Fig. 24 is a view showing an example of a crystal holder having a metal film applied to a ceramic dielectric substrate. Figure. Fig. 25 is a view showing a connection structure of an externally applied electrode. Fig. 26 is a view for explaining means for adjusting the high-frequency bias voltage applied to the surface of the crystal seat. Fig. 2 is a view for explaining a structural example of means for adjusting the high-frequency bias voltage applied to the surface of the crystal seat. Fig. 28 is a view for explaining an example of supplying a high frequency bias to the crystal holder using another power source. -37- (32) 1302075 Fig. 29 is a view showing an example of the structure of an electrode when a high frequency bias is applied to the crystal holder using another power source. Fig. 30 is a view for explaining a method of optimizing the crystal pad bias voltage. Fig. 3 is a view for explaining a crystal pad bias external circuit with a feedback circuit. Fig. 3 is a view for explaining a crystal pad bias external circuit with a feedback circuit. Fig. 3 is a view for explaining each region inside the vacuum processing chamber. [Description of the figure] la upper antenna lb lower antenna 2 vacuum processing chamber 3, 32, 32a matching box (integrator) 4 gas ring

4a 氣體供給管 5 載置台 6 電漿 7 排氣裝置 8 法拉第屏蔽 9 試料保持部 10 高頻電源(第一高頻電源) 11 基板偏壓電源(第二高頻電源) 1 1 a 晶座偏壓電源 -38 - (33)1302075 12 真空鐘罩 12a 彈性導電體 13 試料 14 縫隙 15 濾波器 16 檢波器 17 放大器 % 傷 18 比較器 19 馬達控制器 2 0 本體裝置控制部 2 1 真空鐘罩抑制部 22 防著板 23 氣體噴出口 2 4 凸緣 3 1 靜電吸附用電源 3 3 電容器 34 晶座 3 5 絕緣基層 36 接地基層 37 絕緣蓋 3 8 溶射膜 39 金屬溶射膜 4 0 靜電吸附、局頻偏壓外施用電極 41、42、43 鍔部導電用圖案 -39- (34)1302075 5 0 陶 瓷 被 覆 5 1 晶 座 金 屬 溶 射 膜 52 減 衰 器 及 濾 波 5 3 検 波 器 54 放 大 器 5 5 比 較 器 5 7 本 體 裝 置 控 制 部 VC1、VC2、VC3 可變電容器 -40-4a Gas supply pipe 5 Mounting table 6 Plasma 7 Exhaust device 8 Faraday shield 9 Sample holding unit 10 High-frequency power supply (first high-frequency power supply) 11 Substrate bias power supply (second high-frequency power supply) 1 1 a Crystal holder Pressure source -38 - (33)1302075 12 Vacuum bell 12a Elastomeric conductor 13 Sample 14 Slit 15 Filter 16 Detector 17 Amplifier % Injury 18 Comparator 19 Motor controller 2 0 Body unit control 2 1 Vacuum bell suppression Part 22 Anti-plate 23 Gas outlet 2 4 Flange 3 1 Electrostatic adsorption power supply 3 3 Capacitor 34 Crystal holder 3 5 Insulation base layer 36 Grounding base layer 37 Insulation cover 3 8 Spray film 39 Metal spray film 4 0 Electrostatic adsorption, local frequency Bias external application electrode 41, 42, 43 锷 partial conductive pattern -39- (34)1302075 5 0 ceramic coating 5 1 crystal seat metal spray film 52 damper and filter 5 3 chopper 54 amplifier 5 5 comparator 5 7 Main unit control unit VC1, VC2, VC3 variable capacitor-40-

Claims (1)

13020^5^^„ 沒年X月,义修⑵正替換頁 ____ 拾、申請ϊ利ϋ— 一 第92 1 03 792號專利申請案 中文申請專利範圍修正本 民國97年5月23日修正 1、 一種電漿處理裝置,其特徵爲由: 構成一部分真空處理室的同時還具備有處理氣體噴出 口的氣環、 和被覆前述氣環的上部而形成真空處理室的真空鐘罩 、 和配置在前述真空鐘罩上部,且對前述真空處理室內 供給高頻電場而生成電漿的天線、 和在前述真空處理室內載置試料的載置台、 和配置在前述天線與真空鐘罩間的同時賦予高頻偏壓 電壓的法拉第屏蔽、 和除了前述處理氣體的噴出口外,裝脫自如地安裝在 前述氣環內面的防著板所構成; 將包括可從前述試料面看得見防著板的氣環內面的面 積,設定爲前述試料面積的約1 / 2以上。 2、 如申請專利範圍第1項所記載的電漿處理裝置, 前述防著板乃具備有用來流通自前述處理氣體的噴出 口所導入的處理氣體的開口部;該開口部是以約3 0度視 角開設在前述處理氣體的噴出口。 3、 如申請專利範圍第2項所記載的電漿處理裝置, 1302075-—-———, 辦,切攻修_正替換闻 -— I丨,丨—|__丨__義· i.…—— | 即述處理氣體的噴出口的中心軸,是除了前述視角外 ’包括前述試料地設定在前述試料上方的電漿生成空間方 向。 4、 如申請專利範圍第!項所記載的電漿處理裝置, 則述防者板是配置在略對應於前述真空鐘罩外表面的 法拉第屛蔽非配置面的真空鐘罩內面。 5、 如申請專利範圍第丨項所記載的電漿處理裝置, 則述防者板乃爲絕緣物製品,且配置在略對應於前述 真空鐘罩外表面的法拉第屏蔽非配置面的真空鐘罩內面。 6、 如申請專利範圍第1項所記載的電漿處理裝置, 前述防著板是介著空隙裝脫自如地安裝在真空鐘罩的 表面。 7、 一種電漿處理裝置,其特徵爲由: 構成一部分真空處理室的同時還具備有處理氣體的噴 出口的氣環、 和被覆具備有大致連接在前述氣環內面之內面的前述 氣環的上部而形成真空處理室的真空鐘罩、 和配置在則述真空鐘罩上部,且對前述真空處理室內 供給高頻電場而生成電漿的天線、 和在則述真空處理室內載置試料的載置台、 和配置在前述天線與真空鐘罩間的同時還賦予高頻偏 壓電壓的法拉第屏蔽、 和至少除了前述處理氣體的噴出口外,裝脫自如地安 裝在前述氣環內面的防著板所構成; -2 - I3〇2p§— -ή ^年r月彡即_)正替换頁 I ....... 丨-㈣丨_⑽丨.一"--丨.丨丨丨丨 4 U|JM1|________ 丨 ,11— 1 將包括從前述試料面可看見防著板的氣環內面的面積 ’設定爲前述試料的面積的約1 /2以上。 8、 如申請專利範圍第7項所記載的電漿處理裝置, 則述防著板是配置在略對應於前述真空鐘罩外表面的 法拉第屏蔽非配置面的真空鐘罩內面。 9、 如申請專利範圍第丨項或第7項的任一項所記載 的電漿處理裝置,其中,前述法拉第屏蔽是介著導電性的 彈性體而接觸到真空鐘罩外表面。 1 0、如申請專利範圍第9項所記載的電漿處理裝置, 對前述法拉第屏蔽供給高頻電壓的高頻電源乃具備有 將則述局頻電壓控制在所定値的回饋控制電路。 11、一種電漿處理裝置,乃屬於具備有: 構成一部分真空處理室的同時還具備有處理氣體的噴 出口的氣環、 和被覆前述氣環的上部而形成真空處理室的真空鐘罩 和配置在前述真空鐘罩上部,且對前述真空處理室內 供給高頻電場而生成電漿的天線、 和在前述真空處理室內載置試料的載置台、 和配置在前述天線與真空鐘罩間的同時還賦予高頻偏 壓電壓的法拉第屏蔽、 和至少除了則述處理氣體的噴出口,裝脫自如地安裝 在前述氣環內面的防著板; 將包括從則述s式料面可看得見防著板的氣環內面的面 -3 - 月彡日修(t)正替換I 積,設定爲前述試料的面積的約1 /2以上的電漿處理裝置 中,其特徵爲: 具備有··被覆前述載置台的外表面以及外側面的介電 質製的晶座和配置在該晶座的表面側的金屬膜,對該金屬 膜施加高頻電壓,而使前述晶座表面獲得偏壓電壓。 12、一種電漿處理裝置,乃屬於具備有: 構成一部分真空處理室的同時還具備有處理氣體的噴 出口的氣環、13020^5^^„ In the year of X, the repair (2) is replacing the page ____ picking up, applying for the profit - a patent application for the patent application of 92 1 03 792, the amendment of the scope of patent application in the Republic of China, May 23, 1997 What is claimed is: 1. A plasma processing apparatus comprising: a gas ring having a processing gas discharge port and a vacuum bell cover for forming a vacuum processing chamber, and a vacuum bell, and a vacuum chamber; An antenna for supplying a high-frequency electric field to the upper portion of the vacuum bell chamber to generate plasma, a mounting table on which the sample is placed in the vacuum processing chamber, and a space between the antenna and the vacuum bell. a Faraday shield of a high-frequency bias voltage, and an anti-sliding plate that is detachably attached to the inner surface of the gas ring except for the discharge port of the processing gas; and includes a protective plate that can be seen from the sample surface. The area of the inner surface of the gas ring is set to be about 1/2 or more of the sample area. 2. The plasma processing apparatus according to the first aspect of the invention, wherein the anti-slip sheet is provided An opening for flowing the processing gas introduced from the discharge port of the processing gas; the opening is opened at a discharge port of the processing gas at a viewing angle of about 30 degrees. 3. As described in the second item of the patent application. Plasma processing device, 1302075-----, do, cut and repair _ positive replacement -- I丨, 丨-|__丨__义·i....—— | In addition to the above-described viewing angle, the plasma generating space direction is set above the sample except for the above-mentioned sample. 4. The plasma processing apparatus described in the item [Scope] of the patent application, the preventer board is configured. The inner surface of the vacuum bell that corresponds to the Faraday shield non-arrangement surface of the outer surface of the vacuum bell jar. 5. The plasma processing apparatus according to the scope of the patent application, wherein the preventer panel is an insulator The product is disposed on the inner surface of the vacuum bellows of the Faraday shield non-arrangement surface corresponding to the outer surface of the vacuum bell jar. 6. The plasma processing apparatus according to claim 1, wherein the anti-slip plate is Void The utility model is characterized in that it is detachably mounted on the surface of the vacuum bell cover. 7. A plasma processing apparatus, characterized in that: a gas ring which is provided with a discharge port of a processing gas and a cover which is provided with a part of the vacuum processing chamber, and the covering are substantially connected a vacuum bell that forms a vacuum processing chamber on an upper portion of the inner surface of the inner surface of the gas ring, and an antenna that is disposed on an upper portion of the vacuum bell and that supplies a high-frequency electric field to the vacuum processing chamber to generate plasma And a mounting table on which the sample is placed in the vacuum processing chamber, a Faraday shield that is disposed between the antenna and the vacuum bell while providing a high-frequency bias voltage, and at least a discharge port of the processing gas. Freely installed on the inner surface of the gas ring; -2 - I3〇2p§ - -ή ^年月月彡 ie _) is replacing page I....... 丨-(4)丨_ (10)丨.一"--丨.丨丨丨丨4 U|JM1|________ 丨, 11-1 will include the area of the inner surface of the gas ring that can be seen from the surface of the sample surface as the sample area About 1 /2 or more. 8. The plasma processing apparatus according to claim 7, wherein the prevention plate is an inner surface of the vacuum bell that is disposed on the Faraday shield non-arrangement surface slightly corresponding to the outer surface of the vacuum bell. The plasma processing apparatus according to any one of the preceding claims, wherein the Faraday shield is in contact with an outer surface of the vacuum bell jar via a conductive elastomer. The plasma processing apparatus according to claim 9, wherein the high frequency power supply for supplying the high frequency voltage to the Faraday shield is provided with a feedback control circuit for controlling the local frequency voltage to a predetermined frequency. 11. A plasma processing apparatus comprising: a gas ring including a discharge port for processing a gas while forming a part of a vacuum processing chamber; and a vacuum bell cover and a configuration for forming a vacuum processing chamber by covering an upper portion of the gas ring An antenna for supplying a high-frequency electric field to the upper portion of the vacuum bell chamber to generate plasma, a mounting table on which the sample is placed in the vacuum processing chamber, and a space between the antenna and the vacuum bell jar a Faraday shield that imparts a high-frequency bias voltage, and a discharge plate that is detachably attached to the inner surface of the gas ring, at least except for a discharge port of the processing gas, which is visible from the s-type material surface The surface of the inner surface of the air ring of the anti-plate is -3 - the day of the repair (t) is replacing the I product, and the plasma processing apparatus is set to be about 1 / 2 or more of the area of the sample, and is characterized by a dielectric wafer in which the outer surface and the outer surface of the mounting table are covered, and a metal film disposed on the surface side of the wafer, and a high-frequency voltage is applied to the metal film to form the surface of the crystal seat Have a bias voltage. 12. A plasma processing apparatus comprising: a gas ring comprising a vacuum processing chamber and a discharge port having a processing gas; 和被覆前述氣環的上部而形成真空處理室的真空鐘罩 和配置在前述真空鐘罩上部,且對前述真空處理室內 供給高頻電場而生成電漿的天線、 和在前述真空處理室內載置試料的載置台、 和配置在前述天線與真空鐘罩間的同時還賦予高頻偏 壓電壓的法拉第屏蔽、 和至少除了前述處理氣體的噴出口,裝脫自如地安裝 在前述氣環內面的防著板; 將包括從前述試料面可看得見防著板的氣環內面的面 積,設定爲前述試料的面積的約1 /2以上的電漿處理裝置 中,其特徵爲: 具備有:被覆前述載置台的外表面以及外側面的介電 質製的晶座和配置在該晶座內部的金屬膜,對該金屬膜施 加高頻電壓,而使前述晶座表面獲得偏壓電壓。 1 3、如申請專利範圍第1 1項至第1 2項的任一項所記 -4- J ^ ^ ____一 \f]^^ )3>日修(戈)正替換頁 載的電黎處理裝置,其中,前述金屬膜是與載置台的導電 部分連接在一起。 1 4、如申請專利範圍第1 1項至第1 2項的任一項所記 載的電漿處理裝置’其中,具備有對前述晶座供給晶座偏 壓電壓的晶座偏壓外施電路。 1 5、如申請專利範圍第1 1項至第1 2項的任一項所記 載的電漿處理裝置,其中,具備有對前述晶座供給晶座偏 壓電壓的晶座偏壓外施電路,該外施電路乃具備有與對載 置台供給基板偏壓電壓的基板偏壓電源獨立的晶座偏壓電 源。 1 6、如申請專利範圍第1 1項至第i 2項的任一項所記 載的電漿處理裝置’其中,在前述晶座具備有供給晶座偏 壓電壓的晶座偏壓外施電路,該外施電路是將具備有前述 晶座的金屬膜與晶座偏壓外施電路間,介著可變容量電容 器而連接的。 17、 如申請專利範圍第1 1項至第1 2項的任一項所記 載的電漿處理裝置,其中,前述裁置台乃爲絕緣物製品, 在內部具備有連接於形成在前述晶座的金屬膜的晶座偏壓 外施用的電極。 18、 一種電漿處理方法, 使用具備有: 構成一部分真空處理室的同時還具備有處理氣體的噴 出口的氣環、 和被覆前述氣環的上部而形成真空處理室的真空鐘罩 -5- 1302075 __ 广月6曰修(¾正替換頁; 和配置在前述真空鐘罩上部,且對前述真辛 一 、义處埋窆內 供給局頻電場而生成電漿的天線、 和在前述真空處理室內載置試料的載置台、 和配置在前述天線與真空鐘罩間的同時還賦 下间頰偏 壓電壓的法拉第屏蔽、 和對前述天線及法拉第屏蔽供給高頻電壓的高,頻電源 電路的電漿處理裝置的電漿處理方法,其特徵爲: 前述咼頻電源電路乃具備有:高頻電源、連接在該電 源的天線、串接在該天線的同時以該共振電壓作爲高頻偏 壓電壓而供給至前述法拉第屏蔽的共振電路、檢測該共振 電路的共振電壓的檢測電路、與事先設定經由該檢測電路 所檢測的共振電壓的設定値做比較的比較電路,以該比較 電路的比較結果來變更前述共振電路的常數。 1 9、如申請專利範圍第1 8項所記載的電槳處理方法 ,其中,前述設定値是以相對於供給至法拉第屏蔽的電壓 變化,構成電漿發光光譜中的前述真空鐘罩的物質的發光 光譜量的急增點來設定。 20、一種電漿處理方法, 使用具備有: 構成一部分真空處理室的同時還具備有處理热體的噴 出口的氣環、 和被覆前述氣環的上部而成形成真空處理室的真空鐘And a vacuum bell that covers the upper portion of the gas ring to form a vacuum processing chamber, and an antenna that is disposed on the upper portion of the vacuum bell and that supplies a high-frequency electric field to the vacuum processing chamber to generate plasma, and is placed in the vacuum processing chamber. a mounting table for the sample, a Faraday shield that is disposed between the antenna and the vacuum bell, and a high-frequency bias voltage, and at least a discharge port of the processing gas, and is detachably attached to the inner surface of the gas ring A plasma processing apparatus that includes an area of the inner surface of the gas ring from which the anti-sliding plate can be seen from the sample surface, and is set to be about 1 / 2 or more of the area of the sample, and is characterized in that A dielectric crystal holder covering the outer surface and the outer surface of the mounting table and a metal film disposed inside the crystal holder, a high-frequency voltage is applied to the metal film, and a bias voltage is obtained on the surface of the crystal holder. 1 3. If you apply for any of the items in the range of items 1 to 1 of the patent scope, -4-J ^ ^ ____ a \f]^^ ) 3 > 修修(戈) is replacing the electricity on the page A processing apparatus in which the foregoing metal film is connected to a conductive portion of a mounting table. A plasma processing apparatus according to any one of the above-mentioned items of the present invention, wherein a crystal holder bias circuit for supplying a crystal holder bias voltage to the crystal holder is provided. . The plasma processing apparatus according to any one of claims 1 to 2, wherein the plasma processing apparatus is provided with a crystal seat bias external circuit for supplying a crystal holder bias voltage to the crystal holder. The external circuit is provided with a pad bias power supply that is independent of a substrate bias power supply that supplies a substrate bias voltage to the mounting table. The plasma processing apparatus according to any one of the items 1 to 2, wherein the crystal holder is provided with a crystal seat bias external circuit for supplying a crystal holder bias voltage. The external circuit is connected between the metal film including the crystal holder and the crystal substrate biasing external circuit via a variable capacitance capacitor. The plasma processing apparatus according to any one of the preceding claims, wherein the cutting table is an insulator product and is internally connected to the crystal holder. The crystal holder of the metal film is biased to the externally applied electrode. 18. A plasma processing method comprising: a gas ring constituting a part of a vacuum processing chamber and further having a discharge port for processing a gas; and a vacuum bell cover forming a vacuum processing chamber on an upper portion of the gas ring. 1302075 __ Guangyue 6曰 repair (3⁄4 positive replacement page; and an antenna disposed on the upper part of the vacuum bell jar and generating a plasma by supplying a local frequency electric field to the above-mentioned true Xinyiyi, and the vacuum processing described above a mounting table for placing a sample in the room, and a Faraday shield for placing a buccal bias voltage between the antenna and the vacuum bell, and a high-frequency power supply circuit for supplying a high-frequency voltage to the antenna and the Faraday shield A plasma processing method for a plasma processing apparatus, characterized in that: the frequency-frequency power supply circuit includes: a high-frequency power source, an antenna connected to the power source, and a series connection to the antenna, and the resonant voltage is used as a high-frequency bias a resonance circuit that supplies a voltage to the Faraday shield, a detection circuit that detects a resonance voltage of the resonance circuit, and a predetermined detection via the detection circuit The comparison of the measured resonance voltage and the comparison of the comparison circuit, the constant of the resonance circuit is changed by the comparison result of the comparison circuit. The setting 値 is set by a sudden increase point of the luminescence spectrum amount of the substance constituting the vacuum bell in the plasma luminescence spectrum with respect to the voltage change supplied to the Faraday shield. 20. A plasma processing method, the use of: A part of the vacuum processing chamber is further provided with a gas ring for processing the discharge port of the hot body, and a vacuum ring for forming a vacuum processing chamber by covering the upper portion of the gas ring. -6- 1302 m 月b日修ct)正替換頁 和配置在前述真空鐘罩上部,且對 供給高頻電場而生成電漿的天線、 和在前述真空處理室內載置試料的 和配置在前述天線與真空鐘罩間的 壓電壓的法拉第屏蔽、 和至少除了前述處理氣體的噴出口 如地安裝在前述氣環內面的至少前述試 積的防著板、 和被覆前述載置台的外表面及外側 座和配置在該晶座內面或內表面側的電 加高頻電壓而使前述晶座表面獲得偏壓 源電路的電漿處理裝置的電漿處理方法 該局頻偏壓電源電路乃具備有:將 過可變電容器供給至前述電極的電路、 的檢測電路、與事先設定經由該檢測電 設定値做比較的比較電路,以該比較電 更前述可變電容器的常數。 2 1、如申請專利範圍第20項所記 ,其中,前述設定値是在相對於供給至 電漿發光光譜中,以構成前述晶座的物 急增點來設定。 前述真空處理室內 載置台、 同時還賦予高頻偏 外,具備有裝脫自 料面積1/2以上面 面的介電質製的晶 極以及對該電極施 電壓的高頻偏壓電 ,其特徵爲: 旨亥筒頻偏壓電源透 檢測前述電極電壓 路所檢測的電壓的 路的比較結果來變 載的電漿處理方法 電極的電壓變化的 質的發光光譜量的-6-1302 m month b repair ct) positive replacement page and an antenna disposed on the upper portion of the vacuum bell jar and generating plasma for supplying a high-frequency electric field, and a sample placed in the vacuum processing chamber and disposed in the foregoing a Faraday shield for a voltage between the antenna and the vacuum bell, and at least the pre-tested anti-sliding plate mounted on the inner surface of the gas ring, at least in addition to the discharge port of the processing gas, and an outer surface covering the mounting table and a plasma processing method of a plasma processing apparatus for a plasma processing apparatus that obtains a bias voltage source circuit by electrically applying a high-frequency voltage to an inner surface or an inner surface side of the crystal holder, and the local frequency bias power supply circuit is provided There is a detection circuit that supplies an over-variable capacitor to the circuit of the electrode, and a comparison circuit that is previously set to be compared with the detection power setting ,, and the constant of the variable capacitor is further increased by the comparison. 2 1. As described in claim 20, wherein the setting 値 is set in accordance with the sharp increase point of the crystal constituting the crystal seat with respect to the plasma luminescence spectrum. The vacuum processing chamber mounting table is also provided with a high frequency bias, and includes a dielectric electrode having a dielectric material having a top surface area of 1/2 and a high frequency bias voltage for applying a voltage to the electrode. The characteristic is: a comparison result of the way of detecting the voltage detected by the electrode voltage path by the power supply of the U-tube, and the quality of the luminescence spectrum of the voltage change of the electrode of the plasma processing method
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