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TWI265589B - Method to form a shallow trench insulation - Google Patents

Method to form a shallow trench insulation Download PDF

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Publication number
TWI265589B
TWI265589B TW90102560A TW90102560A TWI265589B TW I265589 B TWI265589 B TW I265589B TW 90102560 A TW90102560 A TW 90102560A TW 90102560 A TW90102560 A TW 90102560A TW I265589 B TWI265589 B TW I265589B
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Taiwan
Prior art keywords
oxide layer
trench
layer
nitrogen
oxide
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TW90102560A
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Chinese (zh)
Inventor
Pei-Ren Jeng
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Macronix Int Co Ltd
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Abstract

This invention discloses a method to form the insulation of a shallow trench. After the etching process of a shallow trench is carried out, one nitrogenous oxide layer process is additionally introduced in order to nitrogenize a lining oxide layer and the cushion oxide layer exposed on the lateral wall of the shallow trench, so a nitrogenized oxide silicon layer can be formed, so the growth ability of the oxide layer can be inhibited, so the beak at the upper edge on the shallow trench can be restricted in order to meet the need when the dimension of the following fabricated device is required to be miniaturized.

Description

1265589 A7 B7 五、發明説明() 發明領域: (請先閲讀背面之注意事項再填寫本頁) 本發明是有關於一種半導體製程的贺 J表以方法,且特別是 有關於一種在作完淺溝渠蝕刻後,加 F j ^化層氮化步 驟,以形成淺溝渠隔離的製造方法。 一―一^_ 發明背景: 在積體電路技術中’金氧半導體(Μ^1 〇_ Semiconductor ; M0S)電晶體是最重要的一種基本的電子与 體。通常,一個完整的積體電路是由成千上萬個金氧半導患 電晶體所組成。因此必須在相鄰的電晶體間加入用以電性腺 離的隔離結構,以防止這些相鄰的電晶體發生短路的現 菖元件尺寸縮小時,元件間的隔離結構也必須縮小。元 件隔離技術也會因為元件間的隔離結構縮小而增加困難 度。各種元件隔離的方法陸續地被發展出來,尤其在次半微 米(Sub-half Micron)的積體電路製程的應用,以淺溝渠隔離 (Shallow Trench Isolation; STI)的方法最被廣泛的應用。 經濟部智慧財產局員工消費合作社印製 請參照第1圖至第5圖,其所繪示為習知淺溝渠隔離的 製造過程。請參照第1圖所繪示。提供一半導體基材1 〇, 一般為矽基底。在含氧的環境中,以加熱的方式,在基材10 2 本紙張尺度適用中國國家標準(CNS)A4規格(210X297公釐) 1265589 A7 B7 五、發明説明() 上形成一層墊氧化層12 (pad oxide)。墊氧化層1 2較佳是以 二氧化矽形成。之後,使用低壓化學氣相沈積(LPCVD)或其 它沈積方法,在墊氧化層12上沈積一層氮化矽(Si3N4)層 1 4。然後整個晶片將進行微影的製程。 請參照第2圖所繪示,氮化矽層1 4形成後,定義光阻, 以暴露氮化石夕層1 4。在晶片上,利用傳統的微影製程,將 所需的溝渠20的光罩圖案,轉移到光阻上面,並形成一層 光阻層1 6。之後,整個晶片再進行蝕刻製程。 請參照第3圖所繪示,當光阻層16形成後,便可當作 罩幕(mask)進行餘刻製程。以濕式蝕刻或乾式蝕刻依序蝕刻 底下的氮化石夕層14、墊氧化層12與基材1〇。之後,在基材 10中形成所需的溝渠20。 (請先閲讀背面之注意事項再填寫本頁}1265589 A7 B7 V. INSTRUCTIONS () Field of the Invention: (Please read the note on the back and then fill out this page) The present invention relates to a method of semiconductor manufacturing, and in particular to After the trench is etched, a F j ^ layer nitridation step is added to form a shallow trench isolation manufacturing method. BACKGROUND OF THE INVENTION: In the integrated circuit technology, 'metal oxide semiconductors (Μ^1 〇_ Semiconductors; M0S) transistors are the most important basic electrons and bodies. Typically, a complete integrated circuit consists of thousands of MOS transistors. Therefore, it is necessary to add an isolation structure for electrical gland between adjacent transistors to prevent the size of the adjacent elements of the adjacent transistors from being shortened, and the isolation structure between the elements must also be reduced. Component isolation techniques also add to the difficulty of shrinking the isolation structure between components. Various methods of component isolation have been developed, especially in the sub-half micron integrated circuit process, which is most widely used by Shallow Trench Isolation (STI). Printed by the Intellectual Property Office of the Ministry of Economic Affairs and the Consumer Cooperatives. Please refer to Figures 1 to 5, which are shown as the manufacturing process of the conventional shallow trench isolation. Please refer to Figure 1 for illustration. A semiconductor substrate 1 is provided, typically a germanium substrate. In an oxygen-containing environment, on a substrate of 10 2, the paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) 1265589 A7 B7 5. The invention description () forms a layer of pad oxide layer 12 (pad oxide). The pad oxide layer 12 is preferably formed of cerium oxide. Thereafter, a layer of tantalum nitride (Si3N4) 14 is deposited on the pad oxide layer 12 using low pressure chemical vapor deposition (LPCVD) or other deposition method. The entire wafer will then be subjected to a lithography process. Referring to FIG. 2, after the tantalum nitride layer 14 is formed, a photoresist is defined to expose the nitride layer 14. On the wafer, the mask pattern of the desired trench 20 is transferred to the photoresist using a conventional lithography process to form a photoresist layer 16. Thereafter, the entire wafer is subjected to an etching process. Referring to FIG. 3, when the photoresist layer 16 is formed, it can be used as a mask to carry out a process. The underlying nitride layer 14, the pad oxide layer 12 and the substrate 1 are sequentially etched by wet etching or dry etching. Thereafter, the desired trench 20 is formed in the substrate 10. (Please read the notes on the back and fill out this page again)

訂 經濟部智慧財產局員工消費合作社印製 當蝕刻挖取適當深度及在基材1〇中形成所需的溝渠2〇 之後,墊氧化層12之側壁在後續製程中為裸露。因此,在 進行針對淺溝渠上緣作圓形化的蝕刻製程時,墊氧化層12 裸路的面積更大’而使鳥嘴(bird’s beak)容易形成。接著, 例如以灰化步驟去除光阻層16。請參考第4圖。然後,進 行熱氧化步驟,藉以在溝渠20的表面上形成一層襯氧化層 1 8以修補溝渠20被蝕刻之表層。然後,使用化學氣相沉積 或其它沉積方法,以氧化矽將溝渠2〇填滿,而形成氧化矽 線 ♦ 本紙張尺度適用中國國家標準(CNS)A4規格(210X297公楚) 1265589Ordered by the Intellectual Property Office of the Ministry of Economic Affairs, the Consumer Cooperatives Printed After the etching has been dug up to the proper depth and the required trenches 2 are formed in the substrate, the sidewalls of the pad oxide layer 12 are exposed in subsequent processes. Therefore, when the etching process for rounding the upper edge of the shallow trench is performed, the area of the bare oxide film 12 is larger, and the bird's beak is easily formed. Next, the photoresist layer 16 is removed, for example, by an ashing step. Please refer to Figure 4. Then, a thermal oxidation step is performed to form a liner oxide layer 18 on the surface of the trench 20 to repair the surface layer to which the trench 20 is etched. Then, using chemical vapor deposition or other deposition methods, fill the trench 2〇 with yttrium oxide to form a yttrium oxide line. ♦ This paper scale applies to the Chinese National Standard (CNS) A4 specification (210X297 public Chu) 1265589

五、發明説明() c請先閲讀背面之注意事項再填寫本頁> 層22。接著’利用化學機械研磨(CMp)法或是其它研磨方法 來去除基材1 0上方的氮化矽層1 4、部分之氧化矽層22、塾 氧化層12’而僅留下溝渠2〇中的另一部分之氧化矽層22, 如第5圖中所示。 由上述習知,淺溝渠隔離製程所述中,在淺溝渠上緣的 塾氧化層1 2會因為作圓形化的蝕刻製程,使得裸露的面積 變大’而容易形成鳥嘴現象。此一鳥嘴的大小容易佔據活化 區域而使元件尺寸不易縮小。 此外,雖有一種改良方法利用墊氧化層回蝕之區域,來 抑制鳥嘴的形成。然而,在以矽沈積填充時,會不容易控制, 而留有空洞,使得元件電性受到影響。所以,需要一種有效 的方法來解決此一問題❶ 發明目的及概述: 經濟部智慧財產局員工消費合作社印製 鑒於上述之發明背景中,傳統的淺溝渠隔離製程,使得 塾氧化層裸露的面積變大,而容易形成鳥嘴現象。因此,容 易佔據活化區域使元件尺寸不易縮小。以及,在以碎沈積填 充時,會不容易控制,而留有空洞,使得元件電性受到影響。 緣此,本發明的主要目的為本發明提供一種淺溝渠隔離 4 本紙張尺度適用中國國家標準(CNS)A4規格(210X297公釐) 1265589V. Description of the invention () c Please read the precautions on the back and then fill out this page > Then, using a chemical mechanical polishing (CMp) method or other grinding method to remove the tantalum nitride layer 14 above the substrate 10, a portion of the tantalum oxide layer 22, and the tantalum oxide layer 12' leaving only the trench 2 Another portion of the ruthenium oxide layer 22 is shown in Figure 5. It is known from the above that in the shallow trench isolation process, the tantalum oxide layer 12 at the upper edge of the shallow trench is formed by a circular etching process, so that the exposed area becomes large, and the bird's beak phenomenon is easily formed. The size of this beak easily occupies the active area and the component size is not easily reduced. In addition, there is an improved method for suppressing the formation of bird's beak by utilizing the area where the oxide layer is etched back. However, when filling with ruthenium deposits, it is not easy to control, leaving voids, which affect the electrical properties of the components. Therefore, an effective method is needed to solve this problem. OBJECTS AND OVERVIEW OF THE INVENTION: Ministry of Economic Affairs, Intellectual Property Office, Staff Consumption Cooperative Printing In view of the above-mentioned invention background, the traditional shallow trench isolation process makes the exposed area of the tantalum oxide layer change. Large, and easy to form a bird's beak. Therefore, it is easy to occupy the active area so that the size of the element is not easily reduced. And, when filled with crushed deposits, it is not easy to control, leaving voids to affect the electrical properties of the components. Accordingly, the main object of the present invention is to provide a shallow trench isolation for the present invention. 4 The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) 1265589

的形成方法。首先在一基材形成一 ^ tuL.. _ 氣/冓渠。接著利用爐管氮化 或决速昇溫氮化,進行氧化 及m 丁軋化層氮化步驟,使得襯氧化層以 (請先閱讀背面之注意事項再填寫本頁> 層,m a 乳化層虱化並形成氮氧化矽 續,以作為阻隔層。 7 發明的再一目的為本發明提供一種淺溝渠隔 ^法。本發明係利用爐管氮化或快速昇溫氣化,進行㈣ :”匕步驟:使得概氧化層以及在接近淺溝渠上緣的塾氧… 亂化並形成氮氧化梦層,可阻絕下方 繼續氧化,而能使烏嘴的現象受到限制。首先,在一 f材上依序形成一塾氧化層、一氮化梦層以及一光阻層。箱 者進行-微影與㈣步驟,藉以在半導體基材中形成一淺 渠。然後去除光阻層。之後,利用爐管氮化或快速昇溫氛化, 進行氧化層氮化步驟’使得襯氧化層以及在接近淺溝渠上續 的墊氧化層’氮化並形成氮氧化石夕層。之 上形成-氧切層以填滿溝渠。然後,進行平坦=基: 形成淺溝渠隔離結構。 經濟部智慧財產局員工消費合作社印製 根據以上所述之目的,本發明提供一種淺溝渠隔離的形 成方法。在作完淺溝渠蝕刻後,加作一道氧化層氮化步驟, 使得襯氧化層以及淺溝渠側壁上緣裸露的墊氧化層,氮化並 形成氮氧化矽層。因此,氧化層的再生能力會降低,而使得 淺溝渠上緣的烏嘴受到抑制同時可防止在以發沈積填充 本紙張尺度適用中國國家標準(CNS)A4規格(210x297公楚) 1265589 A7 B7 五、發明説明( 時,元件電性受到影響’以提供未來元件尺寸縮小時的需 求。 囷式簡單說明: 本發明的較佳實施例將於往後之說明文字中輔以下列 圖形做更詳細的闡述,其中·· 第1圖至第5圖係繪示習知淺溝渠隔離的製造流程圖; 以及 第6圖至第11圖係繪示依照本發明一較佳實施例之一 種淺溝渠隔離的製造流程圖。 圖號對照說明: (請先閱讀背面之注意事項再填寫本頁)The method of formation. First, a ^ tuL.. _ gas / channel is formed on a substrate. Then, using furnace tube nitriding or tempering temperature nitriding, the oxidation and m butyl rolling layer nitriding step is performed to make the lining oxide layer (please read the back sheet of the precautions and then fill in the page > layer, ma emulsified layer 虱And forming a nitrogen oxynitride as a barrier layer. 7 A further object of the invention is to provide a shallow trench isolation method. The invention utilizes furnace tube nitriding or rapid temperature gasification to carry out (4): "匕 step : Make the oxide layer and the oxygen in the upper edge of the shallow trench...disintegrate and form the nitrogen oxide dream layer, which can prevent the oxidation from continuing below, and can limit the phenomenon of the black mouth. First, on a f material Forming a tantalum oxide layer, a nitride layer, and a photoresist layer. The box performs a lithography and (four) step to form a shallow trench in the semiconductor substrate. Then the photoresist layer is removed. Thereafter, the furnace tube nitrogen is utilized. Or rapidly warming, performing an oxide layer nitridation step 'so that the liner oxide layer and the pad oxide layer adjacent to the shallow trenches' are nitrided and form a oxynitride layer. An oxygen-cut layer is formed to fill Ditch. Then, proceed to flat = base: Forming a shallow trench isolation structure. Printing by the Intellectual Property Office of the Ministry of Economic Affairs, Employees' Consumption Cooperatives According to the above-mentioned purposes, the present invention provides a method for forming shallow trench isolation. After the shallow trench is etched, an oxidation layer nitridation step is added. The lining oxide layer and the exposed oxide layer on the upper edge of the sidewall of the shallow trench are nitrided to form a yttria layer. Therefore, the regeneration ability of the oxide layer is reduced, and the black mouth of the upper edge of the shallow trench is suppressed while preventing In the case of filling the paper with the deposition, the Chinese National Standard (CNS) A4 specification (210x297 public) 1265589 A7 B7 is applied. 5. When the invention is described (the component is electrically affected) to provide the demand for future component size reduction. Brief Description: The preferred embodiment of the present invention will be explained in more detail in the following description with the following figures, wherein: Figures 1 to 5 show the manufacturing flow chart of the conventional shallow trench isolation. And Figures 6 through 11 illustrate a manufacturing flow chart for shallow trench isolation in accordance with a preferred embodiment of the present invention. Note Complete this page and then read it back)

I -訂· 經濟部智慧財產局員工消費合作社印製 10 基材 12 墊氧化層 14 氮化矽層 16 光阻層 18 襯氧化層 20 溝渠 22 氧化矽層 110 基材 112 墊氧化層 114 氮化矽層 116 光阻層 118 襯氧化層 120 溝渠 122 氧化矽層 6 本紙張尺度適用中國國家標準(CNS)A4規格(210X 297公釐) 1265589I-booking · Ministry of Economic Affairs Intellectual Property Bureau employee consumption cooperative printing 10 substrate 12 pad oxide layer 14 tantalum nitride layer 16 photoresist layer 18 lining oxide layer 20 trench 22 yttrium oxide layer 110 substrate 112 pad oxide layer 114 nitriding矽 layer 116 photoresist layer 118 lining oxide layer 120 trench 122 ruthenium oxide layer 6 This paper scale is applicable to China National Standard (CNS) A4 specification (210X 297 mm) 1265589

五、發明説明( 發明詳細說明: 本發明揭露-種淺溝渠隔離的形成方法。在作完淺溝 渠蝕刻後,加作一道氧化層氮化步驟,使得襯氧化層以及 淺溝渠側壁上緣裸露的塾氧化層,氮化.並形成氮氧化梦層, 藉以淺溝渠上緣的鳥嘴受到抑制。 請參照第6圖至帛11圖,其所綠示為本發明淺溝渠隔 離的製造方法的較佳實施例。請參照第6圖所繪示,提供一 半導體基材110,例如為矽基底。在含氧的環境中,以加熱 的方式,在基材110上形成一層墊氧化層112。墊氧化層112 較佳是以二氧化矽形成。之後,例如使用低壓化學氣相沈積 (LPCVD)或其它沈積方法,在墊氧化層112上沈積一層氮化 矽層1 1 4。然後,整個晶片將進行微影的製程。 請參照第7圖所繪示,氮化矽層114形成後,定義光阻, 以暴露氮化矽層11 4。在晶片上,利用傳統的微影製程,將 所需的溝渠1 2 0的光罩圖案,轉移到光阻上面,以形成一廣 光阻層11 6。之後,整個晶片再進行蝕刻製程。 請參照第8圖所繪示,當光阻層116形成後,便可當作 罩幕進行蝕刻製程,並且依序蝕刻底下的氮化矽層114、塾 本紙張尺度適用中國國家標準(CNS)A4規格(210x297公釐) (請先閲讀背面之注意事項再填寫本頁) -訂· % 經濟部智慧財產局員工消費合作社印製 經濟部智慧財產局員工消費合作社印製 1265589V. Description of the Invention (Detailed Description of the Invention: The present invention discloses a method for forming shallow trench isolation. After the shallow trench is etched, an oxidation layer nitridation step is added to make the lining oxide layer and the upper edge of the shallow trench sidewall exposed. The ruthenium oxide layer is nitrided and forms a nitrogen oxide dream layer, whereby the bird's beak on the upper edge of the shallow trench is suppressed. Please refer to Fig. 6 to Fig. 11 for the green display of the shallow trench isolation method of the present invention. A preferred embodiment is shown in Fig. 6. A semiconductor substrate 110, such as a germanium substrate, is provided. In an oxygen-containing environment, a pad oxide layer 112 is formed on the substrate 110 by heating. The oxide layer 112 is preferably formed of hafnium oxide. Thereafter, a layer of tantalum nitride 1 14 is deposited on the pad oxide layer 112, for example, using low pressure chemical vapor deposition (LPCVD) or other deposition methods. Then, the entire wafer will The lithography process is performed. Referring to FIG. 7, after the tantalum nitride layer 114 is formed, the photoresist is defined to expose the tantalum nitride layer 11. On the wafer, the conventional lithography process is used to Ditch diagram of the trench 1 2 0 And transferred to the photoresist to form a wide photoresist layer 116. After that, the entire wafer is further subjected to an etching process. Referring to FIG. 8, when the photoresist layer 116 is formed, it can be etched as a mask. Process, and sequentially etch the underlying tantalum nitride layer 114, the paper size is applicable to the Chinese National Standard (CNS) A4 specification (210x297 mm) (please read the note on the back and fill out this page) - Booking · % Economy Ministry of Intellectual Property Office Staff Consumer Cooperatives Ministry of Printing and Economy Ministry Intellectual Property Bureau Staff Consumer Cooperatives Printed 1265589

五、發明説明( 氧化層112與基材11G。㈣製程,較佳^以濕式㈣來進 行,然而本發明不_ _ 於此,本發明之蝕刻製程也可以乾式蝕 刻進4丁藉以在基材110中形成所需的溝渠。 請參照第9圖所繪示,當#刻挖取適當深度及在基材 110中形成所需的溝渠120之後,例如以灰化步驟,去除光 阻層m。接著進行熱氧化步驟,在溝渠12〇的表面上形成 「層襯氧化層118用以修補溝渠12〇被蝕刻之表層然後, 進行氮化步驟,使得溝帛12〇侧壁上緣裸露的墊氧化層 112’氮化並形成氮氧切層。氧化層氮化的方法較佳是以 爐管氣化或快速昇溫氮化來進行,其中,爐管氮化或快速昇 溫氮化的氣體較佳是以氣(N2)、氧化氮⑽)、氧化亞氮队〇) 或氨(NH3),然而’本發明不限於此,其它可用於氮化步驟 之氣體,均適用於本發明。此外,在氮化步驟中襯氧化層 118也會被氮化成氮氧化矽層。 請參照帛10 ®所緣示,然後,再使用化學氣相沈積或 其它沈積方法,以氧化矽將㈣120填滿,並形成氧化矽層 122。之後’整個晶片再進行研磨步驟。 請參照第11圖所繪示,利用化學機械研磨(CMp)法並且 或是其它研磨的方法,去除基材110上方的氮化矽層114、 氧化矽層122、墊氧化層112 ,僅留下在溝渠12〇中的氧化 8 (請先閲讀背面之注意事項再填寫本頁)5. Description of the Invention (Oxide layer 112 and substrate 11G. (4) Process, preferably in wet mode (4), however, the present invention is not used herein, the etching process of the present invention can also be dry etched into 4 The desired trench is formed in the material 110. Referring to Figure 9, after the proper depth is dug and the desired trench 120 is formed in the substrate 110, the photoresist layer m is removed, for example, by an ashing step. Then, a thermal oxidation step is performed to form a "layer oxide layer 118 on the surface of the trench 12" for repairing the surface of the trench 12, which is etched, and then performing a nitridation step so that the upper edge of the sidewall of the trench 12 is bare. The oxide layer 112' is nitrided and forms an oxynitride layer. The method of nitriding the oxide layer is preferably performed by gasification of the furnace tube or rapid temperature nitridation, wherein the furnace tube is nitrided or the gas is rapidly heated and nitrided. It is a gas (N2), nitrogen oxide (10), nitrous oxide (NH3) or ammonia (NH3). However, the present invention is not limited thereto, and other gases which can be used in the nitriding step are applicable to the present invention. In the nitriding step, the liner oxide layer 118 is also nitrided into a hafnium oxynitride layer. According to the description of 帛 10 ® , then, using chemical vapor deposition or other deposition methods, (4) 120 is filled with yttrium oxide, and a yttrium oxide layer 122 is formed. Then, the entire wafer is subjected to a polishing step. Please refer to FIG. It is illustrated that the cerium nitride layer 114, the yttrium oxide layer 122, and the pad oxide layer 112 above the substrate 110 are removed by a chemical mechanical polishing (CMp) method or by other methods of grinding, leaving only in the trench 12 Oxidation 8 (please read the notes on the back and fill out this page)

12655891265589

五、發明説明() 矽層122 綜合以上所述,本發明揭露一種 . 幾溝渠隔離的製造方 法。在作完淺溝渠蝕刻後,加作一道 ^ ^ 、氧化層氮化步驟,使 付淺溝渠側壁上緣裸露的墊氧化層與 ,a 增興襯虱化層形成氮氧化 石夕層。因此,使得淺溝渠上緣的鳥嘴受到抑制,同時可防止 元件電性受到影響’以提供未來元件尺寸縮小時的需求。 如熟悉此技術之人員所瞭解的,以上所述僅為本發明之 較佳實施例而已,並非用以限定本發明之申請專利範圍;凡 其它未脫離本發明所揭示之精神下所完成之等效改變或修 飾,均應包含在下述之申請專利範圍内。 (請先閲讀背面之注意事項再填寫本頁} 經濟部智慧財產局員工消費合作社印製 9 本紙張尺度適用中國國家標準(CNS)A4規格(210X297公釐)V. INSTRUCTION DESCRIPTION () 矽 层 122 In summary of the above, the present invention discloses a method of manufacturing several trenches. After the shallow trench is etched, a ^ ^ and oxide layer nitridation step is added to form the exposed oxide layer of the upper edge of the sidewall of the shallow trench and a lining layer to form the oxynitride layer. Therefore, the beak of the upper edge of the shallow trench is suppressed while preventing the electrical properties of the component from being affected to provide a demand for future component size reduction. The above description is only for the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention as defined by the present invention; Modifications or modifications are intended to be included in the scope of the claims below. (Please read the notes on the back and fill out this page.) Printed by the Ministry of Economic Affairs, Intellectual Property Office, Staff and Consumer Cooperatives. 9 This paper size applies to the Chinese National Standard (CNS) A4 specification (210X297 mm).

Claims (1)

1265589 A8 B8 C8 D8 六、申請專利範圍 申請專利範圍: (請先閲讀背面之注意事項再填寫本頁) 1·一種淺溝渠隔離的製造方法,至少包括: 在一基材形成一溝渠,其中該基材上更包括依序堆疊之 一墊氧化層與一氮化矽層; 形成一襯氧化層於該溝渠之一側壁上;以及 進行一熱氮化步驟,使得該襯氧化層以及該溝渠側壁 上裸露的該墊氧化層,氮化並分別形成一氮氧化矽層。 2.如申請專利範圍第1項所述之方法,其中該熱氮化步 驟是利用一爐管氮化步驟。 3 ·如申請專利範圍第2項所述之方法,其中該爐管氮化 步驟所使用之一氣體更包括選自於氮(NO、氧化氮(N〇)、氧 化亞氮(乂0)或氨(NH3)等所組成之一族群。 4·如申請專利範圍第丨項所述之方法,其中該熱氮化步 驟是利用一快速昇溫氮化步驟。 經濟部智慧財產局員工消費合作社印製 5.如申晴專利範圍第4項所述之方法,其中該快速昇溫 氮化步驟所使用之一氣體更包括選自於氮(NO、氧化氮 (NO)、氧化亞氮(沁0)或氨(Nh3)等所組成之一族群。 10 本紙張尺度適用中國國家標準(CNS)A4規格(210X297公釐) 1265589 Α8 Β8 C8 D8 六、申請專利範圍 經濟部智慧財產局員工消費合作社印製 6·—種淺溝渠隔離的製造方法,至少包括: 在一基材形成一溝渠,其中該基材上更包括依序堆疊之 塾氧化層與一氮化石夕層; 形成一概氧化層於該溝渠之一側壁上; 進行一熱氮化步驟,使得該襯氧化層以及該溝渠側壁上 裸露的該墊氧化層,氮化並分別形成一,氮氧化矽層,·以及 形成一氧化矽層,填滿該溝渠。 7·如申請專利範圍第6項所述之方法,其中形成該溝渠 的方法包括: 在該基材上依序形成該墊氧化層、該氮化石夕層以及一光 阻層; 進行一微影與姓刻步驟,藉以在該基材中形成該溝渠;以及 去除該光阻層。 8·如申請專利範圍第6項所述之方法,其中該熱氮化步 驟是利用一爐管氮化步驟。 9.如申請專利範圍第8項所述之方法,其中該爐管氮化 步驟所使用之一氣體更包括選自於氮(NO、氧化氮(ν〇)、氧 化亞氮(Ν2〇)或氨(ΝΗ3)等所組成之一族群。 (請先閲讀背面之注意事項再填寫本頁) -訂· 11 本紙張尺度適用中國國家標準(CNS)A4規格(210Χ 297公釐) 1265589 A8 B8 C8 D8 六、申請專利範圍 10.如申請專利範圍第6項所述之方法,其中該熱氮化 步驟是利用一快速昇溫氮化步驟。 1 1 ·如申請專利範圍第I 〇項所述之方法,其中該快速昇 溫氮化步驟所使用之一氣體更包括選自於氮(NO、氧化氮 (NO)、氧化亞氮(N2〇)或氨等所組成之一族群。 1 2. —種淺溝渠隔離的製造方法,至少包括: 在一半導體基材上依序形成一墊氧化層與一氮化矽層; 進行一微影步驟,藉以在該半導體基材中形成一溝渠; 形成一襯氧化層於該溝渠之一側壁上。 進行一熱氮化步驟,使得該襯氧化層以及該溝渠側壁 上裸路的該墊氧化層,氮化並分別形成一氮氧化矽層; 形成一氧化矽層,填滿該溝渠;以及 進行一平坦化步驟。 13·如申請專利範圍第12項所述之方法,其中該熱氮化 步驟是利用一爐管氮化步驟。 經濟部智慧財產局員工消費合作社印製 14·如申5月專利範圍帛13 $所述之方法,其中該爐管氮 产步驟所使用之—氣體更包括選自於氮⑻)、氧化氮(n〇)、 乳化亞氮(Να)或氨(NH3)等所組成之—族群。 12 1265589 A8 B8 C8 D8 、申請專利範圍 1 5 ·如申請專利範圍第12頊所述之方法,其中該熱氮化 步驟是利用一快速昇溫氮化步驊。 1 6 ·如申請專利範圍第1 $頊所述之方法’其中該快速昇 溫氮化步驟所使用之一氣體更包栝選自於氮(N2)、氧化氮 (NO)、氧化亞氮(N2〇)或氨(NH3)等所組成之一族群。 (請先閲讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製1265589 A8 B8 C8 D8 VI. Patent Application Scope of Application: (Please read the note on the back and fill out this page) 1. A method for manufacturing shallow trench isolation, including at least: forming a trench on a substrate, where The substrate further includes a pad oxide layer and a tantalum nitride layer sequentially stacked; forming a liner oxide layer on one sidewall of the trench; and performing a thermal nitridation step to cause the liner oxide layer and the trench sidewall The exposed pad oxide layer is nitrided and forms a hafnium oxynitride layer, respectively. 2. The method of claim 1, wherein the thermal nitridation step utilizes a furnace tube nitridation step. 3. The method of claim 2, wherein the gas used in the furnace tube nitriding step further comprises a nitrogen (NO, nitrogen oxide (N〇), nitrous oxide (乂0) or A group consisting of ammonia (NH3), etc. 4. The method of claim 2, wherein the thermal nitridation step utilizes a rapid temperature nitridation step. 5. The method of claim 4, wherein the gas used in the rapid temperature nitridation step further comprises a nitrogen (NO, nitrogen oxide (NO), nitrous oxide (沁0) or A group of ammonia (Nh3), etc. 10 This paper scale applies to China National Standard (CNS) A4 specification (210X297 mm) 1265589 Α8 Β8 C8 D8 VI. Patent application scope Ministry of Economic Affairs Intellectual Property Bureau employee consumption cooperative print 6 The method for manufacturing a shallow trench isolation includes at least: forming a trench on a substrate, wherein the substrate further comprises a tantalum oxide layer and a nitride layer stacked in sequence; forming an oxide layer on the trench On one side wall; carry out a heat The nitriding step is such that the lining oxide layer and the exposed pad oxide layer on the sidewall of the trench are nitrided and form a yttrium oxynitride layer, and a ruthenium oxide layer is formed to fill the trench. The method of claim 6, wherein the method for forming the trench comprises: sequentially forming the pad oxide layer, the nitride layer and a photoresist layer on the substrate; performing a lithography and surname step The method of forming the trench in the substrate; and removing the photoresist layer. The method of claim 6, wherein the thermal nitriding step utilizes a furnace tube nitriding step. The method of claim 8, wherein the gas used in the furnace tube nitriding step further comprises a nitrogen (NO, nitrogen oxide (ν〇), nitrous oxide (Ν2〇) or ammonia (ΝΗ3) ) (1) Please read the following notes on the back page and fill in the page. Patent application scope 10. If the patent application scope is the sixth item The method of the present invention, wherein the thermal nitridation step utilizes a rapid temperature nitridation step. The method of claim 1, wherein the gas used in the rapid temperature nitridation step further comprises A group consisting of nitrogen (NO, nitrogen oxide (NO), nitrous oxide (N2〇) or ammonia. 1 2. A method for manufacturing shallow trench isolation, including at least: on a semiconductor substrate Forming a pad oxide layer and a tantalum nitride layer; performing a lithography step to form a trench in the semiconductor substrate; forming a liner oxide layer on one sidewall of the trench; performing a thermal nitridation step, The pad oxide layer and the pad oxide layer on the sidewall of the trench are nitrided and respectively formed into a hafnium oxynitride layer; a niobium oxide layer is formed to fill the trench; and a planarization step is performed. 13. The method of claim 12, wherein the thermal nitriding step utilizes a furnace tube nitridation step. The Ministry of Economic Affairs, the Intellectual Property Office, and the Employees' Cooperatives Co., Ltd. prints the method described in the patent scope of 513, wherein the gas used in the nitrogen production step of the furnace tube is further selected from nitrogen (8) and nitrogen oxide ( N〇), emulsified nitrous oxide (Να) or ammonia (NH3), etc. - group. 12 1265589 A8 B8 C8 D8, Patent Application No. 1 5 - The method of claim 12, wherein the thermal nitridation step utilizes a rapid temperature nitridation step. 1 6 · The method of claim 1 顼 wherein the gas used in the rapid temperature nitridation step is further selected from the group consisting of nitrogen (N2), nitrogen oxides (NO), and nitrous oxide (N2). 〇) or ammonia (NH3) and other groups of people. (Please read the notes on the back and fill out this page.) Printed by the Consumer Intellectual Property Office of the Intellectual Property Office of the Ministry of Economic Affairs. 本紙張尺度適用中國國家標準(CNS)A4規格(210X297公釐)This paper scale applies to China National Standard (CNS) A4 specification (210X297 mm)
TW90102560A 2001-02-06 2001-02-06 Method to form a shallow trench insulation TWI265589B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI414019B (en) * 2008-09-11 2013-11-01 He Jian Technology Suzhou Co Ltd Method for fabricating a gate oxide layer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI414019B (en) * 2008-09-11 2013-11-01 He Jian Technology Suzhou Co Ltd Method for fabricating a gate oxide layer

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