TW344819B - Semiconductor memory device - Google Patents
Semiconductor memory deviceInfo
- Publication number
- TW344819B TW344819B TW086110180A TW86110180A TW344819B TW 344819 B TW344819 B TW 344819B TW 086110180 A TW086110180 A TW 086110180A TW 86110180 A TW86110180 A TW 86110180A TW 344819 B TW344819 B TW 344819B
- Authority
- TW
- Taiwan
- Prior art keywords
- power supply
- internal power
- bit line
- column select
- supply voltage
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 230000008878 coupling Effects 0.000 abstract 1
- 238000010168 coupling process Methods 0.000 abstract 1
- 238000005859 coupling reaction Methods 0.000 abstract 1
- 230000002093 peripheral effect Effects 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Databases & Information Systems (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9086250A JPH10283776A (ja) | 1997-04-04 | 1997-04-04 | 半導体記憶装置 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW344819B true TW344819B (en) | 1998-11-11 |
Family
ID=13881581
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW086110180A TW344819B (en) | 1997-04-04 | 1997-07-17 | Semiconductor memory device |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US5859799A (zh) |
| JP (1) | JPH10283776A (zh) |
| KR (1) | KR100272070B1 (zh) |
| CN (1) | CN1140903C (zh) |
| DE (1) | DE19753495C2 (zh) |
| TW (1) | TW344819B (zh) |
Families Citing this family (27)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3274306B2 (ja) | 1995-01-20 | 2002-04-15 | 株式会社東芝 | 半導体集積回路装置 |
| US6292424B1 (en) | 1995-01-20 | 2001-09-18 | Kabushiki Kaisha Toshiba | DRAM having a power supply voltage lowering circuit |
| JP3399787B2 (ja) * | 1997-06-27 | 2003-04-21 | 富士通株式会社 | 半導体記憶装置 |
| KR100333684B1 (ko) * | 1998-12-30 | 2002-06-20 | 박종섭 | 타이밍마진을확보할수있는신호발생장치 |
| TW439293B (en) * | 1999-03-18 | 2001-06-07 | Toshiba Corp | Nonvolatile semiconductor memory |
| JP4748828B2 (ja) * | 1999-06-22 | 2011-08-17 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
| JP4543349B2 (ja) * | 1999-09-03 | 2010-09-15 | エルピーダメモリ株式会社 | 半導体記憶装置 |
| DE19963502B4 (de) * | 1999-12-28 | 2008-01-03 | Infineon Technologies Ag | Schaltungsanordnung für einen integrierten Halbleiterspeicher mit Spaltenzugriff |
| JP2003007059A (ja) * | 2001-06-22 | 2003-01-10 | Mitsubishi Electric Corp | 半導体記憶装置 |
| JP2003109390A (ja) * | 2001-09-27 | 2003-04-11 | Toshiba Corp | 半導体記憶装置 |
| JP4132795B2 (ja) * | 2001-11-28 | 2008-08-13 | 富士通株式会社 | 半導体集積回路 |
| KR100482766B1 (ko) * | 2002-07-16 | 2005-04-14 | 주식회사 하이닉스반도체 | 메모리 소자의 컬럼 선택 제어 신호 발생 회로 |
| JP4219663B2 (ja) * | 2002-11-29 | 2009-02-04 | 株式会社ルネサステクノロジ | 半導体記憶装置及び半導体集積回路 |
| US8086884B2 (en) * | 2002-12-16 | 2011-12-27 | Hewlett-Packard Development Company, L.P. | System and method for implementing an integrated circuit having dynamically variable power limit |
| JP2004199813A (ja) * | 2002-12-19 | 2004-07-15 | Matsushita Electric Ind Co Ltd | 半導体記憶装置 |
| JP3920827B2 (ja) * | 2003-09-08 | 2007-05-30 | 三洋電機株式会社 | 半導体記憶装置 |
| KR100609039B1 (ko) * | 2004-06-30 | 2006-08-10 | 주식회사 하이닉스반도체 | 입출력 라인 회로 |
| US20060077729A1 (en) * | 2004-10-07 | 2006-04-13 | Winbond Electronics Corp. | Low current consumption at low power DRAM operation |
| KR100621554B1 (ko) | 2005-08-01 | 2006-09-11 | 삼성전자주식회사 | 반도체 메모리 장치 |
| US7158432B1 (en) * | 2005-09-01 | 2007-01-02 | Freescale Semiconductor, Inc. | Memory with robust data sensing and method for sensing data |
| JP4769548B2 (ja) | 2005-11-04 | 2011-09-07 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 半導体記憶装置 |
| JP2009064512A (ja) * | 2007-09-06 | 2009-03-26 | Panasonic Corp | 半導体記憶装置 |
| JP2012212493A (ja) * | 2011-03-31 | 2012-11-01 | Elpida Memory Inc | 半導体装置 |
| US9124276B2 (en) * | 2012-12-20 | 2015-09-01 | Qualcomm Incorporated | Sense amplifier including a level shifter |
| KR102190868B1 (ko) * | 2014-09-17 | 2020-12-15 | 삼성전자주식회사 | 비트라인 연결 배선 저항 차를 보상하는 반도체 메모리 장치 |
| JP6050804B2 (ja) * | 2014-11-28 | 2016-12-21 | 力晶科技股▲ふん▼有限公司 | 内部電源電圧補助回路、半導体記憶装置及び半導体装置 |
| CN121075386A (zh) * | 2024-06-04 | 2025-12-05 | 长鑫科技集团股份有限公司 | 存储器电路 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3155879B2 (ja) * | 1994-02-25 | 2001-04-16 | 株式会社東芝 | 半導体集積回路装置 |
| US5710741A (en) * | 1994-03-11 | 1998-01-20 | Micron Technology, Inc. | Power up intialization circuit responding to an input signal |
| JPH08298722A (ja) * | 1995-04-26 | 1996-11-12 | Mitsubishi Electric Corp | 半導体装置および半導体装置の内部電源電位の調整方法 |
| JPH08315570A (ja) * | 1995-05-15 | 1996-11-29 | Mitsubishi Electric Corp | 半導体記憶装置 |
-
1997
- 1997-04-04 JP JP9086250A patent/JPH10283776A/ja active Pending
- 1997-07-17 TW TW086110180A patent/TW344819B/zh not_active IP Right Cessation
- 1997-10-10 KR KR1019970051991A patent/KR100272070B1/ko not_active Expired - Fee Related
- 1997-11-20 US US08/975,151 patent/US5859799A/en not_active Expired - Lifetime
- 1997-12-02 DE DE19753495A patent/DE19753495C2/de not_active Expired - Fee Related
- 1997-12-10 CN CNB971255601A patent/CN1140903C/zh not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| DE19753495A1 (de) | 1998-10-08 |
| KR19980079406A (ko) | 1998-11-25 |
| CN1195862A (zh) | 1998-10-14 |
| US5859799A (en) | 1999-01-12 |
| CN1140903C (zh) | 2004-03-03 |
| DE19753495C2 (de) | 1999-12-23 |
| JPH10283776A (ja) | 1998-10-23 |
| KR100272070B1 (ko) | 2000-11-15 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |