TW201812398A - Piezoelectric sensor readout circuit - Google Patents
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Abstract
Description
本案係有關於一種讀取電路,且特別是有關於一種壓電感應器讀取電路。 This case relates to a reading circuit, and more particularly to a piezoelectric sensor reading circuit.
習知主動像素感測(Active Pixel Sensor,APS)電路係用以感測光源,並依據光源之強度以將光源轉換為光電電壓。主動像素感測電路於照光後會產生電壓變化,隨後,由讀取電路取得光電電壓,其實際電壓值為光電電壓值與臨界電壓值(threshold voltage,Vth)之差。 It is known that an Active Pixel Sensor (APS) circuit is used to sense a light source and convert the light source into a photoelectric voltage according to the intensity of the light source. The active pixel sensing circuit generates a voltage change after the light is irradiated. Then, the photoelectric voltage is obtained by the reading circuit, and the actual voltage value is the difference between the photoelectric voltage value and the threshold voltage (Vth).
業界會將主動像素感測電路集成配置,並陣列化成為一陣列光感測面板。然而,由於主動像素感測電路內之相關元件的臨界電壓值會因應使用之狀況而產生變異,抑或基於製程差異而導致各個主動像素感測電路內相關元件之臨界電壓值不同,如此,將導致光的偵測資訊產生誤差。 The industry will integrate the active pixel sensing circuit and configure it into an array light sensing panel. However, because the critical voltage values of the relevant components in the active pixel sensing circuit may vary depending on the conditions of use, or due to process differences, the critical voltage values of the relevant components in each active pixel sensing circuit are different. Errors in light detection information.
由此可見,上述現有的方式,顯然仍存在不便與缺陷,而有待改進。為了解決上述問題,相關領域莫不費盡心思來謀求解決之道,但長久以來仍未發展出適當的解決方案。 It can be seen that the above existing methods obviously still have inconveniences and defects, and need to be improved. In order to solve the above-mentioned problems, the related fields have made every effort to find a solution, but a suitable solution has not been developed for a long time.
發明內容旨在提供本揭示內容的簡化摘要,以使閱讀者對本揭示內容具備基本的理解。此發明內容並非本揭示內容的完整概述,且其用意並非在指出本案實施例的重要/關鍵元件或界定本案的範圍。 This summary is intended to provide a simplified summary of this disclosure so that readers may have a basic understanding of this disclosure. This summary is not a comprehensive overview of this disclosure, and it is not intended to point out important / critical elements of the embodiments of the invention or to define the scope of the invention.
本案內容之一技術態樣係關於一種壓電感應器讀取電路,其包含輸入單元及減法單元。輸入單元包含第一電晶體與第二電晶體。第一電晶體與第二電晶體均包含第一端、第二端與控制端。第一電晶體之控制端用以接收第一定電壓,並且第一電晶體之第二端用以輸出第一輸出電壓。第二電晶體的控制端用以接收壓電電壓,並且第二電晶體的第二端用以輸出第二輸出電壓。減法單元電性連接輸入單元,用以根據第一與第二輸出電壓進行減法運算以產生讀取電壓。 A technical aspect of the content of this case relates to a piezoelectric sensor reading circuit, which includes an input unit and a subtraction unit. The input unit includes a first transistor and a second transistor. Each of the first transistor and the second transistor includes a first terminal, a second terminal, and a control terminal. The control terminal of the first transistor is used to receive a first constant voltage, and the second terminal of the first transistor is used to output a first output voltage. The control terminal of the second transistor is used to receive a piezoelectric voltage, and the second terminal of the second transistor is used to output a second output voltage. The subtraction unit is electrically connected to the input unit, and is configured to perform a subtraction operation according to the first and second output voltages to generate a read voltage.
本案內容之另一技術態樣係關於一種壓電感應器讀取電路,其包含輸入單元、緩衝單元及減法單元。輸入單元包含第一電晶體與第二電晶體。緩衝單元包含第一比較器及第二比較器。第一電晶體與第二電晶體均包含第一端、第二端與控制端。第一電晶體之第一端用以接收第一定電壓,第一電晶體之控制端用以接收壓電電壓,第一電晶體之第二端用以接收第一電流。第二電晶體之第一端用以接收第一定電壓。第二電晶體之控制端用以接收第二定電壓,第二電晶體之第二端用以接收第二電流。第一比較器電性耦接於第一電晶體 之第二端,並用以根據第一電流與第三定電壓以輸出第一輸出電壓。第二比較器電性耦接於第二電晶體之第二端,並用以根據第二電流與第三定電壓以輸出第二輸出電壓。減法單元用以根據第一輸出電壓與第二輸出電壓進行減法運算以產生讀取電壓。 Another technical aspect of the present invention relates to a piezoelectric sensor reading circuit, which includes an input unit, a buffer unit, and a subtraction unit. The input unit includes a first transistor and a second transistor. The buffer unit includes a first comparator and a second comparator. Each of the first transistor and the second transistor includes a first terminal, a second terminal, and a control terminal. A first terminal of the first transistor is used to receive a first constant voltage, a control terminal of the first transistor is used to receive a piezoelectric voltage, and a second terminal of the first transistor is used to receive a first current. The first terminal of the second transistor is used to receive a first constant voltage. The control terminal of the second transistor is used to receive a second constant voltage, and the second terminal of the second transistor is used to receive a second current. The first comparator is electrically coupled to the second terminal of the first transistor, and is configured to output a first output voltage according to the first current and the third constant voltage. The second comparator is electrically coupled to the second terminal of the second transistor, and is configured to output a second output voltage according to the second current and the third constant voltage. The subtraction unit is configured to perform a subtraction operation according to the first output voltage and the second output voltage to generate a read voltage.
因此,根據本案之技術內容,本案實施例提供一種壓電感應器讀取電路,藉以改善讀取電路中因臨界電壓值差異所導致的各種誤差問題。 Therefore, according to the technical content of the present case, an embodiment of the present case provides a piezoelectric sensor reading circuit, so as to improve various error problems caused by differences in threshold voltage values in the reading circuit.
在參閱下文實施方式後,本案所屬技術領域中具有通常知識者當可輕易瞭解本案之基本精神及其他發明目的,以及本案所採用之技術手段與實施態樣。 After referring to the following embodiments, those with ordinary knowledge in the technical field to which this case belongs can easily understand the basic spirit and other inventive objectives of this case, as well as the technical means and implementation patterns used in this case.
100、100A‧‧‧壓電感應器讀取電路 100, 100A‧‧‧ Piezoelectric sensor reading circuit
110‧‧‧輸入單元 110‧‧‧input unit
120‧‧‧緩衝單元 120‧‧‧ buffer unit
130‧‧‧減法單元 130‧‧‧ Subtraction unit
300、300A‧‧‧壓電感應器讀取電路 300, 300A‧‧‧ Piezoelectric sensor reading circuit
310‧‧‧輸入單元 310‧‧‧Input unit
320‧‧‧緩衝單元 320‧‧‧ buffer unit
322、324‧‧‧比較器 322, 324‧‧‧ Comparator
330‧‧‧減法單元 330‧‧‧ Subtraction Unit
IVin、IV1‧‧‧電流 IVin, IV1‧‧‧ current
N1~N2‧‧‧節點 N1 ~ N2‧‧‧node
R1‧‧‧電阻 R1‧‧‧ resistance
T1~T4‧‧‧電晶體 T1 ~ T4‧‧‧Transistors
V1~V3‧‧‧定電壓 V1 ~ V3‧‧‧constant voltage
VA~VD‧‧‧輸出電壓 VA ~ VD‧‧‧Output voltage
VDD‧‧‧電源供應電壓 VDD‧‧‧ Power supply voltage
Vin‧‧‧壓電電壓 Vin‧‧‧Piezoelectric Voltage
VSS‧‧‧接地電壓 VSS‧‧‧ ground voltage
Vout‧‧‧讀取電壓 Vout‧‧‧read voltage
為讓本案之上述和其他目的、特徵、優點與實施例能更明顯易懂,所附圖式之說明如下:第1圖係依照本案一實施例繪示一種壓電感應器讀取電路的示意圖。 In order to make the above and other objects, features, advantages, and embodiments of this case more comprehensible, the description of the drawings is as follows: FIG. 1 is a schematic diagram of a piezoelectric sensor reading circuit according to an embodiment of the present case. .
第2圖係依照本案另一實施例繪示一種壓電感應器讀取電路的示意圖。 FIG. 2 is a schematic diagram illustrating a piezoelectric sensor reading circuit according to another embodiment of the present invention.
第3圖係依照本案再一實施例繪示一種壓電感應器讀取電路的示意圖。 FIG. 3 is a schematic diagram illustrating a reading circuit of a piezoelectric sensor according to another embodiment of the present invention.
第4圖係依照本案又一實施例繪示一種壓電感應器讀取電路的示意圖。 FIG. 4 is a schematic diagram illustrating a reading circuit of a piezoelectric sensor according to another embodiment of the present invention.
根據慣常的作業方式,圖中各種特徵與元件並未依比例繪 製,其繪製方式是為了以最佳的方式呈現與本案相關的具體特徵與元件。此外,在不同圖式間,以相同或相似的元件符號來指稱相似的元件/部件。 According to the usual operation method, the various features and components in the figure are not drawn to scale. The drawing method is to present the specific features and components related to this case in the best way. In addition, between different drawings, the same or similar element symbols are used to refer to similar elements / components.
為了使本揭示內容的敘述更加詳盡與完備,下文針對了本案的實施態樣與具體實施例提出了說明性的描述;但這並非實施或運用本案具體實施例的唯一形式。實施方式中涵蓋了多個具體實施例的特徵以及用以建構與操作這些具體實施例的方法步驟與其順序。然而,亦可利用其他具體實施例來達成相同或均等的功能與步驟順序。 In order to make the description of this disclosure more detailed and complete, the following provides an illustrative description of the implementation mode and specific embodiments of this case; but this is not the only form of implementing or using the specific embodiments of this case. The embodiments include the features of a plurality of specific embodiments, as well as the method steps and their order for constructing and operating these specific embodiments. However, other specific embodiments can also be used to achieve the same or equal functions and sequence of steps.
除非本說明書另有定義,此處所用的科學與技術詞彙之含義與本案所屬技術領域中具有通常知識者所理解與慣用的意義相同。此外,在不和上下文衝突的情形下,本說明書所用的單數名詞涵蓋該名詞的複數型;而所用的複數名詞時亦涵蓋該名詞的單數型。 Unless otherwise defined in this specification, the meanings of scientific and technical terms used herein are the same as those understood and used by those having ordinary knowledge in the technical field to which this case belongs. In addition, when not in conflict with the context, the singular noun used in this specification covers the plural form of the noun; and the plural noun used also covers the singular form of the noun.
另外,關於本文中所使用之「耦接」,可指二或多個元件相互直接作實體或電性接觸,或是相互間接作實體或電性接觸,亦可指二或多個元件相互操作或動作。 In addition, as used in this document, "coupling" may mean that two or more elements make direct physical or electrical contact with each other, or indirectly make physical or electrical contact with each other, or that two or more elements operate mutually Or action.
第1圖係依照本案一實施例繪示一種壓電感應器讀取電路100的示意圖。如圖所示,壓電感應器讀取電路100包含輸入單元110、緩衝單元120及減法單元130。輸入單元110包含第一電晶體T1、第二電晶體T2與第三電晶體T3。輸入單元110之第一電晶體T1、第二電晶體T2與第三電晶體 T3均包含第一端、第二端與控制端。 FIG. 1 is a schematic diagram of a piezoelectric sensor reading circuit 100 according to an embodiment of the present invention. As shown in the figure, the piezoelectric sensor reading circuit 100 includes an input unit 110, a buffer unit 120, and a subtraction unit 130. The input unit 110 includes a first transistor T1, a second transistor T2, and a third transistor T3. The first transistor T1, the second transistor T2, and the third transistor T3 of the input unit 110 each include a first terminal, a second terminal, and a control terminal.
第一電晶體T1之控制端用以接收第一定電壓V1,並且第一電晶體T1之第二端用以輸出第一輸出電壓VA。第二電晶體T2的控制端用以接收壓電電壓Vin,並且第二電晶體T2的第二端用以輸出第二輸出電壓VB。減法單元130可透過但不限於緩衝電路120而電性連接於輸入單元110,並根據第一與第二輸出電壓VA、VB進行減法運算以產生讀取電壓Vout。 The control terminal of the first transistor T1 is used to receive a first constant voltage V1, and the second terminal of the first transistor T1 is used to output a first output voltage VA. The control terminal of the second transistor T2 is used to receive the piezoelectric voltage Vin, and the second terminal of the second transistor T2 is used to output a second output voltage VB. The subtraction unit 130 can be electrically connected to the input unit 110 through, but not limited to, the buffer circuit 120, and performs a subtraction operation according to the first and second output voltages VA, VB to generate a read voltage Vout.
由於第一電晶體T1之第二端輸出的第一輸出電壓VA包含定電壓V1與第一電晶體T1的臨界電壓Vth1之第一電壓差(V1-Vth1),而第二電晶體T2的第二端輸出的第二輸出電壓VB包含壓電電壓Vin與第二電晶體T2的臨界電壓Vth2之第二電壓差(Vin-Vth2),且第一電晶體T1的臨界電壓Vth1與第二電晶體T2的臨界電壓Vth2近乎相同,因此,本案之減法單元130根據第一電壓差(V1-Vth1)與第二電壓差(Vin-Vth2)進行減法運算而消除臨界電壓,以產生不含臨界電壓的讀取電壓Vout。據此,本案之壓電感應器讀取電路100輸出之讀取電壓Vout不具臨界電壓,使得壓電感應器讀取電路100不會因為臨界電壓之變異而導致其輸出的讀取電壓Vout有所誤差。 Because the first output voltage VA output from the second terminal of the first transistor T1 includes the first voltage difference (V1-Vth1) of the constant voltage V1 and the threshold voltage Vth1 of the first transistor T1, the The second output voltage VB output from the two terminals includes a second voltage difference (Vin-Vth2) between the piezoelectric voltage Vin and the threshold voltage Vth2 of the second transistor T2, and the threshold voltage Vth1 of the first transistor T1 and the second transistor The threshold voltage Vth2 of T2 is almost the same. Therefore, the subtraction unit 130 in this case performs a subtraction operation according to the first voltage difference (V1-Vth1) and the second voltage difference (Vin-Vth2) to eliminate the threshold voltage, so as to generate a voltage without the threshold voltage. Read voltage Vout. According to this, the reading voltage Vout output by the piezoelectric sensor reading circuit 100 in this case does not have a threshold voltage, so that the reading voltage Vout output by the piezoelectric sensor reading circuit 100 will not be caused by the variation of the threshold voltage. error.
在本實施例中,第一電晶體T1之第一端用以接收電源供應電壓VDD,第一電晶體T1之第二端與第二電晶體T2之第一端連接於第一節點N1,且第一電晶體T1之控制端用以接收第一定電壓V1,並由第一節點N1輸出第一輸出 電壓VA。再者,第二電晶體T2之第二端與第三電晶體T3之第一端連接於第二節點N2,第二電晶體T2的控制端用以接收壓電電壓Vin,並由第二節點N2輸出第二輸出電壓VB。此外,第三電晶體T3之控制端用以接收第二定電壓V2,第三電晶體T3之第二端用以耦接於接地電壓VSS。 In this embodiment, the first terminal of the first transistor T1 is used to receive the power supply voltage VDD, the second terminal of the first transistor T1 and the first terminal of the second transistor T2 are connected to the first node N1, and The control terminal of the first transistor T1 is used to receive a first constant voltage V1, and the first node N1 outputs a first output voltage VA. Furthermore, the second terminal of the second transistor T2 and the first terminal of the third transistor T3 are connected to the second node N2, and the control terminal of the second transistor T2 is used to receive the piezoelectric voltage Vin and is provided by the second node. N2 outputs a second output voltage VB. In addition, the control terminal of the third transistor T3 is used to receive the second constant voltage V2, and the second terminal of the third transistor T3 is used to be coupled to the ground voltage VSS.
於本實施例中,讀取電路100之緩衝單元120耦接於節點N1、N2以及減法單元130之間,並用以接收並緩衝第一輸出電壓VA與第二輸出電壓VB,以提供給減法單元130。隨後,減法單元130可透過但不限於緩衝單元120而電性連接於輸入單元110,減法單元130用以根據第一與第二輸出電壓VA、VB進行減法運算以產生讀取電壓Vout。 In this embodiment, the buffer unit 120 of the read circuit 100 is coupled between the nodes N1, N2 and the subtraction unit 130, and is used for receiving and buffering the first output voltage VA and the second output voltage VB to be provided to the subtraction unit. 130. Subsequently, the subtraction unit 130 may be electrically connected to the input unit 110 through, but not limited to, the buffer unit 120. The subtraction unit 130 is configured to perform a subtraction operation according to the first and second output voltages VA and VB to generate the read voltage Vout.
第2圖係依照本案另一實施例繪示一種壓電感應器讀取電路100A的示意圖。相較於第1圖所示之壓電感應器讀取電路100,在此之壓電感應器讀取電路100A的輸入單元110A之結構有所不同,說明如後。如第2圖所示,輸入單元110A包含第一電晶體T1、第二電晶體T2、第三電晶體T3及第四電晶體T4。第一電晶體T1、第二電晶體T2、第三電晶體T3及第四電晶體T4均包含第一端、第二端與控制端。 FIG. 2 is a schematic diagram illustrating a piezoelectric sensor reading circuit 100A according to another embodiment of the present invention. Compared with the piezoelectric sensor reading circuit 100 shown in FIG. 1, the structure of the input unit 110A of the piezoelectric sensor reading circuit 100A is different here, and the description is as follows. As shown in FIG. 2, the input unit 110A includes a first transistor T1, a second transistor T2, a third transistor T3, and a fourth transistor T4. The first transistor T1, the second transistor T2, the third transistor T3, and the fourth transistor T4 all include a first terminal, a second terminal, and a control terminal.
第三電晶體T3之第一端與第一電晶體T1之第二端耦接於第一節點N1,第一電晶體T1之控制端用以接收第一定電壓V1,並由第一節點N1輸出第一輸出電壓VA。第四電晶體T4之第一端與第二電晶體T2之第二端耦接於第二節點N2,第二電晶體T2之控制端用以接收壓電電壓Vin,並由第二節點N2輸出第二輸出電壓VB。隨後,減法 單元130可透過但不限於緩衝單元120而電性連接於輸入單元110A,減法單元130用以根據第一與第二輸出電壓VA、VB進行減法運算以產生讀取電壓Vout。 The first terminal of the third transistor T3 and the second terminal of the first transistor T1 are coupled to the first node N1. The control terminal of the first transistor T1 is used to receive the first constant voltage V1, and the first node N1 The first output voltage VA is output. The first terminal of the fourth transistor T4 and the second terminal of the second transistor T2 are coupled to the second node N2. The control terminal of the second transistor T2 is used to receive the piezoelectric voltage Vin and output by the second node N2. The second output voltage VB. Subsequently, the subtraction unit 130 may be electrically connected to the input unit 110A through, but not limited to, the buffer unit 120. The subtraction unit 130 is configured to perform a subtraction operation according to the first and second output voltages VA and VB to generate the read voltage Vout.
類似於第1圖所示之壓電感應器讀取電路100,第2圖所示之壓電感應器讀取電路100A亦可藉由上述電性操作以消除臨界電壓,據此,本案之壓電感應器讀取電路100A輸出之讀取電壓Vout不具有臨界電壓,使得壓電感應器讀取電路100A不會因為臨界電壓之變異,而導致其輸出的讀取電壓Vout有所誤差。 Similar to the piezoelectric sensor reading circuit 100 shown in FIG. 1, the piezoelectric sensor reading circuit 100A shown in FIG. 2 can also eliminate the critical voltage by the above electrical operation. The reading voltage Vout output by the electrical sensor reading circuit 100A does not have a threshold voltage, so that the reading voltage Vout output by the piezoelectric sensor reading circuit 100A does not cause an error due to the variation of the threshold voltage.
在本實施例中,第一電晶體T1與第二電晶體T2之第一端分別用以接收電源供應電壓VDD,而第三電晶體T3與第四電晶體T4之第二端分別用以耦接於接地電壓VSS。此外,第2圖之讀取電路100A之緩衝單元120的耦接方式與電性操作方式皆類似於第1圖之讀取電路100之緩衝單元120,於此不作贅述。 In this embodiment, the first terminals of the first transistor T1 and the second transistor T2 are respectively used to receive the power supply voltage VDD, and the second terminals of the third transistor T3 and the fourth transistor T4 are respectively used to couple Connected to ground voltage VSS. In addition, the coupling method and the electrical operation method of the buffer unit 120 of the reading circuit 100A of FIG. 2 are similar to the buffer unit 120 of the reading circuit 100 of FIG. 1, and will not be repeated here.
第3圖係依照本案再一實施例繪示一種壓電感應器讀取電路300的示意圖。如圖所示,壓電感應器讀取電路300包含輸入單元310、緩衝單元320及減法單元330。輸入單元310包含第一電晶體T1與第二電晶體T2。緩衝單元320包含第一比較器322及第二比較器324。第一電晶體T1與第二電晶體T2均包含第一端、第二端與控制端。 FIG. 3 is a schematic diagram of a piezoelectric sensor reading circuit 300 according to another embodiment of the present invention. As shown in the figure, the piezoelectric sensor reading circuit 300 includes an input unit 310, a buffer unit 320, and a subtraction unit 330. The input unit 310 includes a first transistor T1 and a second transistor T2. The buffer unit 320 includes a first comparator 322 and a second comparator 324. Each of the first transistor T1 and the second transistor T2 includes a first terminal, a second terminal, and a control terminal.
第一電晶體T1之第一端用以接收定電壓,例如接地電壓VSS,第一電晶體T1之控制端用以接收壓電電壓Vin,第一電晶體T1之第二端用以接收第一電流IVin。第二 電晶體T2之第一端用以接收接地電壓VSS,第二電晶體T2之控制端用以接收第一定電壓V1,第二電晶體之第二端用以接收第二電流IV1。第一比較器322耦接於第一電晶體T1之第二端,並用以根據第一電流IVin與第二定電壓V2以輸出第一輸出電壓VA。第二比較器324耦接於第二電晶體T2之第二端,並用以根據第二電流IV1與第二定電壓V2以輸出第二輸出電壓VB。減法單元330用以根據第一輸出電壓VA與第二輸出電壓VB進行減法運算以產生讀取電壓Vout。 The first terminal of the first transistor T1 is used to receive a constant voltage, such as the ground voltage VSS, the control terminal of the first transistor T1 is used to receive the piezoelectric voltage Vin, and the second terminal of the first transistor T1 is used to receive the first Current IVin. A first terminal of the second transistor T2 is used to receive a ground voltage VSS, a control terminal of the second transistor T2 is used to receive a first constant voltage V1, and a second terminal of the second transistor is used to receive a second current IV1. The first comparator 322 is coupled to the second terminal of the first transistor T1 and configured to output a first output voltage VA according to a first current IVin and a second constant voltage V2. The second comparator 324 is coupled to the second terminal of the second transistor T2 and configured to output a second output voltage VB according to the second current IV1 and the second constant voltage V2. The subtraction unit 330 is configured to perform a subtraction operation according to the first output voltage VA and the second output voltage VB to generate a read voltage Vout.
由於第一比較器322輸出的第一輸出電壓VA包含第二定電壓V2加上第一電流IVin與第一比較器322之阻值的乘積(V2+IVin×R1),第二比較器324輸出的第二輸出電壓VB包含第二定電壓V2加上第二電流IV1與第二比較器324之阻值的乘積(V2+IV1×R1),因此,本案之減法單元330根據第一輸出電壓VA與第二輸出電壓VB進行減法運算後,產生不含臨界電壓的讀取電壓Vout。據此,本案之壓電感應器讀取電路300輸出之讀取電壓Vout不具有臨界電壓,使得壓電感應器讀取電路300不會因為臨界電壓之變異,而導致其輸出的讀取電壓Vout有所誤差。 Since the first output voltage VA output by the first comparator 322 includes the product of the second constant voltage V2 plus the first current IVin and the resistance of the first comparator 322 (V2 + IVin × R1), the second comparator 324 outputs The second output voltage VB includes the product of the second constant voltage V2 plus the second current IV1 and the resistance of the second comparator 324 (V2 + IV1 × R1). Therefore, the subtraction unit 330 in this case is based on the first output voltage VA After performing a subtraction operation with the second output voltage VB, a read voltage Vout without a threshold voltage is generated. According to this, the reading voltage Vout output by the piezoelectric sensor reading circuit 300 in this case does not have a threshold voltage, so that the reading voltage Vout output by the piezoelectric sensor reading circuit 300 will not be caused by the variation of the threshold voltage. Something went wrong.
在本實施例中,緩衝單元320之第一比較器322及第二比較器324皆包含反向端、非反向端與輸出端。第一比較器322之反向端耦接於第一電晶體T1之第二端。第一電晶體T1根據壓電電壓Vin以將第一電流IVin由其第二端傳送至第一端。第一比較器322之非反向端用以接收第二定電壓V2。第一比較器322用以根據第一電流IVin與第二定電 壓V2以由第一比較器322之輸出端輸出第一輸出電壓VA。此外,第二比較器324之反向端耦接於第二電晶體T2之第二端。第二電晶體T2根據第一定電壓V1以將第二電流IV1由其第二端傳送至第一端。第二比較器324之非反向端用以接收第二定電壓V2。第二比較器324用以根據第二電流IV1與第二定電壓V2以由第二比較器324之輸出端輸出第二輸出電壓VB。 In this embodiment, the first comparator 322 and the second comparator 324 of the buffer unit 320 each include an inverting terminal, a non-inverting terminal, and an output terminal. The reverse terminal of the first comparator 322 is coupled to the second terminal of the first transistor T1. The first transistor T1 transmits a first current IVin from its second terminal to the first terminal according to the piezoelectric voltage Vin. The non-inverting terminal of the first comparator 322 is configured to receive a second constant voltage V2. The first comparator 322 is used for outputting the first output voltage VA from the output terminal of the first comparator 322 according to the first current IVin and the second constant voltage V2. In addition, the inverting terminal of the second comparator 324 is coupled to the second terminal of the second transistor T2. The second transistor T2 transmits the second current IV1 from the second terminal to the first terminal according to the first constant voltage V1. The non-inverting terminal of the second comparator 324 is used to receive a second constant voltage V2. The second comparator 324 is configured to output a second output voltage VB from the output terminal of the second comparator 324 according to the second current IV1 and the second constant voltage V2.
於本實施例中,緩衝單元320更包含複數第一電阻R1。第一比較器322之第一電阻R1耦接於第一比較器322之反向端與輸出端之間,使第一比較器322根據相應於第一電流IVin與第一電阻R1之第一電壓(IVin×R1)與第二定電壓V2以輸出第一輸出電壓VA。舉例而言,第一輸出電壓VA包含第一電壓(IVin×R1)與第二定電壓V2之第一電壓和(V2+IVin×R1)。另一第一電阻R1耦接於第二比較器324之反向端與輸出端之間,使第二比較器324根據相應於第二電流IV1與第一電阻R1之第二電壓(IV1×R1)與第二定電壓V2以輸出第二輸出電壓VB。舉例而言,第二輸出電壓VB包含第二電壓(IV1×R1)與第二定電壓V2之第二電壓和(V2+IV1×R1)。減法單元330根據第一電壓和(V2+IVin×R1)與第二電壓和(V2+IV1×R1)進行減法運算以產生讀取電壓Vout。 In this embodiment, the buffer unit 320 further includes a plurality of first resistors R1. The first resistor R1 of the first comparator 322 is coupled between the reverse terminal and the output terminal of the first comparator 322, so that the first comparator 322 is based on a first voltage corresponding to the first current IVin and the first resistor R1. (IVin × R1) and the second constant voltage V2 to output the first output voltage VA. For example, the first output voltage VA includes a first voltage sum (V2 + IVin × R1) of a first voltage (IVin × R1) and a second constant voltage V2. Another first resistor R1 is coupled between the inverting terminal and the output terminal of the second comparator 324, so that the second comparator 324 is based on a second voltage (IV1 × R1) corresponding to the second current IV1 and the first resistor R1. ) And the second constant voltage V2 to output a second output voltage VB. For example, the second output voltage VB includes a second voltage (IV1 × R1) and a second voltage sum (V2 + IV1 × R1) of the second constant voltage V2. The subtraction unit 330 performs a subtraction operation according to the first voltage sum (V2 + IVin × R1) and the second voltage sum (V2 + IV1 × R1) to generate a read voltage Vout.
在此實施例中,第二定電壓V2之電壓值大於接地電壓VSS之電壓值,第一定電壓V1的電壓值大於接地電壓VSS的電壓值。如此,藉由調整第二定電壓V2與接地電壓VSS 之電壓差以使第一電晶體T1與第二電晶體T2皆可操作於線性區。線性區之電流公式如下:
如上所述,藉由調整第二定電壓V2與接地電壓VSS之電壓差以使第一電晶體T1與第二電晶體T2操作於線性區,第一輸出電壓VA與第二輸出電壓VB如下:VA=V2+IVin×R1;VB=V2+IV1×R1;讀取電壓Vout如下:Vout=VA-VB=(IVin-IV1)×R1;再者,由於第一電晶體T1與第二電晶體T2之尺寸相同,因此,讀取電壓Vout可整理為:
由上述公式2可知,藉由上述電性操作,本案之壓電感應器讀取電路300輸出之讀取電壓Vout不具有臨界電壓,使得壓電感應器讀取電路300不會因為臨界電壓之變異,而導致其輸出的讀取電壓Vout有所誤差。 It can be known from the above formula 2 that by the above-mentioned electrical operation, the read voltage Vout output by the piezoelectric sensor reading circuit 300 of the present case does not have a threshold voltage, so that the piezoelectric sensor reading circuit 300 does not vary due to the threshold voltage , Which results in an error in the output voltage Vout.
第4圖係依照本案又一實施例繪示一種壓電感應器讀取電路300A的示意圖。相較於第3圖所示之壓電感應器讀取電路300,在此之壓電感應器讀取電路300A的輸入單元310A之結構有所不同,說明如後。如第4圖所示,輸入單元310A包含第一電晶體T1、第二電晶體T2、第三電晶體T3及第四電晶體T4。第一電晶體T1、第二電晶體T2、第三電晶體T3 及第四電晶體T4均包含第一端、第二端與控制端。 FIG. 4 is a schematic diagram of a piezoelectric sensor reading circuit 300A according to another embodiment of the present application. Compared with the piezoelectric sensor reading circuit 300 shown in FIG. 3, the structure of the input unit 310A of the piezoelectric sensor reading circuit 300A is different here, and the description is as follows. As shown in FIG. 4, the input unit 310A includes a first transistor T1, a second transistor T2, a third transistor T3, and a fourth transistor T4. The first transistor T1, the second transistor T2, the third transistor T3, and the fourth transistor T4 all include a first terminal, a second terminal, and a control terminal.
第一電晶體T1之第一端用以接收定電壓,例如接地電壓VSS,第一電晶體T1之控制端用以接收壓電電壓Vin,第一電晶體T1之第二端用以接收第一電流IVin。第三電晶體T3之第一端耦接於第一電晶體T1之第二端,第三電晶體T3之控制端用以接收第三定電壓V3。此外,第二電晶體T2之第一端用以接收接地電壓VSS,第二電晶體T2之控制端用以接收第一定電壓V1,第二電晶體T2之第二端用以接收第二電流IV1。第四電晶體T4之第一端耦接於第二電晶體T2之第二端。第四電晶體T4之控制端用以接收第三定電壓V3。 The first terminal of the first transistor T1 is used to receive a constant voltage, such as the ground voltage VSS, the control terminal of the first transistor T1 is used to receive the piezoelectric voltage Vin, and the second terminal of the first transistor T1 is used to receive the first Current IVin. A first terminal of the third transistor T3 is coupled to a second terminal of the first transistor T1, and a control terminal of the third transistor T3 is used to receive a third constant voltage V3. In addition, the first terminal of the second transistor T2 is used to receive the ground voltage VSS, the control terminal of the second transistor T2 is used to receive the first constant voltage V1, and the second terminal of the second transistor T2 is used to receive the second current. IV1. A first terminal of the fourth transistor T4 is coupled to a second terminal of the second transistor T2. The control terminal of the fourth transistor T4 is used to receive a third constant voltage V3.
再者,第一比較器322透過第三電晶體T3以耦接於第一電晶體T1之第二端,並用以根據第一電流IVin與第二定電壓V2以輸出第一輸出電壓VA。第二比較器324耦接於第四電晶體T4之第二端,並用以根據第二電流IV1與第二定電壓V2以輸出第二輸出電壓VB。減法單元330用以根據第一輸出電壓VA與第二輸出電壓VB進行減法運算以產生讀取電壓Vout。 Furthermore, the first comparator 322 is coupled to the second terminal of the first transistor T1 through the third transistor T3, and is configured to output the first output voltage VA according to the first current IVin and the second constant voltage V2. The second comparator 324 is coupled to the second terminal of the fourth transistor T4 and configured to output a second output voltage VB according to the second current IV1 and the second constant voltage V2. The subtraction unit 330 is configured to perform a subtraction operation according to the first output voltage VA and the second output voltage VB to generate a read voltage Vout.
類似於第3圖所示之壓電感應器讀取電路300,第4圖所示之壓電感應器讀取電路300A亦可藉由上述電性操作,以減法單元330根據第一輸出電壓VA與第二輸出電壓VB來產生未包含臨界電壓的讀取電壓Vout。據此,本案之壓電感應器讀取電路300A輸出之讀取電壓Vout不具有臨界電壓,使得壓電感應器讀取電路300A不會因為臨界電壓之變異,而導致其輸出的讀取電壓Vout有所誤差。在一實施例中, 第4圖之讀取電路300A之緩衝單元320的耦接方式與電性操作方式皆類似於第3圖之讀取電路300之緩衝單元320,於此不作贅述。 Similar to the piezoelectric sensor reading circuit 300 shown in FIG. 3, the piezoelectric sensor reading circuit 300A shown in FIG. 4 can also perform the electrical operation described above to subtract the unit 330 according to the first output voltage VA. And a second output voltage VB to generate a read voltage Vout that does not include a threshold voltage. According to this, the reading voltage Vout output by the piezoelectric sensor reading circuit 300A in this case does not have a threshold voltage, so that the reading voltage Vout output by the piezoelectric sensor reading circuit 300A will not be caused by the variation of the threshold voltage. Something went wrong. In an embodiment, the coupling method and the electrical operation method of the buffer unit 320 of the reading circuit 300A in FIG. 4 are similar to the buffer unit 320 of the reading circuit 300 in FIG. 3, and are not described herein.
由上述本案實施方式可知,應用本案具有下列優點。本案實施例提供一種壓電感應器讀取電路,藉以改善讀取電路中因臨界電壓值差異所導致的各種誤差問題。 It can be known from the foregoing embodiments of the present application that the application of the present application has the following advantages. The embodiment of the present invention provides a piezoelectric sensor reading circuit, so as to improve various error problems caused by the difference in threshold voltage values in the reading circuit.
雖然上文實施方式中揭露了本案的具體實施例,然其並非用以限定本案,本案所屬技術領域中具有通常知識者,在不悖離本案之原理與精神的情形下,當可對其進行各種更動與修飾,因此本案之保護範圍當以附隨申請專利範圍所界定者為準。 Although the specific embodiments of the present case are disclosed in the above embodiments, they are not intended to limit the present case. Those who have ordinary knowledge in the technical field to which this case belongs can be carried out without departing from the principles and spirit of this case. Various changes and modifications, so the scope of protection in this case shall be defined by the scope of the accompanying patent application.
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| KR102182572B1 (en) * | 2014-04-15 | 2020-11-25 | 삼성디스플레이 주식회사 | Interface circuit |
| TWI545890B (en) * | 2014-05-09 | 2016-08-11 | 友達光電股份有限公司 | Electronic device and comparator thereof |
| CN105572603B (en) * | 2014-10-17 | 2018-10-02 | 财团法人金属工业研究发展中心 | Power management system and detection device of power module thereof |
-
2016
- 2016-09-13 TW TW105129790A patent/TWI602001B/en not_active IP Right Cessation
- 2016-11-04 CN CN201610963319.3A patent/CN106441562B/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| CN106441562A (en) | 2017-02-22 |
| TWI602001B (en) | 2017-10-11 |
| CN106441562B (en) | 2018-12-07 |
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| MM4A | Annulment or lapse of patent due to non-payment of fees |