TW200703879A - Phase detecting circuit having adjustable gain curve and method thereof - Google Patents
Phase detecting circuit having adjustable gain curve and method thereofInfo
- Publication number
- TW200703879A TW200703879A TW095124059A TW95124059A TW200703879A TW 200703879 A TW200703879 A TW 200703879A TW 095124059 A TW095124059 A TW 095124059A TW 95124059 A TW95124059 A TW 95124059A TW 200703879 A TW200703879 A TW 200703879A
- Authority
- TW
- Taiwan
- Prior art keywords
- detecting circuit
- gain curve
- phase detecting
- adjustable gain
- phase
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D13/00—Circuits for comparing the phase or frequency of two mutually-independent oscillations
- H03D13/003—Circuits for comparing the phase or frequency of two mutually-independent oscillations in which both oscillations are converted by logic means into pulses which are applied to filtering or integrating means
- H03D13/004—Circuits for comparing the phase or frequency of two mutually-independent oscillations in which both oscillations are converted by logic means into pulses which are applied to filtering or integrating means the logic means delivering pulses at more than one terminal, e.g. up and down pulses
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Manipulation Of Pulses (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US69543005P | 2005-07-01 | 2005-07-01 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200703879A true TW200703879A (en) | 2007-01-16 |
| TWI321898B TWI321898B (en) | 2010-03-11 |
Family
ID=37597847
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW095124059A TWI321898B (en) | 2005-07-01 | 2006-06-30 | Phase detecting circuit having adjustable gain curve and method thereof |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US7532038B2 (zh) |
| CN (1) | CN100508398C (zh) |
| TW (1) | TWI321898B (zh) |
Families Citing this family (33)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8504862B2 (en) * | 2007-02-20 | 2013-08-06 | Fujitsu Semiconductor Limited | Device and method for preventing lost synchronization |
| JP2009231896A (ja) * | 2008-03-19 | 2009-10-08 | Fujitsu Ltd | 受信装置および受信方法 |
| US8718217B2 (en) * | 2008-07-29 | 2014-05-06 | Fujitsu Limited | Clock and data recovery (CDR) using phase interpolation |
| US20120126854A1 (en) * | 2009-08-04 | 2012-05-24 | Nec Corporation | Frequency regeneration circuit and frequency regeneration method |
| US8179162B2 (en) * | 2010-07-13 | 2012-05-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Phase-lock assistant circuitry |
| US8588358B2 (en) | 2011-03-11 | 2013-11-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Clock and data recovery using LC voltage controlled oscillator and delay locked loop |
| TWI452837B (zh) * | 2011-06-02 | 2014-09-11 | Himax Tech Ltd | 時脈回復電路及其頻率偵測模組 |
| WO2013137863A1 (en) | 2012-03-13 | 2013-09-19 | Rambus Inc. | Clock and data recovery having shared clock generator |
| GB2504509B (en) * | 2012-07-31 | 2018-11-14 | Qualcomm Technologies Int Ltd | Phase - locked loop |
| US9036764B1 (en) * | 2012-12-07 | 2015-05-19 | Rambus Inc. | Clock recovery circuit |
| JP6163860B2 (ja) * | 2013-05-15 | 2017-07-19 | 株式会社リコー | 位相比較回路とクロックデータリカバリ回路 |
| KR101949964B1 (ko) | 2014-08-01 | 2019-02-20 | 칸도우 랩스 에스에이 | 임베딩된 클록을 갖는 직교 차동 벡터 시그널링 코드 |
| JP6479449B2 (ja) * | 2014-12-12 | 2019-03-06 | ラピスセミコンダクタ株式会社 | クロックデータリカバリ回路、位相同期回路及び半導体装置 |
| ES2774026T3 (es) * | 2015-05-04 | 2020-07-16 | Wilcox Ind Corp | Plataforma de accesorio alimentado para armas |
| US10055372B2 (en) | 2015-11-25 | 2018-08-21 | Kandou Labs, S.A. | Orthogonal differential vector signaling codes with embedded clock |
| EP3446403B1 (en) | 2016-04-22 | 2021-01-06 | Kandou Labs S.A. | High performance phase locked loop |
| US10193716B2 (en) | 2016-04-28 | 2019-01-29 | Kandou Labs, S.A. | Clock data recovery with decision feedback equalization |
| US9906358B1 (en) | 2016-08-31 | 2018-02-27 | Kandou Labs, S.A. | Lock detector for phase lock loop |
| US10411922B2 (en) | 2016-09-16 | 2019-09-10 | Kandou Labs, S.A. | Data-driven phase detector element for phase locked loops |
| US10200188B2 (en) | 2016-10-21 | 2019-02-05 | Kandou Labs, S.A. | Quadrature and duty cycle error correction in matrix phase lock loop |
| CN115333530A (zh) | 2017-05-22 | 2022-11-11 | 康杜实验室公司 | 多模式数据驱动型时钟恢复方法和装置 |
| US10203226B1 (en) | 2017-08-11 | 2019-02-12 | Kandou Labs, S.A. | Phase interpolation circuit |
| GB2567463B (en) * | 2017-10-12 | 2022-08-24 | Communications Audit Uk Ltd | Phase locked loop circuit |
| US10347283B2 (en) * | 2017-11-02 | 2019-07-09 | Kandou Labs, S.A. | Clock data recovery in multilane data receiver |
| US10554380B2 (en) | 2018-01-26 | 2020-02-04 | Kandou Labs, S.A. | Dynamically weighted exclusive or gate having weighted output segments for phase detection and phase interpolation |
| CN112868181B (zh) | 2018-06-12 | 2023-11-21 | 康杜实验室公司 | 低延迟组合式时钟数据恢复逻辑网络及电荷泵电路 |
| US10630272B1 (en) | 2019-04-08 | 2020-04-21 | Kandou Labs, S.A. | Measurement and correction of multiphase clock duty cycle and skew |
| US10673443B1 (en) | 2019-04-08 | 2020-06-02 | Kandou Labs, S.A. | Multi-ring cross-coupled voltage-controlled oscillator |
| US10958251B2 (en) | 2019-04-08 | 2021-03-23 | Kandou Labs, S.A. | Multiple adjacent slicewise layout of voltage-controlled oscillator |
| US11463092B1 (en) | 2021-04-01 | 2022-10-04 | Kanou Labs Sa | Clock and data recovery lock detection circuit for verifying lock condition in presence of imbalanced early to late vote ratios |
| US11563605B2 (en) | 2021-04-07 | 2023-01-24 | Kandou Labs SA | Horizontal centering of sampling point using multiple vertical voltage measurements |
| US11496282B1 (en) | 2021-06-04 | 2022-11-08 | Kandou Labs, S.A. | Horizontal centering of sampling point using vertical vernier |
| US11398826B1 (en) | 2021-09-19 | 2022-07-26 | Hcl Technologies Limited | Half rate bang-bang phase detector |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6026134A (en) * | 1997-06-19 | 2000-02-15 | Cypress Semiconductor Corp. | Phase locked loop (PLL) with linear parallel sampling phase detector |
| US6259278B1 (en) * | 1999-06-14 | 2001-07-10 | Realtek Semiconductor Corp. | Phase detector |
| US6442225B1 (en) * | 1999-06-14 | 2002-08-27 | Realtek Semiconductor Corporation | Multi-phase-locked loop for data recovery |
| US6249159B1 (en) * | 1999-12-30 | 2001-06-19 | Intel Corporation | Frequency control circuit having increased control bandwidth at lower device operating speed |
| JP4425426B2 (ja) * | 2000-05-11 | 2010-03-03 | Ｎｅｃエレクトロニクス株式会社 | オーバーサンプリング型クロックリカバリ回路 |
| KR100479309B1 (ko) * | 2003-07-26 | 2005-03-28 | 삼성전자주식회사 | 위상차 검출 방법 및 이를 수행하기 위한 위상 검출기 |
| TWI311865B (en) * | 2005-07-01 | 2009-07-01 | Via Tech Inc | Clock and data recovery circuit and method thereof |
-
2006
- 2006-06-30 US US11/477,918 patent/US7532038B2/en active Active
- 2006-06-30 TW TW095124059A patent/TWI321898B/zh active
- 2006-07-03 CN CNB2006101005328A patent/CN100508398C/zh active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN1893277A (zh) | 2007-01-10 |
| US20070001713A1 (en) | 2007-01-04 |
| CN100508398C (zh) | 2009-07-01 |
| TWI321898B (en) | 2010-03-11 |
| US7532038B2 (en) | 2009-05-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TW200703879A (en) | Phase detecting circuit having adjustable gain curve and method thereof | |
| WO2008141102A3 (en) | Systems and methods for providing a clock signal | |
| WO2009154906A3 (en) | Apparatus and method for multi-phase clock generation | |
| TW200610277A (en) | Circuits and methods for recovering a clock signal | |
| TW200703916A (en) | Clock and data recovery circuit and method thereof | |
| CN106537783B (zh) | 时钟同步 | |
| GB0724002D0 (en) | Noise tolerant voltage controlled oscillator | |
| TW200419910A (en) | Method and device for generating a clock signal having predetermined clock signal properties | |
| TW200718026A (en) | An improved lock detect circuit for a phase locked loop | |
| DE60134835D1 (de) | Verfahren und Schaltungsanordung zur Datenübertragung zwischen pseudo-synchronisierten Kanälen | |
| TW201130229A (en) | Delay locked loop and method of driving delay locked loop | |
| WO2007100529A3 (en) | Spread-spectrum clocking | |
| KR20080076615A (ko) | 쉬프터와 가산기를 이용하여 지연 시간을 조절하는 지연고정 루프 및 클럭 지연 방법 | |
| WO2012151313A3 (en) | Apparatus and method to hold pll output frequency when input clock is lost | |
| WO2004044757A3 (en) | Method and apparatus for data acquisition | |
| WO2004073175A3 (en) | Adaptive input logic for phase adjustments | |
| WO2011126614A3 (en) | Apparatus and method to compensate for injection locking | |
| DE602008001503D1 (de) | Digitaler datenpuffer | |
| TW200625823A (en) | Fast locking method and apparatus for frequency | |
| GB2431061A (en) | Synchronous follow-up apparatus and synchronous follow-up method | |
| EP4404466A4 (en) | CLOCK SIGNAL NOISE REDUCTION APPARATUS, NOISE REDUCTION METHOD, AND MULTI-PHASE DELAY LOCKED LOOP | |
| TW200509631A (en) | Recovery of clock and data using quadrature clock signals | |
| TW200721692A (en) | Information handling system capable of detecting frequency lock of signals downstream from a signal synthesized by a frequency synthesizer | |
| AU2003280193A1 (en) | Phase-error based signal alignment | |
| TW200709556A (en) | Phase detector and related phase detecting method thereof |