RU80035U1 - VOLTAGE LIMITER - Google Patents

Abstract

Usage: in electrical engineering when building power supplies. The essence of the utility model: a voltage limiter is proposed that contains a resistor current sensor 1, first 2 and second 3 sources of disputed voltage, first 4 and second 5 amplifiers, resistor voltage divider 6, logic element OR 7, key 8, second diode 9, first diode 10, inductor 11 and capacitor 12; in the voltage limiter, the first power electrode of key 8 is connected through a resistor current sensor 1 to the input voltage output, and the second power electrode through the inductor 11 to the output voltage output; one input of the amplifier 4 is connected to the first power electrode of the regulatory element, and the other input through the first source of the reference voltage 2 to the output voltage input; a capacitor 12 and the extreme terminals of the resistor voltage divider 6 are connected between the output voltage terminal and the common wire; the middle terminal of the resistor voltage divider 6 is connected to one of the inputs of the second amplifier 5, the second input of which is connected to a common wire through a second voltage reference source 3; the outputs of the first 4 and second 5 amplifiers are connected to the inputs of the OR gate 7, the output of which is connected to the control electrode of the key 8, the second power electrode of which is connected to the common wire through the first diode 10, and to the output of the OR gate 7 through the second diode 9. 2 ill.

Description

The utility model relates to electrical engineering and can be used in the construction of secondary power sources.

Known voltage limiter, built on restrictive diodes [1]. The disadvantages of this technical solution are low overload capacity and short exposure times (tens of microseconds).

These shortcomings narrow the functionality and scope of the considered technical solutions.

The closest in technical essence and the technical problem to be solved is a known voltage limiter based on a pulse regulator, containing a key with a control, first and second power electrodes, a resistor current sensor connected between the first power electrode of the key and the input voltage output, the first amplifier, one input of which connected to the first power terminal of the key, and the second input through the first source of the reference voltage - with the output voltage input, a capacitor connected between the output output about voltage and a common wire, a second amplifier, one input of which is connected to the midpoint of a resistor voltage divider, the extreme terminals of which are connected to the terminals of the capacitor, and the second input through a second reference voltage source - with a common wire, the outputs of the first and second amplifiers are connected to the inputs of the logical OR element, the output of which is connected through a one-shot to the control electrode of the switch, the second power electrode of which is connected via the inductor to the output voltage output and through the diode to the common wire [2 ]. Figure 1 shows the functional diagram of the prototype.

The voltage limiter operates as follows. First, for the normal operation of the voltage limiter, it is adjusted to the maximum current value through the key Kl by selecting the resistor of the current sensor Rdt:

Icl.max = Uop1 / Rdt.

Then set the value of the limiting voltage Uogr> Uin.max by setting the value of the resistors of the voltage divider DN:

Uogp = Up2 × (1 + R1 / R2).

When the input voltage is Uin <Uog in steady state and the current of the key is Cl Icl <Icl.max, there are no signals at the outputs of amplifiers U1 and U2, and the key Cl works in saturation mode.

When the instantaneous value of the current through the Cl key increases above the value of Icl.max, a signal appears at the output of amplifier U1, which triggers a single-shot Oder through the OR logic element, which removes the control signal from the Cl key for the delay time t-back and closes it for the specified time. The current through the inductor L starts to decrease, flowing at this interval through the diode D. After the time tset, the key Kl is automatically turned on and the process is periodically repeated until the current value through it reaches the current value Ikl.max through it. In this way, the key is protected from overcurrent, for whatever reason they did not occur. When you open the key Kl current almost instantly rises to a value equal to the value of the current through the inductor at the time of opening the key. Subsequently, the current rise rate up to the moment the key is closed is inversely proportional to the inductor L.

With an increase in the output voltage of the limiter above the Ugr value, a signal now appears at the output of the amplifier U2, which triggers a single-shot Od through the LI logic element, which also removes the control signal from the key Kl for at least the delay time t and locks it for the specified time. The last one will open when the output voltage

of the voltage limiter decreases less than the value Uogr. As a result, when the voltage at the input of the limiter increases, the latter also goes into a pulsed mode of operation, limiting the average value of the voltage at the output to the level Uogr. In this case, the control element of the RE operates in a key mode with a minimum power dissipated on it.

A disadvantage of the known technical solution is the increased level of interference generated by the device during the action of overvoltage at the input and overcurrent at the output, as well as the increased complexity of the device.

Common features of the proposed technical solution and prototype are a key with a control, first and second power electrodes, a resistor current sensor connected between the first power electrode of the key and the input voltage output, the first amplifier, one input of which is connected to the first power output of the key, and the second input through the first reference voltage source - with the input voltage output, a capacitor connected between the output voltage output and the common wire, the second amplifier, one input of which is connected to the middle the point of the resistor voltage divider, the extreme terminals of which are connected to the terminals of the capacitor, and the second input through the second source of the reference voltage to the common wire, an OR logic element, the inputs of which are connected to the outputs of the first and second amplifiers, the first diode, the first electrode of which is connected to the common a wire, and the second with the second key power electrode, a choke connected between the output voltage output and the second key power electrode, the output of the OR gate.

The technical task of the proposed utility model is to reduce the level of interference generated by the device during the action of overvoltage at the input and overcurrent at the output, as well as simplification of the device.

The stated technical problem is solved by the fact that a voltage limiter is provided, comprising a key with a control, first and second power electrodes, a current resistor sensor connected between the first power electrode of the key and the input voltage output, the first amplifier, one input of which is connected to the first power output of the key, and the second input through the first reference voltage source - with the input voltage output, a capacitor connected between the output voltage output and the common wire, the second amplifier, one input to The second one is connected to the midpoint of the resistor voltage divider, the extreme terminals of which are connected to the terminals of the capacitor, and the second input through the second reference voltage source is connected to a common wire, the OR logic element, whose inputs are connected to the outputs of the first and second amplifiers, the first diode, the first electrode of which connected to a common wire, and the second to the second key power electrode, a choke connected between the output voltage output and the second key power electrode, the output of the OR logic element, and into it a second diode is introduced, the first power electrode of which is connected to the connection point of the output of the OR logic element and the key control electrode, and the second to the second electrode of the first diode.

The introduction of additional elements and new non-obvious connections into devices made it possible to significantly reduce the level of interference generated by the device during the action of overvoltage at the input and overcurrent at the output, while simplifying the device.

The applicant did not find technical solutions having similar features with features that distinguish the claimed solution from the prototype, and therefore, the proposed technical solution has significant differences.

The proposed device is made of standard elements that are commercially available from industry. It is assembled by typical installation operations using standard equipment, which is especially

important in serial production. Therefore, the proposed device meets the criterion of industrial applicability.

Figure 2 shows the functional diagram of the proposed voltage limiter.

The proposed voltage limiter contains a resistor current sensor 1, first 2 and second 3 sources of reference voltage, the first 4 and second 5 amplifiers, resistor voltage divider 6, OR gate 7, key 8, second diode 9, first diode 10, inductor 11 and capacitor 12.

In the proposed voltage limiter, the first power electrode of the key 8 is connected through a resistor current sensor 1 to the input voltage output, and the second power electrode through the inductor 11 to the output voltage output. One input of the amplifier 4 is connected to the first power electrode of the regulating element, and the other input through the first source of the reference voltage 2 to the output voltage input. The capacitor 12 and the extreme terminals of the resistor voltage divider 6 are connected between the output voltage output and the common wire. The middle output of the resistor voltage divider 6 is connected to one of the inputs of the second amplifier 5, the second input of which is connected to a common wire through a second source of reference voltage 3. The outputs of the first 4 and second 5 amplifiers are connected to the inputs of the OR gate 7, the output of which is connected to the control electrode of the key 8 and the first electrode of the second diode 9, the second power electrode of which is connected through a diode 10 to a common wire.

The proposed voltage limiter operates as follows. First, for the normal operation of the voltage limiter, it is adjusted to the maximum current value through the key C by selecting the resistor of the current sensor Rdt and the value of the limiting voltage Ugr≥Uin.max is set by selecting the resistances of the voltage divider DN in the same way as in the prototype. When the input voltage Uin≤Uogr in steady state and

the current of the key Kl Ikl≤Ikl.maks signals at the outputs of the amplifiers U1 and U2 are absent, and the key Kl works in saturation mode.

When the instantaneous value of the current through the Cl key increases above the value of Icl.max, a signal appears at the output of amplifier U1, which closes the Cl key through the OR logic element. The current through the inductor L begins to decrease, flowing in this interval through the second diode D. In this case, the potential of its cathode, and hence the potential of the cathode of the second diode D and the key control electrode Cl, are close to zero, i.e. Cl key is automatically kept closed. After the current through the first diode D decreases to zero, an oscillatory process begins at its cathode with a frequency of free vibrations. With an increase in this voltage, the second diode D is locked and removes the lock from the control electrode of the key Kl. The key opens and the current through it begins to increase from zero. Each period of operation, a “portion” of charge passes through capacitor C, and the voltage across it increases. When the current reaches the value of Icl.max, the Cl key is turned off again and the process is periodically repeated until the next time the Cl key is opened, the current value through it ceases to reach the value of Icl.max, and then decreases to the value of the output current of the voltage limiter (load current ) In this way, the key Kl and the load are protected from overcurrents, for whatever reason they did not occur.

With an increase in the output voltage of the limiter above the value of Uogr, a signal now appears at the output of amplifier U2, which, through the OR gate, turns off the key Kl. The latter will open when the voltage at the output of the voltage limiter decreases less than the value of Ulim. As a result, when overvoltage at the input of the limiter, the latter also goes into pulsed operation, limiting the average value of the voltage at the output to the level of Uogr.

The inductor L in the proposed voltage limiter operates in the boundary mode with zero current when opening the key Cl. Speed

the increase in current through the key Kl in this mode of operation is inversely proportional to the inductance of the inductor L and hundreds of times less than in the prototype. This feature of the proposed device greatly reduces the level of interference generated at the input of the voltage limiter. Moreover, the reduction in the level of interference was achieved by simplifying the electrical circuit of the device (an additional diode was introduced, however, a whole single-vibrator assembly was excluded). Other characteristics of the device remained unchanged.

Sources used in writing the application.

1. Kolosov V.A. et al. Network noise suppression device. Description of the utility model No. 13729. - BI No. 13, 2000.

2. Mironov A.A. Voltage limiter. Description of the utility model No. 46594.

Claims (1)

A voltage limiter containing a key with a control, first and second power electrodes, a resistor current sensor connected between the first power electrode of the key and the input voltage output, the first amplifier, one input of which is connected to the first power output of the key, and the second input through the first reference voltage source - with an input voltage output, a capacitor connected between the output voltage output and the common wire, a second amplifier, one input of which is connected to the midpoint of the resistor divider Ii, the extreme terminals of which are connected to the terminals of the capacitor, and the second input through the second source of the reference voltage to the common wire, an OR logic element, the inputs of which are connected to the outputs of the first and second amplifiers, the first diode, the first electrode of which is connected to the common wire, and the second - with a second key power electrode, a choke connected between the output voltage output and the second key power electrode, an output of an OR logic element, characterized in that a second diode is inserted into it, the first power electrode it is connected to the connection point of the output of the OR logic element and the key control electrode, and the second to the second electrode of the first diode.