JPH10143294A - Power down circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent an overcurrent from flowing into a function block to which the power supply is shut off and to avoid an instable signal input, in a power down circuit in a device composed of plural function blocks. SOLUTION: This circuit is provided with function blocks 201 and 202 using independent power sources, a power supply switch 206 for supplying power to the function block 201, an interface control circuit 207 composed of a switch 204 and a pull-down resistor 205 so as to control an interface between the function blocks 201 and 202, and a CPU 203 for controlling sequence open/close between the power supply switch 206 and the switch 204 of the interface control circuit 207. Since the supply of power and the shutoff of power supply to the function block 201 and the control of the interface control circuit 207 are sequentially controlled, the inflow of overcurrent and instable signal input are avoided.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microcontroller device having a plurality of functional blocks therein, by supplying and shutting off power to each functional block unit, thereby saving power of the entire device and extending the operating time of a battery. In particular, the above functional block is a CMO
The present invention relates to a power-down circuit effective in a device including S elements.

[0002]

2. Description of the Related Art Conventionally, as a power down method, for example, Japanese Patent Laid-Open No. Hei 5-324139 discloses a method for reducing the power consumption of the entire device in a microcontroller device having a plurality of built-in functional blocks as shown in FIG. A system for targeting is disclosed. In the power down system disclosed in this publication, a power save control register 100 for individually stopping power supply to a plurality of functional blocks including a CPU is provided. For example, an AD converter 101, a DA converter 102, a comparator 10
3. When the power supply 109 to each part of the operational amplifier unit 104 is individually supplied or stopped, the corresponding AD
Bit, DA bit, CM bit, OP bit to “0”
Alternatively, by setting to "1", the switches 105 to 108 are opened and closed, and as a result, the supply or stop of the power supply 109 can be individually controlled for the AD converter 101 to the operational amplifier 104. Thereby, the power supply to the functional blocks in the unused state is stopped, and the power consumption of the entire apparatus is reduced.

[0003]

In a device having a plurality of function blocks, when the supply of power to a certain function block is interrupted, the input terminal of the subsequent function block is opened. However, in the technology disclosed in the above publication, no consideration is given to the case where the input terminal is opened. Generally, CMOS
It is not desirable to keep the input terminals of the element open. Therefore, a measure is taken to insert a pull-up resistor or a pull-down resistor to fix the logic level to either the power supply level or the ground level. However, when a pull-up resistor or a pull-down resistor is inserted, power is consumed by the amount of the resistor when not in an open state, which is not preferable in terms of power saving.

The inventions according to claims 1 and 2 have been made in view of this point, and an object of the present invention is to provide a power-down circuit capable of saving power without opening an input terminal of a functional block. It is the purpose.

Further, in the technology disclosed in the above publication, in a device having a plurality of function blocks, when power supply to a certain function block is cut off, consideration must be given to protection of a CMOS element of the function block. Not done. Originally, in the case of a system constituted by functional blocks composed of CMOS elements as shown in FIG. 8, the order of shutting off the power supply is from the first CMOSIC 110 to the second CMOSIC 111, but in the reverse order. If the power supply is cut off in the order of the second CMOS IC 111 and the first CMOS IC 110, the protection diodes 112 and 113 added to the input of the second CMOS IC 111 may be burned out by an excessive current. Therefore, as shown in FIG. 8, a countermeasure of inserting a current limiting resistor 114 is taken. However, since a signal is delayed due to a time constant caused by the resistance of the current limiting resistor 114 and the wiring stray capacitance 115, etc. This can be a problem when processing.

The inventions according to claims 1 and 3 have been made in view of this point. In an apparatus having a plurality of function blocks, a signal delay is caused when power supply to a certain function block is cut off. It is an object of the present invention to provide a power-down circuit capable of preventing the destruction of a CMOS element while minimizing it.

[0007]

According to a first aspect of the present invention, there is provided a power down circuit in a device which comprises a plurality of functional blocks and performs various functional operations. A power switch that controls supply and cutoff of power to the power supply, an interface control circuit that controls an interface between the functional blocks, and a sequence management circuit that performs sequence management of the power switch and the interface control circuit, The power supply to each functional block is selectively supplied and cut off by a control signal from the sequence management circuit. An embodiment according to the present invention corresponds to the first, second, and third embodiments.
The sequence management circuit described in the claims corresponds to a CPU in these embodiments.

In the power-down circuit configured as described above, when the supply of power to any of the plurality of functional blocks is cut off, the sequence management circuit first includes an interface control circuit between the functional blocks. The power supply can be cut off by the operation of the interface control circuit that receives this control signal, and the sequence management circuit cuts off the power supply to the target function block via the power switch. I do.
The sequence management circuit sequentially controls the supply of power to each functional block and the control of the interface control circuit, so that an excessive current flows into the functional block whose power supply is cut off, or to the next functional block. It is possible to avoid instability of the input.

According to a second aspect of the present invention, in the power down circuit according to the first aspect, the interface control circuit is controlled by a control signal from the sequence management circuit.
The configuration is such that connection and disconnection of a pull-down resistor or a pull-up resistor are selectively performed. An embodiment according to the present invention corresponds to the first and third embodiments, and a sequence management circuit described in claims
In these embodiments, a CPU corresponds.

In the power down circuit configured as described above, when the supply of power to a certain function block is interrupted, the output of the function block or the input of the next function block is input from the sequence management circuit to the function block. A pull-down resistor or a pull-up resistor is connected by the control signal.
When power is supplied to a functional block whose power supply is cut off, the pull-down resistor or pull-up resistor connected to the output of that functional block or the input of the next-stage functional block is connected to the sequence management circuit. It is separated by the control signal from. When the input signal to the functional block is unstable, unnecessary power flows because unnecessary through current flows. Therefore, a countermeasure to connect a pull-down resistor or pull-up resistor and fix it to the ground level or power supply level is taken. Conversely, if a normal input signal is given while these resistors are connected, the amount of these resistors will be reduced. Only consume power. Therefore, by connecting the pull-down or pull-up resistor only when necessary by the sequence management circuit, unstable signal input can be avoided without consuming extra power.

According to a third aspect of the present invention, in the power down circuit according to the first aspect, the interface control circuit is controlled by a control signal from the sequence management circuit.
The configuration is such that the input signal to the functional block for interrupting the supply of power is fixed at the ground level. And
Embodiments according to the present invention correspond to the second and third embodiments, and the sequence management circuit described in the claims corresponds to a CPU in these embodiments.

In the power down circuit configured as described above, when the supply of power to a certain functional block is cut off, the interface control circuit that has received the control signal from the sequence management circuit receives an input signal to that functional block. To ground level. No power supply C
When a signal is supplied to an input terminal of a functional block including a MOS element, the protection diode of the CMOS element may be burned out by an excessive current. Usually, in the case of a system using different power supply systems, a current limiting resistor is inserted between the two power supply systems to prevent an excessive current from flowing. However, depending on the value of the resistance, a delay occurs in the signal, which may cause a problem when performing high-speed processing. Therefore, when the supply of power to a certain functional block is cut off as in the present invention, by fixing the input signal to that functional block to the ground level, there is no danger of excess current flowing in. The delay of the generated signal can be as short as about one stage of the logic circuit.

[0013]

Next, an embodiment will be described. First, a power-down circuit according to a first embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram showing the first embodiment, and FIG. 2 is a timing chart showing an outline of the operation of the power-down circuit according to the present embodiment. In FIG. 1, reference numerals 201 and 202 denote functional blocks that use independent power supplies. Reference numeral 206 denotes a power switch for supplying power to the function block 201;
The opening and closing are controlled by the PU 203. Reference numeral 207 denotes an interface control circuit. The interface control circuit 207 includes a switch 204 whose opening and closing are controlled by the CPU 203, and a pull-down resistor 205 connected when the switch 204 is closed. Also,
Reference numeral 208 denotes a current limiting resistor connected between the function blocks 201 and 202.

Next, the operation of the first embodiment configured as described above will be described. In the present embodiment,
It is assumed that the power supply to the functional block 201 is cut off.
When power is supplied to both the function block 201 and the function block 202, the switch 204 of the interface control circuit 207 is open, and the pull-down resistor 205 is disconnected as shown by reference numeral 220 in FIG. Then, when the CPU 203 determines that it is necessary to cut off the power supply to the functional block 201, the CPU 203 in FIG.
2, the switch 204 of the interface control circuit 207 is closed by the control signal 211, and the pull-down resistor 205 is connected as shown by reference numeral 222 in FIG. Thereafter, as shown by reference numeral 223 in FIG.
To open the power switch 206 and cut off the power supply to the functional block 201. At this time, the function block 201
Operation stops, so input terminal 20 of function block 202
Although 9 is unstable for a moment, it is immediately fixed to the ground level as indicated by reference numeral 227 in FIG. Therefore, unnecessary power consumption due to unnecessary through current due to an unstable input signal can be prevented.

When the CPU 203 determines that it is necessary to supply power to the functional block 201 again, the CPU 203 issues a control signal 210 as shown at 224 in FIG.
6 and close the control signal as shown by reference numeral 225 in FIG.
The switch 204 is opened by 211 and the pull-down resistor 205 is disconnected as indicated by 226. Pull-down resistor when both function blocks 201 and 202 are operating
When 205 is connected, the power consumption increases by the amount of current flowing through the pull-down resistor 205, but in the case of the present embodiment, since the pull-down resistor 205 is disconnected, the power consumption must be reduced by that amount. Can be.

As described above, by connecting the pull-down resistor only when necessary, the unstable output signal of the functional block whose power supply has been cut off can be supplied to the subsequent function without increasing the power consumption during normal operation. Input to the block can be avoided. In this embodiment, the connection and disconnection of the pull-down resistor are switched, but the connection and disconnection of the pull-up resistor may be switched. Although FIG. 1 shows that the interface control circuit 207 is separately disposed between the function block 201 and the function block 202, the interface control circuit 207 may be incorporated in the function block 201 or the function block 202. In this case, there is no need to configure the interface control circuit 207 with external components, so that
The mounting area can be reduced.

Next, a second embodiment of the present invention will be described. FIG. 3 is a circuit diagram showing the second embodiment of the present invention, and FIG. 4 is a timing chart showing an outline of the operation of the present embodiment. In FIG. 3, 301
, 302 are functional blocks using independent power supplies. A power switch 305 for supplying power to the function block 302 is controlled by the CPU 303 to open and close. Reference numeral 304 denotes an interface control circuit whose output is similarly controlled by a control signal from the CPU 303. The function block 302
For example, it is assumed that a device such as a CMOS inverter 311 is included, and the CMOS inverter 311 has a protection diode.
306, 307 and CMOS elements 308, 309. Reference numeral 312 denotes an input terminal of the functional block 302. The interface control circuit 304 is constituted by, for example, an AND gate 310.

Next, the operation of the second embodiment configured as described above will be described. In this embodiment, it is assumed that the power supply to the functional block 302 is cut off. When determining that it is necessary to cut off the power supply to the functional block 302, the CPU 303 in FIG.
As shown by 0, a ground level signal is input to the interface control circuit 304 as the control signal 313. Therefore, in this case, regardless of the level of the output of the functional block 301, the output signal of the interface control circuit 304 is at the ground level as indicated by reference numeral 321 in FIG. 4, and the input terminal 312 of the functional block 302 is grounded. A level signal is input. Thereafter, as indicated by reference numeral 322 in FIG.
305 is opened, and the supply of power to the function block 302 is cut off.

When the CPU 303 determines that it is necessary to supply power to the functional block 302 again, the CPU 303 outputs a power switch 30 according to a control signal 314 in FIG.
5 is closed, and a power supply level signal is input to the interface control circuit 304 as the control signal 313 as indicated by the reference numeral 324. Therefore, as indicated by reference numeral 325 in FIG. 4, the output signal from the functional block 301 is input to the input terminal 312 of the functional block 302 without being masked by the AND gate 310 constituting the interface control circuit 304.

When the power supply to the function block 302 is cut off while the power is supplied to the function block 301, the protection diode 306 or 307 may be burned out by an excessive current. In the case of, the input signal to the function block 302 in the state where the power supply to the function block 302 is shut off is always at the ground level,
There is no danger of excessive current flowing into the function block 302.

As described above, by fixing the input signal to the functional block for interrupting the supply of power to the ground level, it is possible to avoid burning of the protection diode. Further, compared with the case where a conventional current limiting resistor is inserted, a delay of about one logic circuit stage is required, which is advantageous in a system that performs high-speed processing. In this embodiment mode, an interface control circuit using an AND gate has been described. However, the interface control circuit can be configured using other logic elements. Although FIG. 3 shows that the interface control circuit 304 is separately disposed between the function block 301 and the function block 302, the interface control circuit 304 may be incorporated in the function block 301 or the function block 302. . In this case, since the interface control circuit 304 does not need to be formed by external components, the mounting area can be reduced.

Next, a third embodiment of the present invention will be described. FIG. 5 is a circuit diagram showing the third embodiment, and FIG. 6 is a timing chart showing an outline of the operation of the present embodiment. This embodiment is a combination of the first embodiment and the second embodiment, and is configured as follows. That is, in FIG.
Reference numerals 1 and 402 denote functional blocks composed of CMOS elements, 410 denotes a power supply for the functional block 401, and 411 denotes a power supply for the functional block 402. 404 and 405 are power switches, and these power switches 404 and 405 are
The opening and closing are controlled by the. Also, 406
, 407, 408, and 409 are interface control circuits between the functional blocks, which are also controlled by the CPU 403.

In this embodiment, the output of the function block 401 is the input of the function block 402 and the function block 40
The output of 2 is an input of the function block 401. In such a configuration, for example, when the power supply to the function block 401 is cut off, the input from the function block 401 to the function block 402 becomes unstable, and
The output from 402 is input to the function block 401 in a state where the power supply is cut off.

In the present embodiment, the following operation is performed. That is, when the supply of power to the functional block 401 is cut off, as indicated by reference numeral 420 in FIG.
U403 sends the control signal 413 to the interface control circuit 407.
And a pull-down resistor 412 is connected to the input of the functional block 402 as indicated by reference numeral 421 in FIG. Thereafter, as shown by reference numeral 422 in FIG.
2 output signal 415 (input signal of function block 401)
In FIG. 6, it is fixed to the ground level as indicated by reference numeral 423. In this case, the interface control circuit 408
Since the supply of power to the interface control circuit 408 is also cut off, the CPU 403 protects the interface control circuit 408 itself, as indicated by reference numeral 424 in FIG.
8 inputs a ground level signal as a control signal 416.
As a result, the supply of power to the functional block 401 can be cut off. Therefore, as shown by reference numeral 425 in FIG. Cut off. Thus, the input signal 418 to the function block 402 and the signal input from the function block 402 to the function block 401 (the output signal 415 of the interface control circuit 409) are
Fixed to ground level.

To supply power to the functional block 401 again, as shown by reference numeral 426 in FIG.
3 closes the power switch 404 by the control signal 417,
In FIG. 6, power supply level signals are input as control signals 414 and 416 to interface control circuits 408 and 409 as indicated by reference numerals 427 and 428, and a control signal 413 is output to an interface control circuit 407 as indicated by reference numeral 429 in FIG. To disconnect the pull-down resistor 412. Function block 401
When the supply of power to the interface control circuit 406 is cut off, the pull-down resistor 419 of the interface control circuit 406 has no particular problem in either state. A similar procedure is performed when power supply to the function block 402 is cut off.

As described above, the interface control circuit for controlling the input / output of each functional block is provided, and the control of those circuits and the control of the power supply to each functional block are performed by the CPU.
Thus, even when the supply of power to an arbitrary functional block is interrupted, protection of the CMOS element and low power consumption of the entire device can be guaranteed. In addition, by combining the first embodiment and the second embodiment, the current limiting resistor 208 in the first embodiment shown in FIG. 1 can be omitted, so that the mounting area can be reduced. In addition, signal delay can be suppressed, which is more effective.

In this embodiment, a pull-down resistor is used as one of the interface control circuits. However, the interface control circuit may be constituted by a pull-up resistor. Similarly, FIG. 5 shows an example in which the interface control circuits 408 and 409 are constituted by AND gates, but may be constituted by using other logic elements. In FIG. 5, the interface control circuits 406, 40
7, 408 and 409 are arranged separately between the function blocks 401 and 402, but they can be incorporated in the function blocks 401 and 402. In that case, since these circuits do not need to be configured with external components, the mounting area can be reduced.

[0028]

As described above, according to the first aspect, the sequence management circuit sequentially controls the supply of power to each functional block and the control of the interface control circuit. With such a configuration, it is possible to prevent an excessive current from flowing into a functional block in which power supply is cut off, and prevent an input to a next functional block from becoming unstable. According to the second aspect of the present invention, the interface control circuit is configured to selectively connect and disconnect the pull-down resistor or the pull-up resistor according to the control signal from the sequence management circuit. The unstable input signal can be avoided without consuming. Also,
According to the third aspect of the present invention, the interface control circuit is configured to fix the input signal to the functional block for shutting off the power supply to the ground level by the control signal from the sequence management circuit. Can be prevented from flowing in while an excessive current flows.

[Brief description of the drawings]

FIG. 1 is a circuit configuration diagram showing a first embodiment of a power-down circuit according to the present invention.

FIG. 2 is a timing chart for explaining the operation of the first embodiment shown in FIG.

FIG. 3 is a circuit configuration diagram showing a second embodiment of the present invention.

FIG. 4 is a timing chart for explaining the operation of the second embodiment shown in FIG. 3;

FIG. 5 is a circuit configuration diagram showing a third embodiment of the present invention.

FIG. 6 is a timing chart for explaining the operation of the third embodiment shown in FIG. 5;

FIG. 7 is a block diagram showing a configuration example of a conventional power down circuit.

FIG. 8 is a circuit configuration diagram illustrating a configuration example of an apparatus configured by a plurality of functional blocks including CMOS elements.

[Explanation of symbols]

 201,202 functional block 203 CPU 204 switch 205 pull-down resistor 206 power switch 207 interface control circuit 208 current limiting resistor 209 input terminal 301,302 functional block 303 CPU 304 interface control circuit 305 power switch 306,307 protection diode 308,309 CMOS element 310 AND gate 311 CMOS inverter 312 input Terminal 401,402 Function block 403 CPU 404,405 Power switch 406,407,408,409 Interface control circuit 410,411 Power supply 412,419 Pull down resistor

Claims (3)

[Claims] A power switch for controlling supply and cutoff of power to each of the functional blocks; and a power switch for controlling the supply and cutoff of power to each of the functional blocks. An interface control circuit for controlling an interface of the power supply switch, and a sequence management circuit for performing sequence management of the power switch and the interface control circuit. A power-down circuit configured to selectively perform the following. 2. The apparatus according to claim 1, wherein the interface control circuit selectively connects and disconnects a pull-down resistor or a pull-up resistor according to a control signal from the sequence management circuit. Item 1
A power down circuit as described. 3. The interface control circuit is configured to fix an input signal to a functional block for shutting off power supply to a ground level by a control signal from the sequence management circuit. Claim 1
A power down circuit as described.