JP2009060098A - Semiconductor device and method for manufacturing semiconductor device - Google Patents
Semiconductor device and method for manufacturing semiconductor device Download PDFInfo
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Abstract
【課題】p型化が容易で、且つ発光特性を損なわないZnO系の半導体素子及び半導体素子の製造方法を提供する。
【解決手段】MgxZn1-xO(0≦x<1)を主成分とする半導体層2を備え、半導体層2に含まれる不純物としてのマンガン(Mn)の濃度が1×1016cm-3以下である。
【選択図】図1Provided are a ZnO-based semiconductor element that can be easily made p-type and does not impair light emission characteristics, and a method for manufacturing the semiconductor element.
A semiconductor layer 2 mainly composed of Mg x Zn 1-x O (0 ≦ x <1) is provided, and the concentration of manganese (Mn) as an impurity contained in the semiconductor layer 2 is 1 × 10 16 cm. -3 or less.
[Selection] Figure 1
Description
本発明は、酸化亜鉛系の半導体素子に係り、特にアクセプタドーピングが行われる半導体素子及び半導体素子の製造方法に関する。 The present invention relates to a zinc oxide based semiconductor element, and more particularly to a semiconductor element in which acceptor doping is performed and a method for manufacturing the semiconductor element.
酸化亜鉛(ZnO)系の半導体は、ホールと電子の結合体である励起子の結合エネルギーが大きい(60meV)。このため、励起子が室温でも安定して存在でき、高効率で、かつ単色性に優れた光子の放出が可能である。そのため、照明やバックライト等の光源として用いられる発光ダイオード(LED)、高速電子デバイス、或いは表面弾性波デバイス等へのZnO系半導体の応用が進められている。ここで、「ZnO系」とは、ZnOをベースとした混晶材料であり、Zn(亜鉛)の一部をIIA族若しくはIIB族で置き換えたもの、O(酸素)の一部をVIB族で置き換えたもの、またはその両方の組み合わせを含むものをいう。 A zinc oxide (ZnO) based semiconductor has a large binding energy of excitons (60 meV) which is a combined body of holes and electrons. Therefore, excitons can exist stably even at room temperature, and photons can be emitted with high efficiency and excellent monochromaticity. For this reason, ZnO-based semiconductors are being applied to light emitting diodes (LEDs), high-speed electronic devices, surface acoustic wave devices, and the like that are used as light sources for illumination and backlights. Here, “ZnO-based” is a mixed crystal material based on ZnO, in which a part of Zn (zinc) is replaced with a group IIA or IIB, and a part of O (oxygen) is a group VIB. Includes replacements or combinations of both.
しかし、p型不純物を含む、例えばMgxZn1-xO(0≦x<1)からなるZnO系半導体をp型半導体として利用する場合には、ZnO系半導体にドープしたアクセプタドーパントの活性化が困難であり、p型のZnO系半導体を得ることが難しいという問題があった。技術の進歩により、p型のZnO系半導体を得ることができるようになり、発光も確認されるようになってきたが、これらではScAlMgO4という特殊な基板を使用しなければならない等の制約がある(例えば、非特許文献1、2参照。)。このため、ZnO基板上に形成されたp型のZnO系半導体膜を実現することが産業上望まれている。
しかしながら、ZnO基板を用いた場合にもp型のZnO系半導体を容易に得ることはできない。ZnO系半導体に発生した自由キャリアを捕獲する捕獲中心が存在する場合、この捕獲中心によりZnO系半導体のp型化が阻害される。一般に、遷移金属は半導体中で捕獲中心であることが多い。発明者らは金属材料を固くする目的でよく使われるマンガン(Mn)がZnO中によく取り込まれることを見出した。つまり、ZnO系半導体中のMn原子数が多い場合に、ZnO系半導体のp型化が困難であるという問題がある。更に、ZnO系半導体を発光層として使用した場合の発光特性や、キャリア輸送特性にも悪影響がある。 However, even when a ZnO substrate is used, a p-type ZnO-based semiconductor cannot be easily obtained. When there is a capture center that captures free carriers generated in the ZnO-based semiconductor, the capture center inhibits the ZnO-based semiconductor from becoming p-type. In general, transition metals are often trapping centers in semiconductors. The inventors have found that manganese (Mn), which is often used for the purpose of hardening a metal material, is often taken into ZnO. That is, when the number of Mn atoms in the ZnO-based semiconductor is large, there is a problem that it is difficult to make the ZnO-based semiconductor p-type. Furthermore, there are adverse effects on the light emission characteristics and carrier transport characteristics when a ZnO-based semiconductor is used as the light emitting layer.
上記問題点を鑑み、本発明は、p型化が容易で、且つ発光特性を損なわないZnO系の半導体素子及びその製造方法を提供することを目的とする。 In view of the above problems, an object of the present invention is to provide a ZnO-based semiconductor element that can be easily made p-type and does not impair the light emission characteristics, and a method for manufacturing the same.
本発明の一態様によれば、MgxZn1-xO(0≦x<1)を主成分とする半導体層を備え、半導体層に含まれる不純物としてのマンガンの濃度が1×1016cm-3以下である半導体素子が提供される。 According to one embodiment of the present invention, a semiconductor layer containing Mg x Zn 1-x O (0 ≦ x <1) as a main component is provided, and the concentration of manganese as an impurity contained in the semiconductor layer is 1 × 10 16 cm. A semiconductor element that is -3 or less is provided.
本発明の他の態様によれば、Mn濃度が5000ppm以下の材料からなる基板ホルダーに基板を搭載するステップと、基板ホルダーに搭載された基板上に、MgxZn1-xO(0≦x<1)からなる半導体層を結晶成長させるステップとを含む半導体素子の製造方法が提供される。 According to another aspect of the present invention, a step of mounting a substrate on a substrate holder made of a material having a Mn concentration of 5000 ppm or less, and Mg x Zn 1-x O (0 ≦ x) on the substrate mounted on the substrate holder. And a step of crystal-growing a semiconductor layer made of <1).
本発明によれば、p型化が容易で、且つ発光特性を損なわないZnO系の半導体素子及び半導体素子の製造方法を提供できる。 According to the present invention, it is possible to provide a ZnO-based semiconductor element that can be easily made p-type and does not impair light emission characteristics, and a method for manufacturing the semiconductor element.
次に、図面を参照して、本発明の実施の形態を説明する。以下の図面の記載において、同一又は類似の部分には同一又は類似の符号を付している。ただし、図面は模式的なものであり、厚みと平面寸法との関係、各層の厚みの比率等は現実のものとは異なることに留意すべきである。したがって、具体的な厚みや寸法は以下の説明を参酌して判断すべきものである。又、図面相互間においても互いの寸法の関係や比率が異なる部分が含まれていることは勿論である。 Next, embodiments of the present invention will be described with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, it should be noted that the drawings are schematic, and the relationship between the thickness and the planar dimensions, the ratio of the thickness of each layer, and the like are different from the actual ones. Therefore, specific thicknesses and dimensions should be determined in consideration of the following description. Moreover, it is a matter of course that portions having different dimensional relationships and ratios are included between the drawings.
又、以下に示す実施の形態は、この発明の技術的思想を具体化するための装置や方法を例示するものであって、この発明の技術的思想は、構成部品の材質、形状、構造、配置等を下記のものに特定するものでない。この発明の技術的思想は、特許請求の範囲において、種々の変更を加えることができる。 Further, the following embodiments exemplify apparatuses and methods for embodying the technical idea of the present invention, and the technical idea of the present invention is the material, shape, structure, The layout is not specified as follows. The technical idea of the present invention can be variously modified within the scope of the claims.
本発明の実施の形態に係る半導体素子は、図1に示すように、MgxZn1-xO(0≦x<1)を主成分とする半導体層2を備え、半導体層2に不純物として含まれるマンガン(Mn)の濃度が1×1016cm-3以下である。半導体層2は、意図しない不純物を除けば、アンドープのMgxZn1-xO、或いは、n型不純物若しくはp型不純物を含むMgxZn1-xOからなる。 As shown in FIG. 1, the semiconductor element according to the embodiment of the present invention includes a semiconductor layer 2 mainly composed of Mg x Zn 1-x O (0 ≦ x <1), and the semiconductor layer 2 has impurities as impurities. The concentration of manganese (Mn) contained is 1 × 10 16 cm −3 or less. The semiconductor layer 2 is made of undoped Mg x Zn 1-x O or Mg x Zn 1-x O containing n-type impurities or p-type impurities except for unintended impurities.
半導体層2に含まれるp型不純物は半導体層2にアクセプタドーピングされた不純物であり、例えば窒素(N)、銅(Cu)、リン(P)等が採用可能である。半導体層2に含まれるn型不純物には、例えばアルミニウム(Al)、ガリウム(Ga)等のIII族半導体等が採用可能である。 The p-type impurity contained in the semiconductor layer 2 is an impurity doped in the semiconductor layer 2, and for example, nitrogen (N), copper (Cu), phosphorus (P), or the like can be used. As the n-type impurity contained in the semiconductor layer 2, for example, a group III semiconductor such as aluminum (Al) or gallium (Ga) can be employed.
半導体層2は、基板1の基板主面111上に配置される。基板1は、例えばMgyZn1-yO(0≦y<1)等が採用可能である。ZnO系半導体は、窒化ガリウム(GaN)等と同様に、ウルツァイトと呼ばれる六方晶構造を有する。したがって、基板1及び半導体層2の結晶構造は六方晶系される。ここで、基板主面111はc面とする。そのため、基板主面111上にMgxZn1-xOを成長して形成される半導体層2の主面はc面となる。図2に、六方晶の結晶構造を示す。図2は、六方晶の結晶構造のユニットセルを示す模式図である。 The semiconductor layer 2 is disposed on the substrate main surface 111 of the substrate 1. As the substrate 1, for example, Mg y Zn 1-y O (0 ≦ y <1) can be adopted. A ZnO-based semiconductor has a hexagonal crystal structure called wurzeite, like gallium nitride (GaN). Therefore, the crystal structures of the substrate 1 and the semiconductor layer 2 are hexagonal. Here, the substrate main surface 111 is a c-plane. Therefore, the main surface of the semiconductor layer 2 formed by growing Mg x Zn 1-x O on the substrate main surface 111 is a c-plane. FIG. 2 shows a hexagonal crystal structure. FIG. 2 is a schematic diagram showing a unit cell having a hexagonal crystal structure.
図2に示すように、六方晶系のc軸(0001)は六角柱の軸方向に延伸し、このc軸を法線とする面(六角柱の頂面)がc面{0001}である。c面は、+c軸側と−c軸側とで異なる性質を示し、極性面(Polar Plane)と呼ばれる。六方晶構造の結晶では、分極方向がc軸に沿っている。 As shown in FIG. 2, the hexagonal c-axis (0001) extends in the axial direction of the hexagonal column, and the plane (the top surface of the hexagonal column) having the c-axis as a normal is the c-plane {0001}. . The c-plane shows different properties on the + c-axis side and the −c-axis side and is called a polar plane. In a hexagonal crystal, the polarization direction is along the c-axis.
六方晶系においては、六角柱の側面がそれぞれm面{1−100}であり、隣り合わない一対の稜線を通る面がa面{11−20}である。m面やa面は、c面に対して垂直な結晶面であり、分極方向に対して直交しているため、極性のない平面、すなわち、非極性面(Nonpolar Plane)である。 In the hexagonal system, the side surfaces of the hexagonal columns are each m-plane {1-100}, and the plane passing through a pair of ridge lines that are not adjacent to each other is the a-plane {11-20}. The m-plane and the a-plane are crystal planes perpendicular to the c-plane and are orthogonal to the polarization direction, and thus are nonpolar planes, that is, nonpolar planes.
半導体層2のMnの濃度、二次イオン強度は、例えば四重極型質量分析を用いた2次イオン質量分析(SIMS)によって測定される。図3に、四重極型質量分析を用いてSIMSを行う装置の構成例を示す。一次イオンが照射された固体試料50から、スパッタリング現象により固体試料を構成する物質が真空中に放出される。放出された物質は、磁場を通過することで特定質量の二次イオンのみが四重極分析計60を通過して検出器70に入射され、元素分析が行われる。四重極型質量分析を使用したSIMSの場合、固体試料を設置する試料台の電位は通常接地されるため、一次イオン引き出しエネルギーがそのまま入射エネルギーとなる。このため、高い深さ分解能が要求される場合に、一次イオンの加速エネルギーを極限まで低くして分析することが可能である。 The concentration of Mn and the secondary ion intensity of the semiconductor layer 2 are measured by, for example, secondary ion mass spectrometry (SIMS) using quadrupole mass spectrometry. FIG. 3 shows a configuration example of an apparatus that performs SIMS using quadrupole mass spectrometry. From the solid sample 50 irradiated with the primary ions, substances constituting the solid sample are released into the vacuum by a sputtering phenomenon. The emitted substance passes through a magnetic field, so that only secondary ions of a specific mass pass through the quadrupole analyzer 60 and enter the detector 70 for elemental analysis. In SIMS using quadrupole mass spectrometry, the potential of the sample stage on which the solid sample is placed is normally grounded, so that the primary ion extraction energy becomes the incident energy as it is. For this reason, when high depth resolution is required, analysis can be performed with the acceleration energy of the primary ions as low as possible.
既に説明したように、自由キャリアを捕獲する捕獲中心となるMn原子が半導体層2に多く含まれる場合、半導体層2のp型化が阻害される。そのため、半導体層2に含まれるMnの原子数を抑制することにより、半導体層2のp型化が容易になる。 As already described, when the semiconductor layer 2 contains a large amount of Mn atoms serving as trapping centers for capturing free carriers, the p-type conversion of the semiconductor layer 2 is inhibited. Therefore, by suppressing the number of Mn atoms contained in the semiconductor layer 2, the semiconductor layer 2 can be easily made p-type.
現在、MgxZn1-xO膜を含むZnO系半導体膜を高純度に形成するために、分子線エピタキシー(MBE)法を採用するのが一般的である。MBE法は、原料として元素材料を使用するため、化合物材料を使用する有機金属気相成長(MOCVD)法に比べて、原料の時点での純度を上げることができる。 Currently, in order to form a ZnO-based semiconductor film including a Mg x Zn 1-x O film with high purity, a molecular beam epitaxy (MBE) method is generally employed. Since the MBE method uses an elemental material as a raw material, the purity at the time of the raw material can be increased as compared with a metal organic chemical vapor deposition (MOCVD) method using a compound material.
本発明の実施の形態に係る半導体素子を形成するMBE法に使用可能な薄膜形成装置の例を図4に示す。図4に示す薄膜形成装置は、基板1を加熱する加熱源10、基板1を保持する基板ホルダー20、基板1上に形成する半導体層2の原料を供給するセル11及びセル12を備える。加熱源10には、赤外線ランプ等が採用可能である。 FIG. 4 shows an example of a thin film forming apparatus that can be used in the MBE method for forming a semiconductor element according to an embodiment of the present invention. The thin film forming apparatus shown in FIG. 4 includes a heating source 10 for heating the substrate 1, a substrate holder 20 for holding the substrate 1, and a cell 11 and a cell 12 for supplying a raw material for the semiconductor layer 2 formed on the substrate 1. An infrared lamp or the like can be used as the heating source 10.
図4に示した例では、セル11から亜鉛(Zn)が供給される。セル12はラジカル発生器であり、ZnO膜等の気体元素を含む化合物の結晶成長についてMBE法を適用する場合に使用される。ラジカル発生器は、通常、PBN(pyrolytic boron nitiride)や石英からなる放電管121の外側周囲を高周波コイル122が取り巻いた構造であり、高周波コイル122は高周波電源(不図示)に接続する。図4に示した例では、セル12内部に供給された酸素(O)に高周波コイル122によって高周波電圧(電界)が印加されてプラズマが発生し、プラズマ粒子(O*)がセル12から供給される。 In the example shown in FIG. 4, zinc (Zn) is supplied from the cell 11. The cell 12 is a radical generator and is used when the MBE method is applied to crystal growth of a compound containing a gas element such as a ZnO film. The radical generator usually has a structure in which a high-frequency coil 122 surrounds the outer periphery of a discharge tube 121 made of PBN (pyrolytic boron initiator) or quartz, and the high-frequency coil 122 is connected to a high-frequency power source (not shown). In the example shown in FIG. 4, a high frequency voltage (electric field) is applied to oxygen (O) supplied into the cell 12 by the high frequency coil 122 to generate plasma, and plasma particles (O *) are supplied from the cell 12. The
基板ホルダー20の材料には、一般的に、耐熱性や耐酸化性に優れたニッケル(Ni)ベースの合金であるインコネルや、セラミック等が採用可能である。結晶成長装置の基板ホルダーに使用されることの多いステンレス鋼(SUS)材は、ZnO等の酸化物結晶成長においては高温化で腐食するため、本発明の実施の形態に係る半導体素子を形成するMBE法では使用できない。インコネルには多数の種類があるが、鉄(Fe)が主体のSUSと異なり、Niが主体であることが共通しており、Mn、アルミニウム(Al)、クロム(Cr)、Fe等とNiとの合金である。ただし、基板ホルダー20に含まれるMnが結晶成長時に半導体層2に混入して半導体層2のp型化を阻害することを防止するため、以下に説明するように基板ホルダー20に使用するインコネルの材料には注意が必要である。 As the material of the substrate holder 20, inconel, which is a nickel (Ni) -based alloy having excellent heat resistance and oxidation resistance, ceramic, and the like can be generally used. A stainless steel (SUS) material often used for a substrate holder of a crystal growth apparatus corrodes at a high temperature during growth of an oxide crystal such as ZnO, and thus forms a semiconductor element according to an embodiment of the present invention. It cannot be used with the MBE method. There are many types of Inconel, but unlike SUS mainly composed of iron (Fe), Ni is mainly composed of Mn, aluminum (Al), chromium (Cr), Fe, etc., and Ni. Alloy. However, in order to prevent Mn contained in the substrate holder 20 from being mixed into the semiconductor layer 2 during crystal growth and hindering the p-type of the semiconductor layer 2, the Inconel used for the substrate holder 20 as described below is used. Care should be taken with the material.
図5(a)〜図5(d)に、インコネル板を大気中で1000℃に熱して表面が黒くなるまで酸化させた後、その断面を走査型電子顕微鏡とエネルギー分散型X線分析装置を組み合わせたSEM−EDXで観測した結果を示す。図5(a)〜図5(d)は、インコネル板断面の酸素(O)、Cr、Mn、Niの各元素をそれぞれ示したものであり、各図の上側がインコネル板の表面である。図5(a)〜図5(d)に示すように、酸化されたCrとMnがインコネル板の表面に存在している。Cr酸化物が非常に昇華しにくい材料であるのに対し、Mn酸化物は昇華しやすい材料である。 5 (a) to 5 (d), after the Inconel plate is heated to 1000 ° C. in the atmosphere to oxidize it until the surface becomes black, the cross section is shown with a scanning electron microscope and an energy dispersive X-ray analyzer. The result observed by combined SEM-EDX is shown. FIGS. 5A to 5D show oxygen (O), Cr, Mn, and Ni elements in the Inconel plate cross section, and the upper side of each drawing is the surface of the Inconel plate. As shown in FIGS. 5A to 5D, oxidized Cr and Mn are present on the surface of the Inconel plate. While Cr oxide is a material that is very difficult to sublimate, Mn oxide is a material that is easily sublimated.
図6(a)及び図6(b)に、Mnを含むインコネルを基板ホルダー20に採用した薄膜形成装置を用いてZnOからなる基板1上にMgZnOからなる半導体層2を形成し、この半導体層2の元素濃度及び2次イオン強度を、四重極型質量分析を用いたSIMSによって測定した結果の例を示す。図6(a)は、加熱源10として用いたヒータの入力電力を740Wとして、基板ホルダー20の温度が1043℃であった場合の分析結果である。図6(b)は、ヒータの入力電力を510Wとして、基板ホルダー20の温度が860℃であった場合の分析結果である。図6(a)、図6(b)において、グラフ右端側のMgの2次イオン強度が低い領域がZnO基板のデータである。図6(a)、図6(b)のいずれの場合も、基板1と半導体層2との間にMnが高濃度で存在している。そして、ヒータの入力電力が高く、基板ホルダー20が高温になるほど、半導体層2中のMn濃度が高い。薄膜形成装置では、基板ホルダー20が基板1の最も近くに存在する。このため、基板ホルダー20からMnが基板1に供給されると考えられる。 6A and 6B, a semiconductor layer 2 made of MgZnO is formed on a substrate 1 made of ZnO by using a thin film forming apparatus employing Inconel containing Mn for the substrate holder 20, and this semiconductor layer The example of the result of having measured the elemental density | concentration of 2 and secondary ion intensity | strength by SIMS using quadrupole mass spectrometry is shown. FIG. 6A shows the analysis result when the input power of the heater used as the heating source 10 is 740 W and the temperature of the substrate holder 20 is 1043 ° C. FIG. 6B shows an analysis result when the heater input power is 510 W and the temperature of the substrate holder 20 is 860 ° C. In FIG. 6A and FIG. 6B, the region where the secondary ion intensity of Mg on the right end side of the graph is low is the data of the ZnO substrate. 6A and 6B, Mn is present between the substrate 1 and the semiconductor layer 2 at a high concentration. And the Mn density | concentration in the semiconductor layer 2 is so high that the input electric power of a heater is high and the substrate holder 20 becomes high temperature. In the thin film forming apparatus, the substrate holder 20 exists closest to the substrate 1. For this reason, it is considered that Mn is supplied from the substrate holder 20 to the substrate 1.
図6(a)及び図6(b)において、基板1との界面と比べて成膜中のMn濃度が低いのは、酸素が供給されている状態ではMn酸化物が昇華されにくいためと考えられる。基板1は、水分等を除去するために、基板ホルダー20に保持された状態で、成膜前に真空中で結晶成長温度より高い温度でアニールされる。そのため、このアニール時に基板ホルダー20の表面のMn酸化物が昇華して、基板1の表面に付着すると考えられる。 6A and 6B, the Mn concentration during film formation is lower than that at the interface with the substrate 1 because the Mn oxide is not easily sublimated in the state where oxygen is supplied. It is done. In order to remove moisture and the like, the substrate 1 is annealed at a temperature higher than the crystal growth temperature in a vacuum before film formation while being held by the substrate holder 20. Therefore, it is considered that Mn oxide on the surface of the substrate holder 20 is sublimated during the annealing and adheres to the surface of the substrate 1.
以上に説明したように、図5(a)〜図5(d)及び図6(a)〜図6(b)から、Mnを含むインコネルを図4に示した薄膜形成装置の基板ホルダー20に採用して基板1上にZnO系半導体からなる半導体層2を結晶成長させる場合に、基板ホルダー20から半導体層2にMnが意図しない不純物として供給されることが明らかとなった。 As described above, from FIG. 5 (a) to FIG. 5 (d) and FIG. 6 (a) to FIG. 6 (b), inconel containing Mn is applied to the substrate holder 20 of the thin film forming apparatus shown in FIG. It has been clarified that when the semiconductor layer 2 made of a ZnO-based semiconductor is grown on the substrate 1 by adopting it, Mn is supplied from the substrate holder 20 to the semiconductor layer 2 as an unintended impurity.
Mnが混入したZnO膜ではキャリアが欠乏し、且つ、通常は150cm2/Vs程度のキャリア移動度が数十cm2/Vs程度に低下する。図7(a)、図7(b)に、Mn不純物濃度が異なる、ZnO基板上の半導体層2を積層したサンプルの室温フォトルミネセンス(PL)積分強度を比較する。ここでいうPL積分強度とは、340nm〜420nmの範囲でPL強度を積分した室温での積分強度である。図7(a)はPL積分強度が1700のサンプルの、図7(b)はPL積分強度が8300のサンプルの、Mnの二次イオン強度とAl濃度を示す。図7(a)、図7(b)から、Mnの二次イオン強度が小さいほど、PL積分強度が大きいことがわかる。つまり、半導体層2のMnの二次イオン強度が大きいほど、発光特性が低下する。 In the ZnO film mixed with Mn, carriers are deficient, and the carrier mobility of about 150 cm 2 / Vs is usually reduced to about several tens of cm 2 / Vs. FIG. 7A and FIG. 7B compare room temperature photoluminescence (PL) integrated intensities of samples in which the semiconductor layers 2 on the ZnO substrate having different Mn impurity concentrations are stacked. The PL integrated intensity here is an integrated intensity at room temperature obtained by integrating the PL intensity in the range of 340 nm to 420 nm. FIG. 7A shows the secondary ion intensity and Al concentration of Mn of a sample with a PL integrated intensity of 1700, and FIG. 7B shows the sample with a PL integrated intensity of 8300. From FIG. 7A and FIG. 7B, it can be seen that the PL integrated intensity increases as the secondary ion intensity of Mn decreases. That is, as the secondary ion intensity of Mn of the semiconductor layer 2 is increased, the light emission characteristics are degraded.
以上に示したような、Mnが多く混入したZnO膜ほどキャリア移動度や発光特性が低下することは、Mnが自由キャリアの捕獲中心になっていることを示している。したがって、アンドープ、n型、p型のZnO系半導体の発光特性やキャリア輸送特性を劣化させないため、及びZnO系半導体のp型化のためには、ZnO系半導体が含有するMn数が少ないほど好ましい。 As described above, the lower the carrier mobility and the light emission characteristics of the ZnO film mixed with a larger amount of Mn, it is indicated that Mn is a free carrier trapping center. Therefore, in order not to deteriorate the light emission characteristics and carrier transport characteristics of undoped, n-type, and p-type ZnO-based semiconductors and to make the ZnO-based semiconductors p-type, it is preferable that the number of Mn contained in the ZnO-based semiconductor is smaller. .
含有するMn数が抑制されたZnO系半導体からなる半導体層2は、シリコンカーバイト(SiC)等のセラミックからなる基板ホルダー20を採用することで、実現可能である。図8に、基板ホルダー20にSiCを採用した薄膜形成装置によって図1に示した半導体素子を形成し、四重極型質量分析を用いたSIMSによって半導体層2の2次イオン強度を測定した結果の例を示す。図8に示すように、半導体素子には炭素(C)、シリコン(Si)及び水素(H)が存在するが、Mn濃度は1×1016cm-3以下である。更に、図6(a)及び図6(b)の場合のような基板1と半導体層2との間にMnが高濃度で存在するという現象もみられない。つまり、SiCからなる基板ホルダー20を採用することで、半導体層2のp型化が容易である。 The semiconductor layer 2 made of a ZnO-based semiconductor in which the number of Mn contained is suppressed can be realized by employing a substrate holder 20 made of ceramic such as silicon carbide (SiC). FIG. 8 shows the result of forming the semiconductor element shown in FIG. 1 with a thin film forming apparatus employing SiC on the substrate holder 20 and measuring the secondary ion intensity of the semiconductor layer 2 by SIMS using quadrupole mass spectrometry. An example of As shown in FIG. 8, carbon (C), silicon (Si), and hydrogen (H) are present in the semiconductor element, but the Mn concentration is 1 × 10 16 cm −3 or less. Further, the phenomenon that Mn exists at a high concentration between the substrate 1 and the semiconductor layer 2 as in the case of FIGS. 6A and 6B is not observed. That is, by adopting the substrate holder 20 made of SiC, the semiconductor layer 2 can be easily made p-type.
或いは、インコネルの耐熱性、耐酸化性の要因であるNiからなる基板ホルダー20を採用することで、含有するMn数が抑制された半導体層2を実現可能である。図5(d)に示したように、インコネル中のNiはほとんど酸化されない。図9に、Niからなる基板ホルダー20を採用した薄膜形成装置によって図1に示した半導体素子を形成し、四重極型質量分析を用いたSIMSによって半導体層2に含まれる元素の濃度、2次イオン強度を測定した結果の例を示す。図9中のMgの2次イオン強度は、基板1と半導体層2との境界を示すマーカーの役目を果たす。図9に示すように、Mn濃度は1×1016cm-3以下である。更に、図6(a)及び図6(b)の場合のような基板1と半導体層2との間にMnが高濃度で存在するという現象もみられない。このため、半導体層2のp型化が容易である。 Alternatively, it is possible to realize the semiconductor layer 2 in which the number of contained Mn is suppressed by employing the substrate holder 20 made of Ni which is a factor of heat resistance and oxidation resistance of Inconel. As shown in FIG. 5D, Ni in Inconel is hardly oxidized. In FIG. 9, the semiconductor element shown in FIG. 1 is formed by a thin film forming apparatus employing a substrate holder 20 made of Ni, and the concentration of elements contained in the semiconductor layer 2 is 2 by SIMS using quadrupole mass spectrometry. The example of the result of having measured the next ionic strength is shown. The secondary ion intensity of Mg in FIG. 9 serves as a marker indicating the boundary between the substrate 1 and the semiconductor layer 2. As shown in FIG. 9, the Mn concentration is 1 × 10 16 cm −3 or less. Further, the phenomenon that Mn exists at a high concentration between the substrate 1 and the semiconductor layer 2 as in the case of FIGS. 6A and 6B is not observed. For this reason, it is easy to make the semiconductor layer 2 p-type.
本発明の実施の形態に係る半導体素子では、半導体層2に意図しない不純物として含まれるMn原子数が抑制され、四重極型質量分析を用いたSIMSによって測定されるMn濃度は1×1016cm-3以下である。つまり、半導体層2には自由キャリアを捕獲する捕獲中心となるMnが少ないため、窒素等のアクセプタドーピングによって容易に半導体層2のp型化ができる。そして、Mnを含まないアンドープ、n型或いはp型化された半導体層2を用いて、照明、バックライト等の光源として使用される紫外LED、ZnOを使用した高速電子デバイス、表面弾性波デバイス等が実現可能である。 In the semiconductor element according to the embodiment of the present invention, the number of Mn atoms contained as unintended impurities in the semiconductor layer 2 is suppressed, and the Mn concentration measured by SIMS using quadrupole mass spectrometry is 1 × 10 16. cm −3 or less. That is, since the semiconductor layer 2 has a small amount of Mn serving as a trapping center for capturing free carriers, the semiconductor layer 2 can be easily made p-type by acceptor doping such as nitrogen. And, using an undoped, n-type or p-type semiconductor layer 2 that does not contain Mn, an ultraviolet LED used as a light source for illumination, backlight, etc., a high-speed electronic device using ZnO, a surface acoustic wave device, etc. Is feasible.
以下に、Niからなる基板ホルダー20を採用した薄膜形成装置を用いた図1に示した半導体素子の製造方法を説明する。なお、以下に述べる半導体素子の製造方法は一例であり、この変形例を含めて、これ以外の種々の製造方法により実現可能であることは勿論である。ここで、基板ホルダー20のMn濃度は3000ppm以下である。 Hereinafter, a method of manufacturing the semiconductor element shown in FIG. 1 using a thin film forming apparatus employing a substrate holder 20 made of Ni will be described. The semiconductor device manufacturing method described below is merely an example, and it is needless to say that the present invention can be realized by various other manufacturing methods including this modification. Here, the Mn concentration of the substrate holder 20 is 3000 ppm or less.
(イ)+c面を主面とする、例えばZnOからなる基板1を塩酸でエッチングし、純水洗浄した後、ドライ窒素で乾燥させる。 (A) A substrate 1 having a + c plane as a main surface, for example, made of ZnO is etched with hydrochloric acid, washed with pure water, and then dried with dry nitrogen.
(ロ)基板1を基板ホルダー20にセットし、ロードロックから薄膜形成装置に入れる。 (B) The substrate 1 is set on the substrate holder 20 and is put into the thin film forming apparatus from the load lock.
(ハ)1×10-7Pa程度の真空中で、900℃、30分の条件で基板1を加熱する。 (C) The substrate 1 is heated at 900 ° C. for 30 minutes in a vacuum of about 1 × 10 −7 Pa.
(ニ)基板温度を800℃まで下げ、NOガス、O2ガスをセル12に供給してプラズマを発生させ、予め所望の組成になるように調整したMg、Znと共にプラズマを供給して基板1上にMgxZn1-xOからなる半導体層2を成長させる。 (D) The substrate temperature is lowered to 800 ° C., NO gas and O 2 gas are supplied to the cell 12 to generate plasma, and the plasma is supplied together with Mg and Zn adjusted to have a desired composition in advance. A semiconductor layer 2 made of Mg x Zn 1-x O is grown thereon.
(ホ)その後、半導体層2にp型不純物をドープする。例えば、p型不純物として窒素を採用したアクセプタドーピングを行う。 (E) Thereafter, the semiconductor layer 2 is doped with a p-type impurity. For example, acceptor doping using nitrogen as a p-type impurity is performed.
上記の説明では、Niからなる基板ホルダー20を採用する例を示したが、Mn濃度が、結晶成長中に半導体素子にMnが混入しない程度、例えば5000ppm以下、好ましくは3000ppm以下の金属或いはセラミックからなる基板ホルダー20であれば、本発明の実施の形態に係る半導体素子の製造に採用可能である。例えば、SiCからなる基板ホルダー20等が採用可能である。 In the above description, the example in which the substrate holder 20 made of Ni is employed has been shown. However, the Mn concentration is such that Mn is not mixed into the semiconductor element during crystal growth, for example, 5000 ppm or less, preferably 3000 ppm or less. The substrate holder 20 can be used for manufacturing a semiconductor device according to the embodiment of the present invention. For example, a substrate holder 20 made of SiC or the like can be used.
上記に説明した方法で製造したMgZnOの窒素ドープ量が5×1018cm-3程度の場合に、ZnO上にMgZnOとシリコン酸化膜(SiO2)を積層したMOS構造のCV測定によって測定したアクセプタ濃度(NA)とドナー濃度(ND)との濃度差「NA−ND」の値は、6×1015原子/cm3〜2×1016原子/cm3程度で安定している。一方、Mnを含むインコネルを基板ホルダー20に採用した薄膜形成装置によって製造したMgZnOを含む上記MOS構造では、CV測定によって測定される濃度差「NA−ND」の値が1×1013原子/cm3〜1×1014原子/cm3程度であり、明らかにキャリア欠乏が生じており、MgZnO中に捕獲中心があると考えられる。 Acceptor measured by CV measurement of a MOS structure in which MgZnO and a silicon oxide film (SiO 2 ) are stacked on ZnO when the amount of nitrogen doped MgZnO produced by the method described above is about 5 × 10 18 cm −3. The value of the concentration difference “N A −N D ” between the concentration (N A ) and the donor concentration (N D ) is stable at about 6 × 10 15 atoms / cm 3 to 2 × 10 16 atoms / cm 3 . . On the other hand, in the above MOS structure containing MgZnO manufactured by a thin film forming apparatus employing Inconel containing Mn for the substrate holder 20, the concentration difference “N A −N D ” measured by CV measurement is 1 × 10 13 atoms. / Cm 3 to about 1 × 10 14 atoms / cm 3 , clearly carrier deficiency occurs, and it is considered that there is a trap center in MgZnO.
以上に説明したように、本発明の実施の形態に係る半導体素子の製造方法によれば、Mnを含まない或いはMn濃度の低い基板ホルダー20を採用した薄膜形成装置を使用することにより、意図しない不純物として含まれるMn濃度が1×1016cm-3以下に抑制された半導体層2を有する半導体素子を製造できる。この半導体層2は、自由キャリアを捕獲する捕獲中心となるMnが少ないため、窒素等のアクセプタドーピングによるp型化が容易である。 As described above, according to the method of manufacturing a semiconductor device according to the embodiment of the present invention, it is not intended by using the thin film forming apparatus that employs the substrate holder 20 that does not contain Mn or has a low Mn concentration. A semiconductor element having the semiconductor layer 2 in which the Mn concentration contained as an impurity is suppressed to 1 × 10 16 cm −3 or less can be manufactured. Since the semiconductor layer 2 has a small amount of Mn serving as a capture center for trapping free carriers, it can be easily made p-type by acceptor doping such as nitrogen.
本発明では、ZnO系半導体のp型化を阻害する捕獲中心となるMnが基板ホルダー20から半導体素子に供給されることを明らかにし、Mnを含まない、若しくは含まれるMnが少ない基板ホルダー20を採用することで、容易にp型化ができる半導体素子を実現できることを示した。 In the present invention, it is clarified that Mn serving as a capture center that inhibits the p-type ZnO-based semiconductor is supplied from the substrate holder 20 to the semiconductor element, and the substrate holder 20 that does not contain Mn or contains less Mn. It has been shown that a semiconductor device that can be easily made p-type can be realized by adopting it.
上記のように、本発明は実施の形態によって記載したが、この開示の一部をなす論述及び図面はこの発明を限定するものであると理解すべきではない。この開示から当業者には様々な代替実施の形態、実施例及び運用技術が明らかとなろう。即ち、本発明はここでは記載していない様々な実施の形態等を含むことは勿論である。したがって、本発明の技術的範囲は上記の説明から妥当な特許請求の範囲に係る発明特定事項によってのみ定められるものである。 As described above, the present invention has been described according to the embodiment. However, it should not be understood that the description and drawings constituting a part of this disclosure limit the present invention. From this disclosure, various alternative embodiments, examples, and operational techniques will be apparent to those skilled in the art. That is, it goes without saying that the present invention includes various embodiments not described herein. Accordingly, the technical scope of the present invention is defined only by the invention specifying matters according to the scope of claims reasonable from the above description.
1…基板
2…半導体層
10…加熱源
11、12…セル
20…基板ホルダー
50…固体試料
60…四重極分析計
70…検出器
111…基板主面
121…放電管
122…高周波コイル
DESCRIPTION OF SYMBOLS 1 ... Substrate 2 ... Semiconductor layer 10 ... Heat source 11, 12 ... Cell 20 ... Substrate holder 50 ... Solid sample 60 ... Quadrupole analyzer 70 ... Detector 111 ... Substrate main surface 121 ... Discharge tube 122 ... High frequency coil
Claims (5)
前記基板ホルダーに搭載された前記基板上に、MgxZn1-xO(0≦x<1)からなる半導体層を結晶成長させるステップ
とを含むことを特徴とする半導体素子の製造方法。 Mounting a substrate on a substrate holder made of a material having a manganese concentration of 5000 ppm or less;
Crystal growth of a semiconductor layer made of Mg x Zn 1-x O (0 ≦ x <1) on the substrate mounted on the substrate holder.
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| JP (1) | JP2009060098A (en) |
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| CN105951045A (en) * | 2016-06-01 | 2016-09-21 | 深圳大学 | Cubic-structured MgZnO film and preparation method thereof, ultraviolet detector and preparation method thereof |
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| CN101821865A (en) | 2010-09-01 |
| US20120181531A1 (en) | 2012-07-19 |
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