JP2008034475A - Method for manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To quickly estimate with high accuracy thickness or resistance value of an unwanted film remaining on the bottom surface of a contact hole in the manufacturing steps of a semiconductor device. <P>SOLUTION: Relationship is acquired previously between potential contrast of a contract hole 7 at an artificial defective part 4 of a standard sample 1 for test and thickness or resistance value of an artificial remaining film 8 formed at the bottom surface of the contact hole 7, by constituting the contact hole 7 of the standard sample 1 for test with a material and a structure almost identical to that of the contact hole of a test object, and by measuring the potential contrast of a secondary electron image of the standard sample 1 for test with radiation of an electron beam. Thereafter, thickness or resistance value of the unwanted film remaining at the bottom surface of the contact hole of the test object is estimated by measuring potential contrast of the secondary electron image of the test object, by radiating the electron beam to the contact hole as the test object, and then comparing the potential contrast of the standard sample 1 for test with potential contrast of the test object. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor device manufacturing technique, and more particularly to a technique that is effective when applied to a method for detecting the thickness of an unnecessary remaining film remaining on the bottom surface of a contact hole formed in a semiconductor device.

  Means for detecting a secondary signal generated from the sample surface on the electron source side from the objective lens; means for applying a negative voltage to the sample to generate a deceleration electric field for the primary electron beam between the sample and the objective lens; That automatically controls the voltage application of the sample during sample mounting and replacement by providing a scanning electron microscope with a means to control the negative voltage application to the sample in conjunction with the preparatory action during sample mounting and replacement Is described in JP-A-6-139985 (Patent Document 1).

  Also, in the defect inspection device, the parameters are optimized to optimize the uniformity and contrast of the forming screen, and before the partial area on the substrate is imaged, the adverse effect of charging in the surrounding area of the image forming area is reduced. A technique for improving the accuracy of defect detection by performing averaging processing on a plurality of images in an imaging area formed by erasing or reducing and alternately charging a surrounding area and forming an image from an image forming area No. 2000-208085 (Patent Document 2).

In addition, a pseudo-residual film having a known thickness and a resin film obtained by curing a photosensitive resin are sequentially stacked on a support substrate, and secondary electrons in a contact hole of a standard sample provided with an opening penetrating the resin film. Japanese Patent Laid-Open No. 2000-164715 (Patent Document 3) discloses a method for evaluating the remaining film thickness on the bottom surface of a defective contact hole by comparing the contrast of the image with the contrast of the secondary electron image of the contact hole to be inspected. It is disclosed.
JP-A-6-139985 (paragraphs [0027] to [0028], FIG. 1) JP 2000-208085 (paragraphs [0010] to [0011]) JP 2000-164715 A (paragraphs [0049] to [0051], [0062] to [0065], FIG. 1)

  Along with miniaturization of semiconductor devices, contact holes formed in the semiconductor devices have a problem of non-conducting defects due to an unnecessary film such as an insulating film remaining on the bottom surface. In order to take countermeasures at an early stage for manufacturing processes, for example, film formation processes and dry etching processes, it is desired to inspect the state of contact hole opening immediately after the contact hole is formed. Inspection methods have been proposed. For example, in the contact hole inspection method described in Patent Document 3 above, a standard sample for contact hole inspection is prepared, and an unnecessary remaining on the bottom surface of the contact hole is obtained from a comparison of the contrast of secondary electron images between the standard sample and the inspection object. The thickness of the remaining film is evaluated.

  However, an inspection method that can accurately and rapidly evaluate the thickness of an unnecessary remaining film remaining on the bottom surface of the contact hole has not yet been established. For example, in the contact hole inspection method described in Patent Document 3, since the surface of the standard sample is a cured photosensitive resin material, the secondary electron intensity and inspection of the standard sample emitted from the contact hole and the resin material are inspected. Unlike the target secondary electron intensity, it is difficult to accurately estimate the thickness of the remaining film. In addition, it is difficult to form contact holes with large irregularities by using a photosensitive resin material, and there is a problem that a contact hole having the same shape and density as the contact hole to be inspected cannot be formed in the standard sample.

  An object of the present invention is to provide an inspection method capable of estimating the thickness or resistance value of an unnecessary remaining film remaining on the bottom surface of a contact hole at high speed and with high accuracy in the process of manufacturing a semiconductor device.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  In the method of manufacturing a semiconductor device according to the present invention, the contact hole of the inspection standard sample is made of substantially the same material and structure as the contact hole to be inspected, and the secondary electron image of the inspection standard sample is irradiated with an electron beam. The potential contrast of the secondary electron image of the contact hole in the pseudo defect portion of the inspection standard sample is measured and the thickness or resistance of the pseudo residual film formed on the bottom surface of the contact hole in the pseudo defect portion of the inspection standard sample. The relationship between the measured value and the potential contrast of the inspection standard sample is measured by measuring the potential contrast of the secondary electron image of the inspection target by irradiating the contact hole of the inspection target with an electron beam. By comparing the potential contrast of the object to be inspected, the thickness of the unnecessary residual film remaining on the bottom surface of the contact hole to be inspected Or those having a inspection step of estimating a resistance value.

  Among the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  In the manufacturing process of the semiconductor device, the thickness or resistance value of the unnecessary remaining film remaining on the bottom surface of the contact hole can be estimated at high speed and with high accuracy.

  In the following embodiments, when necessary for the sake of convenience, the description will be divided into a plurality of sections or embodiments. However, unless otherwise specified, they are not irrelevant to each other, and one is the other. There are some or all of the modifications, details, supplementary explanations, and the like.

  Further, in the following embodiments, when referring to the number of elements (including the number, numerical value, quantity, range, etc.), especially when clearly indicated, or when clearly limited to a specific number in principle, etc. Is not limited to the specific number, and may be a specific number or more. Further, in the following embodiments, the constituent elements (including element steps and the like) are not necessarily indispensable unless otherwise specified and apparently essential in principle. Needless to say. Similarly, in the following embodiments, when referring to the shapes, positional relationships, etc. of the components, etc., the shapes are substantially the same unless otherwise specified, or otherwise apparent in principle. And the like are included. The same applies to the above numerical values and ranges. Further, in the drawings used in the following embodiments, hatching is given to make the drawings easy to see even if they are plan views.

  In all the drawings for explaining the following embodiments, parts having the same function are denoted by the same reference numerals, and repeated explanation thereof is omitted. Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(Embodiment 1)
FIG. 1 is a graph showing the relationship between the potential contrast of the secondary electron image and the thickness of the nonconductive film remaining on the bottom surface of the contact hole when the contact hole is irradiated with the electron beam according to the first embodiment.

  As shown in FIG. 1, when the thickness of the nonconductive film remaining on the bottom surface of the contact hole is 0 to 300 nm, the potential contrast of the secondary electron image increases as the thickness of the nonconductive film decreases. By accurately evaluating the potential contrast, the thickness of the nonconductive film can be accurately estimated from the potential contrast. Therefore, in the first embodiment, an inspection standard sample in which a pseudo residual film is formed in advance on the bottom surface of a contact hole is prepared, and the relationship between the potential contrast obtained from this inspection standard sample and the thickness of the pseudo residual film (for example, The thickness of the unnecessary remaining film remaining on the bottom surface of the defective contact hole to be inspected is estimated from FIG.

  Next, an example of the inspection standard sample according to the first embodiment will be described with reference to FIG. FIG. 2 is a cross-sectional view of a main part of a standard sample for inspection.

  As shown in FIG. 2, the normal part 3 and the pseudo defect part 4 of the plug 2 are formed in the inspection standard sample 1. The normal part 3 includes a contact hole 7 opened in an interlayer insulating film 6 formed on the semiconductor substrate 5 and a conductive film embedded in the contact hole 7, for example, a plug 2 made of a metal film. . The pseudo defect portion 4 includes a contact hole 7 opened in an interlayer insulating film 6 formed on the semiconductor substrate 5, a pseudo residual film 8 having a known film thickness formed on the bottom surface of the contact hole 7, and A conductive film buried in the contact hole 7, for example, a plug 2 made of a metal film, is formed, and a defective conduction defect is formed.

  Several types of thicknesses of the pseudo residual film 8 formed on the bottom surface of the contact hole 7 are selected from 300 nm or less, for example, six types of 300 nm, 200 nm, 100 nm, 50 nm, 10 nm, and 3 nm. In the first embodiment, a pseudo residual film 8 having a thickness of one specification is formed on one inspection standard sample 1. That is, for example, when the six types of pseudo remaining films 8 are selected, six inspection standard samples 1 are prepared. Note that the pseudo residual film 8 having a plurality of thicknesses may be formed on one inspection standard sample 1. The material of the pseudo residual film 8 is, for example, silicon oxide, silicon nitride, silicon carbide, an organic insulating film, a low dielectric constant film, a high dielectric constant film, titanium nitride, silicon cobalt, a resist, or the like.

  Further, since the potential contrast of the secondary electron image changes depending on the charge amount on the pattern surface, it depends on the diameter or density of the contact hole 7. Therefore, a plurality of types of contact holes 7 having different diameters or densities are formed in the inspection standard sample 1. Furthermore, since the potential contrast of the secondary electron image changes depending on the well or diffusion layer formed on the semiconductor substrate 5, the semiconductor substrate 5 has a well 9 having the same impurity concentration as the well formed on the object to be inspected. A diffusion layer 10 having the same impurity concentration as that of the diffusion layer formed on the object to be inspected is formed in a region formed and in contact with the bottom of the contact hole 7 of the semiconductor substrate 5. Note that the well 9 or the diffusion layer 10 is not necessarily formed.

  Next, an example of the manufacturing method of the test standard sample according to the first embodiment will be described in the order of steps with reference to FIGS. 3, 4, 6, 7, 9, and 10 are cross-sectional views of the main part of the inspection standard sample, FIGS. 5 and 8 are top views of the main part of the exposure reticle, and FIG. 11 is the top surface thereof. It is principal part sectional drawing of the test standard sample which formed the nonelectroconductive film | membrane.

  First, as shown in FIG. 3, impurities are ion-implanted into the semiconductor substrate 5 to form the well 9, and then the interlayer insulating film 6 is formed on the main surface of the semiconductor substrate 5. The interlayer insulating film 6 can be a TEOS (Tetra Ethyl Ortho Silicate) film formed by, for example, a plasma CVD (Chemical Vapor Deposition) method, and its surface is planarized by, for example, a CMP (Chemical Mechanical Polishing) method. ing.

  Next, as shown in FIG. 4, a resist pattern 11 is formed on the interlayer insulating film 6. The resist pattern 11 is formed by a normal photolithography method. That is, after a resist film is applied on the interlayer insulating film 6, the resist film is patterned by performing exposure processing and development processing using an exposure reticle 12 shown in FIG. On the reticle 12, a contact hole pattern 3a of a normal portion 3 (circle pattern shown in white in the drawing) and a contact hole pattern 4a of a pseudo defect portion 4 (circle pattern shown in hatching in the drawing) are formed. In addition, a mark 13 for displaying the position of the contact hole pattern 4a of the pseudo defect portion 4 may be formed. Subsequently, the interlayer insulating film 6 is etched using the resist pattern 11 as a mask to form a contact hole 7 reaching the well 9.

  Next, as shown in FIG. 6, after removing the resist pattern 11 and performing a cleaning process, impurities are ion-implanted into the semiconductor substrate 5 to form a diffusion layer 10 in a predetermined region. Thereafter, a pseudo residual film 8 having a thickness of 300 nm or less is formed on the main surface of the semiconductor substrate 5 by, for example, a thermal oxidation method, a sputtering method, a vapor deposition method, a plasma CVD method or the like.

  Next, as shown in FIG. 7, a resist pattern 14 covering the pseudo defect portion 4 is formed. The resist pattern 14 is formed by a normal photolithography method, like the resist pattern 11. That is, after applying a resist film on the interlayer insulating film 6 including the inside of the contact hole 7, the resist film is subjected to exposure processing and development processing using an exposure reticle 15 shown in FIG. Has been. The reticle 15 is formed with a defect pattern 16 that can sufficiently cover the pseudo defect portion 4 and does not cover the normal portion 3.

  Next, as shown in FIG. 9, the pseudo residual film 8 is etched using the resist pattern 14 as a mask, leaving the pseudo residual film 8 only in the pseudo defect portion 4.

  Next, as shown in FIG. 10, after removing the resist pattern 14 and performing a cleaning process, a metal film such as a tungsten film is formed on the interlayer insulating film 6 including the inside of the contact hole 7 and the pseudo residual film 8. Depositing and planarizing the surface of the metal film by, for example, a CMP method, the metal film is embedded in the contact hole 7 to form the plug 2. Note that a barrier metal film may be formed below the metal film. As the barrier metal film, for example, a titanium film, a titanium nitride film, or the like is used. The inspection standard sample 1 is substantially completed through the above steps.

  By the way, when the pseudo residual film 8 is formed, the pseudo residual film 8 is usually formed also on the side wall of the contact hole 7. However, by setting the thickness of the pseudo residual film 8 to 10% or less of the diameter of the contact hole 7, the influence of the pseudo residual film 8 formed on the side wall can be ignored. When more precise evaluation is required, the pseudo residual film 8 is formed by an anisotropic film formation method such as a thermal oxidation method or a plasma CVD method, thereby suppressing the film formation on the side wall of the contact hole 7. Thus, film formation mainly on the bottom of the contact hole 7 is possible.

  Further, as shown in FIG. 11, a non-conductive film 17 may be formed on the outermost surface of the inspection standard sample 1 in order to prevent the pattern surface from deteriorating due to a change with time. When the inspection standard sample 1 on which the nonconductive film 17 is formed is irradiated with an electron beam, the surface of the nonconductive film 17 is applied according to the electrical characteristics of the conductive film embedded in the plug 2 below the nonconductive film 17. Since the charges are distributed, the pseudo residual film 8 formed on the bottom surface of the contact hole 7 can be evaluated from the nonconductive film 17 as well. The thickness of the nonconductive film 17 formed on the outermost surface of the inspection standard sample 1 is 100 nm or less that enables a potential distribution of about several volts or more depending on the electrical characteristics of the plug 2 under the nonconductive film 17. Is used.

  Next, an example of a method for inspecting an inspection target using the above-described inspection standard sample according to the first embodiment will be described with reference to FIGS. FIG. 12 is a block diagram showing an inspection apparatus for estimating the thickness of the unnecessary remaining film remaining on the bottom surface of the defective contact hole to be inspected. FIG. 13 is an inspection for estimating the thickness of the unnecessary residual film remaining on the bottom surface of the defective contact hole. 14A and 14B are obtained from the secondary electron image and secondary electron signal intensity distribution of the inspection standard sample, respectively, and FIG. 15 is obtained from the secondary electron image of the inspection standard sample. FIG. 16 is a graph showing the relationship between the potential contrast and the thickness of the pseudo residual film formed on the bottom surface of the contact hole. FIG. 16 shows the estimated distribution of the thickness of the unnecessary residual film remaining on the bottom surface of the defective contact hole. (A) and (b) are the chip unit classification of the thickness of the unnecessary residual film remaining on the bottom surface of the estimated defective contact hole and the screen display of the inspection apparatus.

  As shown in FIG. 12, the inspection apparatus 100 used in the first embodiment includes an electron optical system 101, a stage mechanism system 102, a wafer transfer system 103, a vacuum exhaust system 104, an optical microscope control system 105, a control system 106, The operation unit 107 is configured.

  The electron optical system 101 includes an electron gun 108, a condenser lens 109, an objective lens 110, a detector 111, a deflector 112, an upper surface electrode 113, and a wafer height detector 114.

  The stage mechanism system 102 includes an XY stage 115, a holder 117 for holding the wafer 116, a wafer 116, and a retarding power source 118 for applying a negative voltage to the holder 117. A position detector by laser length measurement is attached to the XY stage 115.

  The wafer transfer system 103 includes a cassette mounting unit 119, a wafer loader 120, and a transfer unit that connects the cassette mounting unit 119 to the wafer loader 120 and the XY stage 115. The cassette mounting unit 119, the wafer loader 120, and the XY stage 115 are connected to each other. The subject to be inspected goes back and forth.

  The control system 106 includes a signal detection system control unit 121, a blanking control unit 122, a beam deflection correction control unit 123, an electron optical system control unit 124, a wafer height sensor inspection system 125, and a stage control unit 126. An operation unit 107 is connected to the control system 106, and the operation unit 107 includes an operation screen 127, an image processing unit 128, an image / inspection data holding unit 129, a calculation unit 130, and the like. An external server 131 is connected to the operation unit 107. The external server 131 can be connected to another inspection apparatus through a signal line, and the inspection data and inspection recipe obtained by the inspection apparatus 100 can be transferred to another inspection apparatus through the signal line. is there.

  Next, an example of a method for estimating the thickness of the unnecessary residual film remaining on the bottom surface of the defective contact hole to be inspected using the inspection apparatus 100 will be described.

  (Step 1) First, a plurality of pattern information of the inspection standard sample sent from the external server 131 or the moving storage medium of the inspection apparatus 100 and held in the image / inspection data holding unit 129 is read (step of FIG. 13). S1). The pattern information is, for example, the diameter or pattern density of contact holes formed in the inspection standard sample.

  (Step 2) The pattern information of the inspection standard sample closest to the diameter and pattern density of the defective contact hole to be inspected, which is formed on the inspection target, from the plurality of pattern information of the read inspection standard sample Further, a secondary electron image of the inspection standard sample having the selected pattern information is acquired using the inspection apparatus 100 (step S2 in FIG. 13).

  The secondary electron image of the inspection standard sample can be acquired as follows, for example. First, the inspection standard sample is set on the cassette mounting portion 119 of the inspection apparatus 100. Next, the inspection standard sample is transferred into the wafer loader 120 and introduced into the inspection apparatus 100. After the wafer loading is completed, an electron beam irradiation condition for acquiring a secondary electron image from the electron optical system control unit 124 to each unit is set based on the input inspection conditions. Thereafter, the XY stage 115 moves so that the pattern specified by the input pattern information comes under the electron optical system 101, and a secondary electron image of the specified pattern is acquired. Alternatively, a part of the inspection standard sample can be always set on the holder 117 as a standard sample. It is also possible to acquire a secondary electron image of a designated pattern by moving the XY stage 115 so that the electron optical system 101 is placed on a designated pattern of a standard sample placed on the holder 117.

  In addition, secondary electron images of inspection standard samples in various pattern information are acquired in advance and held in the image / inspection data holding unit 129. When a defective contact hole to be inspected is detected, sequentially, A secondary electron image of the inspection standard sample may be read out to the calculation unit 130.

  FIG. 14A shows an example of the secondary electron image of the inspection standard sample, and FIG. 14B shows an example of the secondary electron signal intensity of FIG.

  As shown in FIG. 14A, the region of the plug 2 and the region of the interlayer insulating film 6 of the standard sample for inspection can be confirmed on the secondary electron image 18, and the normal part 3 and the plug 2 of the plug 2 can be confirmed. The pseudo-defect portion 4 can be confirmed. Further, as shown in FIG. 14B, the signal intensity of the plug 2 (normal part 3 and pseudo defect part 4) is detected to be larger than the signal intensity of the interlayer insulating film 6, and the pseudo defect part of the plug 2 is detected. 4 can be detected to be larger than the signal strength of the normal portion 3 of the plug 2. Here, for example, contrast C = (Iplug−Isio2) / Isio2 is calculated from the secondary electron signal intensity shown in FIG. This contrast C varies depending on the thickness of the pseudo residual film formed on the bottom surface of the contact hole. FIG. 15 shows the relationship between the contrast C obtained from the secondary electron image of the inspection standard sample and the thickness of the pseudo residual film formed on the bottom surface of the contact hole. The contrast C decreases as the pseudo residual film becomes thicker. From this graph, the bottom surface of the defective contact hole detected in the object to be inspected in (step 3) and (step 4) described later. It is possible to estimate the thickness of the unnecessary remaining film remaining on the surface. Here, the relationship between the contrast C obtained from the secondary electron image of the inspection standard sample shown in FIG. 15 and the thickness of the pseudo residual film formed on the bottom surface of the contact hole is expressed by the electron optical system 101 of the inspection apparatus 100. Current value of the incident electron beam determined by the set value, objective lens 110, upper surface electrode 113, retarding power supply 118, voltage output value of detector 111, XY stage 115, wafer holder 117, upper surface electrode 113, objective lens 110, detection Depending on the installation position of the detector 111, the signal amplification factor of the detector 111, contamination of the wafer 116, contamination attached to the inspection apparatus 100, etc., there may be slight changes. In such a case, it is possible to estimate a stable remaining film thickness by finely adjusting the set value.

  (Step 3) A secondary electron image to be inspected is acquired using the inspection apparatus 100 (step S3 in FIG. 13).

  (Step 4) The thickness of the unnecessary remaining film remaining on the bottom surface of the defective contact hole detected in the inspection target is estimated (step S4 in FIG. 13). The secondary electron image information of the inspection target obtained in the above (Step 3) is sent from the image processing unit 128 of the inspection apparatus 100 to the calculation unit 130, and the contrast C of the plug portion from the secondary electron image of the inspection target is determined. Calculated. Further, the calculation unit 130 applies the calculation result to the graph of FIG. 15 to identify the defective contact hole to be inspected and estimate the thickness of the unnecessary remaining film remaining on the bottom surface of the defective contact hole. The estimated thickness of the unnecessary remaining film remaining on the bottom surface of the defective contact hole is displayed as defect data on the operation screen 127 of the inspection apparatus 100 (step 5) and held in the image / inspection data holding unit 129 (step 6). ).

  (Step 5) The thickness of the unnecessary residual film detected and estimated on the bottom surface of the defective contact hole detected on the inspection wafer, for example, as a wafer in-plane distribution using contour lines as shown in FIG. 16, or FIG. As shown in FIG. 17B, the secondary electron image is displayed on the operation screen 127 of the inspection apparatus 100 (step S5 in FIG. 13).

  (Step 6) The thickness of the unnecessary remaining film detected on the inspection wafer and remaining on the estimated bottom surface of the defective contact hole is held in the image / inspection data holding unit 129 (step S6 in FIG. 13). It is also possible to transfer the defect data to another apparatus by the external server 131 or the moving storage medium, and input defect data to another inspection apparatus or process management system.

  By the above (Step 1) to (Step 6), the thickness of the unnecessary remaining film remaining on the bottom surface of the defective contact hole to be inspected is estimated, and information on the defect data is managed. Similarly, the resistance value of the plug to be inspected can be estimated. In addition, a database is created in advance using the thickness or resistance value of the unnecessary remaining film remaining on the bottom surface of the defective contact hole, or the distribution in the wafer surface, and the defect generation process or defect generation is automatically performed from the database. A mechanism for identifying the factor may be provided. Further, a mechanism for finely adjusting the processing conditions of the defect generation process may be provided. For example, a mechanism for finely adjusting the dry etching time for processing the contact hole according to the estimated thickness of the unnecessary remaining film remaining on the bottom surface of the defective contact hole to be inspected may be provided.

  As described above, according to the first embodiment, the pseudo defect portion 4 of the inspection standard sample 1 is made of substantially the same material and structure as the defective contact hole to be inspected, and the secondary electrons of the inspection standard sample 1 are formed. By comparing the potential contrast of the image with the potential contrast of the secondary electron image to be inspected, the thickness or resistance value of the unnecessary residual film remaining on the bottom surface of the defective contact hole can be estimated nondestructively and accurately. Can do. Further, by forming the conductive film 17 on the surface of the inspection standard sample 1, it is possible to prevent the surface of the inspection standard sample 1 from being altered, so that the inspection standard sample 1 can be used for a long time. It becomes. As a result, the thickness or resistance value of the unnecessary residual film remaining on the bottom surface of the defective contact hole in the semiconductor manufacturing process can be estimated at high speed and with high accuracy, and the defect generation process and its cause can be identified early. In addition, feedback to the semiconductor manufacturing process can be performed early.

  Further, by performing calibration of the sensitivity of the inspection apparatus 100 using the inspection standard sample 1 according to the present invention, the state of detection sensitivity of the inspection apparatus 100 can be determined from the change in defect detection rate when the inspection standard sample 1 is inspected. Since it can be managed every day, it is possible to detect an abnormality in the inspection apparatus 100 at an early stage. In addition, once the sensitivity is calibrated between the plurality of inspection apparatuses 100 and the inspection conditions are optimized, the inspection recipe can be shared by transferring the inspection recipe to another inspection apparatus. Can be tested with the same sensitivity. In addition, when a plurality of semiconductor devices of the same type are inspected by a plurality of inspection apparatuses, inspection with the same sensitivity becomes possible, so that the reliability of data in process management can be improved.

  Next, an example of a process for forming a contact hole to be inspected using the inspection method according to the first embodiment will be described with reference to FIG. FIG. 18 is a process diagram for forming contact holes.

  First, a resist pattern is formed by an ordinary photolithography method on an interlayer insulating film that covers various semiconductor elements formed on the main surface of the semiconductor substrate (step S1 in FIG. 18). Next, the interlayer insulating film is processed by dry etching using the resist pattern as a mask to form contact holes (step S2 in FIG. 18). Next, after performing post-processing such as ashing or cleaning and ion implantation, a plug is formed by embedding a conductive material in the contact hole (step S3 in FIG. 18). Thereafter, using the inspection method according to the first embodiment, plug continuity inspection is performed to evaluate the thickness or resistance value of the unnecessary remaining film remaining on the bottom surface of the defective contact hole, or the distribution in the wafer surface, etc. Step S4 in FIG. By identifying the defect cause process from the evaluation result, it is possible to feed back to the photolithography process (process S1 in FIG. 18) and the dry etching process (process S2 in FIG. 18) at an early stage. Thereby, the yield of the semiconductor device can be improved at an early stage. The inspection according to the first embodiment (step S4 in FIG. 18) was performed after the plug was formed (after step S3 in FIG. 18), but after the contact hole was formed (in step S2 in FIG. 18). You may go after).

(Embodiment 2)
An example of the inspection standard sample according to the second embodiment will be described with reference to FIG. FIG. 19 is a cross-sectional view of an essential part of a standard sample for inspection.

  As shown in FIG. 19, the normal part 23 and the pseudo defect part 24 of the plug 22 are formed in the inspection standard sample 21. The normal part 23 is formed on the semiconductor substrate 25 via the interlayer insulating film 26 and the stopper insulating film 27 and formed on the lower layer wiring 28 via the stopper insulating film 29 and the interlayer insulating film 30. The upper layer wiring 31 is connected by a plug 22 to form a wiring chain. The plug 22 includes a contact hole 32 opened in the stopper insulating film 29 and the interlayer insulating film 30, and a conductive film embedded in the contact hole 32, for example, a metal film. The lower layer wiring 28 is constituted by a metal film embedded in a wiring groove 35 formed in the interlayer insulating film 34 on the stopper insulating film 27, and the upper layer wiring 31 is formed by a stopper insulating film 36 and an interlayer insulating film 37 on the interlayer insulating film 30. It is comprised from the metal film embedded in the wiring groove | channel 38 formed in this.

  Similar to the normal portion 23, the pseudo defect portion 24 is formed at a position connecting the lower layer wiring 28 and the upper layer wiring 31, but on the bottom surface of the contact hole 32 opened in the stopper insulating film 29 and the interlayer insulating film 30. A pseudo residual film 39 having a known film thickness or a known resistance value is formed, and further, a conductive film, for example, a plug 22 made of a metal film is embedded in the contact hole 32 to form a pseudo conduction defect. Has been.

  Several types of thicknesses of the pseudo residual film 39 formed on the bottom surface of the contact hole 32 are selected from 300 nm or less, for example, five types of 200 nm, 100 nm, 50 nm, 10 nm, and 3 nm can be used. In the second embodiment, a pseudo residual film 39 having a thickness of one specification is formed on one inspection standard sample 21. That is, for example, when the five types of pseudo residual films 39 are selected, five inspection standard samples 21 are prepared. Note that the pseudo residual film 39 having a plurality of thicknesses may be formed on one inspection standard sample 21. The material of the pseudo residual film 39 is, for example, silicon oxide, silicon nitride, silicon carbide, an organic insulating film, a low dielectric constant film, a high dielectric constant film, titanium nitride, silicon cobalt, a resist, or the like.

  Further, since the potential contrast of the secondary electron image changes depending on the charge amount on the pattern surface, it depends on the diameter or density of the contact hole 32 or the wiring width, wiring length or density of the upper layer wiring 31. Therefore, a plurality of types of contact holes 32 having different diameters or densities, or a plurality of types of upper layer wirings 31 having different wiring widths, wiring lengths, or densities are formed in the inspection standard sample 21.

  The non-conductive film 40 may be formed on the outermost surface of the inspection standard sample 21, thereby preventing the pattern surface from being deteriorated due to a change with time.

  Next, an example of a method for producing a test standard sample according to the second embodiment will be described in the order of steps with reference to FIGS. 20 to 27 are cross-sectional views of main parts of a standard wafer for inspection.

  First, as shown in FIG. 20, an interlayer insulating film 26 is formed on the main surface of the semiconductor substrate 25. Subsequently, a stopper insulating film 27 is formed on the interlayer insulating film 26. The interlayer insulating film 26 can be a TEOS film formed by, for example, a plasma CVD method, and the stopper insulating film 27 can be a silicon nitride film, for example.

  Next, as shown in FIG. 21, after forming an interlayer insulating film 34 on the stopper insulating film 27, a resist pattern 41 is formed on the interlayer insulating film 34. Subsequently, the interlayer insulating film 34 is processed using the resist pattern 41 as a mask to form a wiring groove 35.

  Next, as shown in FIG. 22, after removing the resist pattern 41 and performing a cleaning process, a metal film is deposited on the interlayer insulating film 34 including the inside of the wiring trench 35, and this metal film is formed by, for example, CMP. The lower layer wiring 28 is formed inside the wiring groove 35 by flattening the surface of the wiring.

  Next, as shown in FIG. 23, a stopper insulating film 29 and an interlayer insulating film 30 are sequentially deposited on the lower wiring 28 and the interlayer insulating film 34, and then a resist pattern 42 is formed on the interlayer insulating film 30. Subsequently, using the resist pattern 42 as a mask, the interlayer insulating film 30 and the stopper insulating film 29 are processed to form contact holes 32.

  Next, as shown in FIG. 24, after removing the resist pattern 42 and performing a cleaning process, the main surface of the semiconductor substrate 25 is 200 nm by a thermal oxidation method, a sputtering method, a vapor deposition method, a plasma CVD method, or the like. A pseudo residual film 39 having the following thickness is formed.

  Next, as shown in FIG. 25, after forming a resist pattern 43 covering the pseudo defect portion 24, the pseudo residual film 39 is etched using the resist pattern 43 as a mask as shown in FIG. Only the pseudo residual film 39 is left.

  Next, as shown in FIG. 27, after removing the resist pattern 43 and performing a cleaning process, a metal film is deposited on the interlayer insulating film 30 including the inside of the contact hole 32 and the pseudo residual film 39, for example, By planarizing the surface of this metal film by CMP, a metal film is embedded in the contact hole 32 to form a plug 22. Subsequently, a stopper insulating film 36 and an interlayer insulating film 37 are sequentially deposited on the interlayer insulating film 30 and the plug 22, and then the interlayer insulating film 37 and the stopper insulating film 36 are processed by etching using a resist pattern as a mask. 38 is formed. Subsequently, a metal film is deposited on the interlayer insulating film 37 including the inside of the wiring groove 38, and the upper layer wiring 31 is formed in the wiring groove 38 by flattening the surface of the metal film by, for example, CMP. Furthermore, a nonconductive film 40 having a thickness of 100 nm or less may be formed on the outermost surface of the inspection standard sample 21. The inspection standard sample 21 is substantially completed through the above steps.

  By the way, when the pseudo residual film 39 is formed, the pseudo residual film 39 is usually formed also on the side wall of the contact hole 32. However, by setting the thickness of the pseudo residual film 39 to 10% or less of the diameter of the contact hole 32, the influence of the pseudo residual film 39 formed on the side wall can be ignored. When more precise evaluation is required, the pseudo residual film 39 is formed by an anisotropic film forming method such as a thermal oxidation method or a plasma CVD method, thereby suppressing the film formation on the side wall of the contact hole 32. Thus, film formation mainly on the bottom of the contact hole 32 is possible.

  As described above, according to the second embodiment, the pseudo defect portion 24 of the inspection standard sample 21 is made of substantially the same material and structure as the defective contact hole to be inspected, and the secondary electrons of the inspection standard sample 21 are formed. By comparing the potential contrast of the image with the potential contrast of the secondary electron image of the object to be inspected, the thickness of the unnecessary remaining film remaining on the bottom surface of the defective contact hole can be nondestructive as in the first embodiment. And can be estimated accurately.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  The method for manufacturing a semiconductor device of the present invention can be used, for example, in an inspection process for detecting a defect in a contact hole formed in a semiconductor device.

It is a graph which shows the relationship between the electric potential contrast of the secondary electron image by Embodiment 1 of this invention, and the thickness of the nonelectroconductive film | membrane which remains on the bottom face of a contact hole. It is principal part sectional drawing of the test | inspection standard sample by Embodiment 1 of this invention. It is principal part sectional drawing which shows the manufacturing process of the test standard sample by Embodiment 1 of this invention. FIG. 4 is a cross-sectional view of a main part of the same portion as FIG. 3 in the manufacturing process of the inspection standard sample subsequent to FIG. 3. It is a principal part top view of the reticle for exposure by Embodiment 1 of this invention. FIG. 5 is a cross-sectional view of a main part of the same portion as FIG. 3 in the manufacturing process of the inspection standard sample subsequent to FIG. 4. FIG. 7 is a cross-sectional view of a main part of the same portion as FIG. 3 in the manufacturing process of the inspection standard sample subsequent to FIG. 6. It is a principal part top view of the reticle for exposure by Embodiment 1 of this invention. FIG. 8 is a fragmentary cross-sectional view of the same portion as that in FIG. 3 during the manufacturing process of the inspection standard sample subsequent to FIG. 7; FIG. 10 is a fragmentary cross-sectional view of the same portion as that in FIG. 3 during the manufacturing process of the inspection standard sample following FIG. 9; It is principal part sectional drawing of the test standard sample which formed the nonelectroconductive film | membrane in the outermost surface by Embodiment 1 of this invention. It is a block diagram which shows the test | inspection apparatus which estimates the thickness of the unnecessary residual film | membrane which remains on the bottom face of the defective contact hole of the test object by Embodiment 1 of this invention. It is process drawing of the test | inspection method which estimates the thickness of the unnecessary residual film | membrane which remains on the bottom face of the defective contact hole by Embodiment 1 of this invention. (A) and (b) are the secondary electron image and secondary electron signal intensity distribution of the inspection standard sample, respectively. It is a graph which shows the relationship between the electric potential contrast of the secondary electron image of the test | inspection standard sample by this Embodiment 1, and the thickness of the pseudo residual film | membrane formed in the bottom face of a contact hole. This is a distribution in the wafer surface of the thickness of the unnecessary residual film remaining on the bottom surface of the defective contact hole estimated according to the first embodiment. (A) and (b) are the chip unit classification of the thickness of the unnecessary residual film remaining on the bottom surface of the estimated defective contact hole and the screen display of the inspection apparatus. It is a formation process figure of the contact hole formed in the to-be-inspected object by Embodiment 1 of this invention. It is principal part sectional drawing of the test | inspection standard sample by Embodiment 2 of this invention. It is principal part sectional drawing which shows the manufacturing process of the test standard sample by Embodiment 2 of this invention. FIG. 21 is an essential part cross-sectional view of the same place as that in FIG. 20 during the manufacturing process of the inspection standard sample following FIG. 20. It is principal part sectional drawing of the same location as FIG. 20 in the manufacturing process of the test standard sample following FIG. FIG. 23 is a fragmentary cross-sectional view of the same portion as that in FIG. 20 during a manufacturing step of the inspection standard sample continued from FIG. 22; FIG. 24 is an essential part cross-sectional view of the same place as that in FIG. 20 in the manufacturing process of the standard sample for inspection following FIG. 23. FIG. 25 is a main-portion cross-sectional view of the same portion as that of FIG. 20 in the manufacturing process of the inspection standard sample continued from FIG. It is principal part sectional drawing of the same location as FIG. 20 in the manufacturing process of the test standard sample following FIG. It is principal part sectional drawing of the same location as FIG. 20 in the manufacturing process of the test standard sample following FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Standard sample for inspection 2 Plug 3 Normal part 3a Contact hole pattern 4 Pseudo defect part 4a Contact hole pattern 5 Semiconductor substrate 6 Interlayer insulating film 7 Contact hole 8 Pseudo residual film 9 Well 10 Diffusion layer 11 Resist pattern 12 Reticle 13 Mark 14 Resist Pattern 15 Reticle 16 Defect pattern 17 Nonconductive film 18 Secondary electron image 21 Standard sample for inspection 22 Plug 23 Normal part 24 Pseudo defect part 25 Semiconductor substrate 26 Interlayer insulating film 27 Stopper insulating film 28 Lower layer wiring 29 Stopper insulating film 30 Interlayer Insulating film 31 Upper layer wiring 32 Contact hole 34 Interlayer insulating film 35 Wiring groove 36 Stopper insulating film 37 Interlayer insulating film 38 Wiring groove 39 Pseudo residual film 40 Non-conductive films 41, 42, 43 Resist pattern 100 Inspection apparatus 101 Electro-optical system 102 The Rotation mechanism system 103 Wafer transfer system 104 Vacuum exhaust system 105 Optical microscope control system 106 Control system 107 Operation unit 108 Electron gun 109 Condenser lens 110 Objective lens 111 Detector 112 Deflector 113 Upper surface electrode 114 Wafer height detector 115 XY stage 116 Wafer 117 Holder 118 Retarding power supply 119 Cassette mounting unit 120 Wafer loader 121 Signal detection system control unit 122 Blanking control unit 123 Beam deflection correction control unit 124 Electro-optical system control unit 125 Wafer height sensor inspection system 126 Stage control unit 127 Operation screen 128 Image processing unit 129 Image / inspection data holding unit 130 Calculation unit 131 External server

Claims (5)

A method for manufacturing a semiconductor device comprising the following inspection steps:
(A) preparing a plurality of inspection standard samples having different thicknesses or resistance values of pseudo residual films formed on the bottom surfaces of the contact holes;
(B) irradiating each of the plurality of inspection standard samples with an electron beam to obtain potential contrasts of secondary electron images of contact holes of the plurality of inspection standard samples;
(C) A potential contrast of a secondary electron image of a contact hole included in the plurality of inspection standard samples and a thickness or a resistance value of a pseudo residual film formed on a bottom surface of the contact hole included in the plurality of inspection standard samples. Obtaining a relationship;
(D) irradiating an object to be inspected with an electron beam to obtain a potential contrast of a secondary electron image of a contact hole of the object to be inspected;
(E) The pseudo residual film formed on the potential contrast of the secondary electron images of the contact holes of the plurality of inspection standard samples obtained in the step (c) and the bottom surfaces of the contact holes of the plurality of inspection standard samples Estimating the thickness or resistance value of an unnecessary remaining film remaining on the bottom surface of the contact hole of the object to be inspected from the relationship with the thickness or resistance value of
Here, the plurality of inspection standard samples prepared in the step (a) includes the following steps:
(A1) depositing an insulating film on the main surface of the semiconductor substrate;
(A2) forming a contact hole in the insulating film;
(A3) forming the pseudo residual film having a thickness of 300 nm or less on the insulating film including the inside of the contact hole;
(A4) a step of covering the contact hole of the pseudo defect portion with a mask pattern and removing the pseudo residual film in a region other than the pseudo defect portion;
(A5) A step of embedding a conductive film in the contact hole.   2. The method of manufacturing a semiconductor device according to claim 1, wherein a non-conductive film is formed on a main surface of the semiconductor substrate after the step (a5).   2. The method of manufacturing a semiconductor device according to claim 1, wherein contact holes of the plurality of inspection standard samples are in contact with the semiconductor substrate.   4. The method of manufacturing a semiconductor device according to claim 3, wherein contact holes of the plurality of inspection standard samples are in contact with a diffusion layer formed by introducing impurities into the semiconductor substrate. Production method.   2. The method of manufacturing a semiconductor device according to claim 1, wherein the contact holes of the plurality of test standard samples are formed in an insulating film between the lower layer wiring and the upper layer wiring in contact with the lower layer wiring and the upper layer wiring. A method for manufacturing a semiconductor device.

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