JP2001217348A - Multilayer wiring board - Google Patents

Abstract

(57) Abstract: A multi-layer wiring board having a group of parallel wirings arranged orthogonally is provided with a pair of wirings that can constitute a differential circuit free of crosstalk noise. SOLUTION: On a first insulating layer I1 having a first parallel wiring group L1, a second insulating layer I3 having a second parallel wiring group L2 orthogonal to the first parallel wiring group L1 is provided. A stacked wiring body formed by stacking two parallel wiring groups L2 and a third insulating layer I3 having a third parallel wiring group L3 orthogonal to each other and electrically connecting them with a through conductor group T; The first parallel wiring group L1 includes a signal wiring pair SP1 composed of two signal wirings adjacent to each other and a power supply wiring P1 or a ground wiring G1 adjacent thereto, and the third parallel wiring group L3 includes a signal wiring pair. This is a multilayer wiring board having two power supply wirings P3 and / or ground wirings P3 opposed to SP1. It is possible to configure a differential circuit having good characteristics by pair wiring that does not generate crosstalk noise.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board used for an electronic circuit board or the like, and more particularly to a wiring structure in a multilayer wiring board on which a semiconductor element operating at a high speed is mounted.

[0002]

2. Description of the Related Art Conventionally, in a multilayer wiring board on which a semiconductor element such as a semiconductor integrated circuit element is mounted and which is used for an electronic circuit board or the like, an insulating material made of ceramics such as alumina is used for forming a wiring conductor for internal wiring. Layers and wiring conductors made of a refractory metal such as tungsten (W) are alternately stacked to form a multilayer wiring board.

In a conventional multilayer wiring board, signal wirings of internal wiring wiring conductors usually have a strip line structure, and a so-called solid pattern is formed above and below wiring conductors formed as signal wirings via insulating layers. A ground (ground) layer or a power supply layer having a wide area of the shape was formed.

Further, with the increase in the speed of electric signals handled by the multilayer wiring board, the insulating layer is replaced with alumina ceramics having a relative dielectric constant of about 10, and a polyimide resin or epoxy resin having a relatively small relative dielectric constant of 3.5 to 5 is used. A conductive layer for internal wiring made of copper (Cu) is formed on the insulating layer by using a thin film forming technique such as a vapor deposition method such as a vapor deposition method or a sputtering method. By forming a wiring conductor in a pattern and multiplying the insulating layer and the wiring conductor into layers, a multilayer wiring board having a high density, a high function and a high speed operation of a semiconductor element has been obtained.

On the other hand, the wiring structure of the internal wiring of the multilayer wiring board is designed to reduce ringing noise and reduce crosstalk between signal wirings by matching the impedance of the wirings, and to realize high-density wiring. A structure has been proposed in which a group of parallel wirings is formed on the upper surface of an insulating layer, and this is multi-layered to electrically connect predetermined wirings of the wiring group of each layer via through conductors such as via conductors and through-hole conductors. ing.

In a multilayer wiring board having such parallel wiring groups, an electronic component such as a semiconductor element mounted on the multilayer wiring board is electrically connected to a mounting board on which the multilayer wiring board is mounted. Then, an appropriate wiring is selected from each parallel wiring group in the multilayer wiring board, and the connection between the wirings between different wiring layers is performed via a through conductor such as a via conductor.

[0007]

The operating voltage of a semiconductor element mounted on a multilayer wiring board having a group of parallel wirings tends to be set low with a reduction in power consumption. When the operating voltage decreases, the reference voltage (threshold voltage) for performing on / off determination in the logic circuit in the semiconductor element also decreases, and noise decreases similarly due to the voltage drop. However, on the other hand, noise tends to increase due to factors other than voltage, such as an increase in the number of switching operations and speeding up. As a result, noise tends to increase overall. As a result, there has been a problem that a malfunction of the semiconductor element mounted on the multilayer wiring board is likely to occur due to a decrease in the threshold voltage and an increase in noise.

[0008] As one method for solving this problem,
There is a method of arranging two signal lines adjacent to each other to form a differential circuit used as a signal line pair, that is, a so-called pair line.
This is because two signal wirings are arranged adjacent to each other in a wiring board, and signals having opposite phases are input to each other, thereby lowering an input voltage in each signal wiring and obtaining a desired output signal while suppressing noise. Things.

However, in the conventional multilayer wiring board having a parallel wiring group as described above, when a pair wiring is provided in the parallel wiring group, if the pair wirings are adjacent to each other, the crossing between the pair wirings is performed. Talk noise may be generated, and in that case, there is a problem that the feature of suppressing the generation of crosstalk noise between the parallel wiring groups stacked perpendicularly to each other cannot be utilized.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to reduce crosstalk noise between wirings in the same layer and between upper and lower layers by forming parallel wiring groups stacked at right angles. Crosstalk noise, ringing noise, EM while having a wiring structure that can
A signal wiring pair that suppresses the occurrence of I noise and the like is provided, and a signal wiring pair that suppresses the occurrence of crosstalk noise is provided while having a wiring structure capable of reducing crosstalk noise between wirings, thereby providing a multilayer wiring. Multi-layer wiring boards suitable for electronic circuit boards, semiconductor element storage packages, multi-chip packages, etc., which can realize differential circuits while having the features of the board, and which mount electronic components such as semiconductor elements operating at high speed. To provide.

[0011]

According to the present invention, there is provided a multilayer wiring board including a signal wiring and a first parallel wiring group including a signal wiring, and including a signal wiring and being orthogonal to the first parallel wiring group. A second insulating layer having a second group of parallel wirings, and a third insulating layer having a third group of parallel wirings including signal wiring and orthogonal to the second group of parallel wirings, A stacked wiring body formed by electrically connecting at least two first to third parallel wiring groups with a through conductor group, wherein the first parallel wiring group is formed by two signal wirings adjacent to each other; Signal wiring pair and a power supply wiring or a ground wiring adjacent to the signal wiring pair, and the third parallel wiring group is adjacent to each other and two power supply wirings and / or grounds facing the signal wiring pair. It is characterized by having wiring.

In the multi-layer wiring board according to the present invention, the first to third parallel wiring groups each include a signal wiring other than the signal wiring pair and a power supply wiring or a ground adjacent to each signal wiring. And a wiring.

According to the multilayer circuit board of the present invention, in a laminated wiring body in which parallel wiring groups are arranged at right angles to each other and connected by through conductor groups, the first parallel wiring group is connected to two adjacent signal lines. A signal wiring pair comprising a wiring and a power supply wiring or a ground wiring adjacent to the signal wiring pair, and the third parallel wiring group is connected to the signal wiring pair of the first parallel wiring group adjacent to each other. Having two opposing power supply wirings and / or ground wirings,
Along with the crosstalk noise between the signal wiring pairs in the stacked parallel wiring groups, the crosstalk noise between the signal wiring pairs in the same parallel wiring group can be significantly reduced, and furthermore, the signal lines oppose the signal wiring pairs. Since the different parallel wirings are power wirings and / or ground wirings, crosstalk noise between the parallel wirings facing each other can be greatly reduced, so that it is possible to make good use of the features of the multilayer wiring structure. A differential circuit having characteristics can be configured.

Further, by arranging a power supply wiring or a ground wiring adjacent to each of the signal wirings other than the signal wiring pair, the generation of crosstalk noise in the same parallel wiring group is also performed for the signal wirings. Can be greatly reduced.

Thus, according to the multilayer wiring board of the present invention, in a multilayer wiring board in which parallel wiring groups are orthogonally arranged, a signal in which the generation of crosstalk noise is suppressed without deteriorating its excellent electrical characteristics. A multilayer wiring board suitable for an electronic circuit board on which electronic components such as a semiconductor element operating at a high speed are mounted, and various packages, etc., which can provide a wiring pair and thereby realize a differential circuit having good characteristics. Becomes

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a multilayer wiring board according to the present invention will be described in detail based on an embodiment shown in the accompanying drawings.

FIG. 1 is an exploded plan view showing an example of an embodiment of a laminated wiring body according to the multilayer wiring board of the present invention, wherein FIG. 1A shows a first insulating layer, and FIG. Of the insulating layer,
(C) has shown the top view of the 3rd insulating layer, respectively.
FIG. 2 is a perspective plan view showing an example of an embodiment of the multilayer wiring board of the present invention comprising a laminated wiring body obtained by laminating them, and FIG. 3 is a cross-sectional view taken along the line AB.

In these figures, I1 to I4 denote first to fourth insulating layers, respectively, and L1 to L3 are disposed substantially parallel to the upper surfaces of the first to third insulating layers I1 to I3, respectively. The first to third parallel wiring groups, S1 to S3, are respectively the first parallel wiring groups.
To the signal wirings in the third parallel wiring group L1 to L3, SP1 is the signal wiring pair in the first parallel wiring group L1 composed of two signal wirings S1 adjacent to each other, and G1 to G3 are the first.
To ground wirings in the third parallel wiring groups L1 to L3, P1 to P
Reference numeral 3 denotes a power supply wiring in each of the first to third parallel wiring groups L1 to L3, and T denotes an electrical connection of at least two parallel wiring groups of the first to third parallel wiring groups L1 to L3 at a predetermined location. This is a through conductor group. These constitute a multilayer wiring body according to the multilayer wiring board of the present invention.

The plurality of signal wirings S1 to S3 arranged on the same plane may transmit different signals, respectively, and the plurality of power supply wirings P1 to P3 arranged on the same plane may be used.
P3 may supply different powers. Further, it is preferable that the signal wiring pair SP1 forms a differential circuit by two signal wirings, but the same signal may be transmitted by two signal wirings. Further, a plurality of signal wiring pairs SP1 may be provided, and similar signal wiring pairs may be provided in the second and third parallel wiring groups L2 and L3.

In such a multilayer wiring board of the present invention, for example, an MPU (Micro Processing Unit) · A
SIC (Application Specific Integrated Circuit)
An electronic component such as a semiconductor device such as a DSP (Digital Signal Processor) is mounted. It is used as a package for storing electronic components such as a package for storing semiconductor devices, a substrate for mounting electronic components, a so-called multi-chip module or multi-chip package on which a large number of semiconductor integrated circuit devices are mounted, or a motherboard. These electronic components are mounted on the surface of the multilayer wiring board by, for example, so-called bump electrodes, or are attached to the mounting portion by an adhesive, a brazing material, or the like, and are connected to the mounting portion via a bonding wire or the like. It is electrically connected to the second parallel wiring group L2. A connection portion with an external electric circuit and a connection portion with an electronic component such as a semiconductor element to be mounted are not shown.

The through conductor group T here penetrates the insulating layer I2 and / or the insulating layer I3, and connects the upper and lower wirings, or the wiring and external connection terminals formed on the surface of the semiconductor element or the multilayer wiring board. Are electrically connected, usually through-hole conductors and via conductors are used,
It is formed where necessary for connection.

In the multilayer wiring body of the multilayer wiring board of the present invention, the first parallel wiring group L1 having the signal wiring S1 and the signal wiring pair SP1 is wired substantially parallel to the first direction.
A second parallel wiring group L2 having the same signal wiring S2 and signal wiring pair stacked thereon is disposed substantially parallel to a second direction orthogonal to the first direction, and further stacked thereon. Similarly, a third parallel wiring group L3 having a signal wiring S3 and a signal wiring pair is disposed in a direction orthogonal to the second direction, that is, substantially parallel to the first direction. It is electrically connected by a through conductor group T penetrating the second insulating layer I2 and / or the third insulating layer I3 to form a laminated wiring body.

According to such a laminated wiring body, the first parallel wiring group L1 and the second parallel wiring group L2 and the second parallel wiring group L2
And the third parallel wiring group L3 are stacked so as to be orthogonal to each other, so that the electromagnetic field between the wirings of the parallel wiring groups L1 and L2 and between the wirings of the parallel wiring groups L2 and L3 is formed. And the crosstalk noise can be minimized.

In the multilayer wiring board of the present invention, the first parallel wiring group L1 is provided with a signal wiring pair SP1 composed of two signal wirings S1 adjacent to each other.
A power supply wiring P1 or a ground wiring G1 is provided adjacent to this, and further, in the third parallel wiring group L3, two wirings adjacent to each other and facing the signal wiring pair SP1 are provided.
A power supply wiring and / or a ground wiring are provided.
Thereby, the diffusion of the electromagnetic field between the signal lines SP1 to SP3 is suppressed, and even when a plurality of signal line pairs SP1 are provided, these signal line pairs SP1 in the same parallel line group L1 are provided.
The occurrence of crosstalk noise can be greatly reduced, and the occurrence of crosstalk noise with the third parallel wiring group L3 which is a wiring facing the signal wiring pair SP1 is also reduced by the power supply wiring P3 or the ground. By facing the wiring G3, a differential circuit having excellent characteristics, which can be greatly reduced, can be formed.

The distance between the two signal lines S1 of the signal line pair SP1 and the width and thickness of the signal lines S1 are based on the configuration of the other lines of the parallel line group L1 and are different from those of the differential circuit. What is necessary is just to set suitably according to required characteristics and specifications.

In the example shown in FIGS. 1 and 2, the first to third parallel wiring groups L1 to L3 constituting the laminated wiring body are shown.
Are the signal lines S1 and S2 and S3 other than the signal line pair SP1.
Power supply lines P1 to P3 or ground lines G1 to G
3 are arranged adjacent to each other. Thus, the signal wirings S1 to S3 on the same insulating layers I1 to I3 or the signal wiring pair SP1 are electromagnetically cut off, and crosstalk noise between the left and right wirings on the same plane is greatly reduced. be able to.

Further, the power supply wirings P1 to P3 or the ground wirings G1 to G3 are always adjacent to the signal wirings S1 to S3 and the signal wiring pair SP1, so that the power supply wirings P1 to P3 or the ground wirings G1 to G3 on the same plane can be connected. Signal wiring S1
The mutual coupling between S3 and the signal wiring pair SP1 is maximized, and the signal wiring pairs SP1 to SP3 and the signal wirings S1 to S
3 can be minimized. Therefore, the signal wiring pair S
P1 to SP3 and signal wirings S1 to S3 to power supply wiring P
It is possible to reduce inductance values to 1 to P3 and the ground wirings G1 to G3, and it is possible to effectively reduce power supply noise and ground noise at the time of device switching.

This can be similarly applied to a case where a similar signal wiring pair is provided in the second and third parallel wiring groups L2 and L3. Further, in the case where a multilayer structure is formed by using parallel wiring groups that are similarly orthogonal as wiring layers below the first parallel wiring group L1 or above the third parallel wiring group L3, these wiring layers are similarly formed. Can be applied.

In the multilayer wiring board of the present invention,
A multilayer wiring board can be formed by stacking multilayer wiring portions having various wiring structures above and below the multilayer wiring body. For example,
Similar to the multilayer wiring body, the wiring structure of the parallel wiring group stacked orthogonally, the wiring structure of the strip line structure, and the microstrip line structure, the coplanar line structure, etc., to the specifications required for the multilayer wiring board It can be appropriately selected and used depending on the situation.

Further, for example, an electronic circuit may be formed by laminating a polyimide insulating layer and a conductor layer formed by copper deposition. Further, a package for semiconductor element accommodation may be configured by attaching a chip resistor, a thin film resistor, a coil inductor, a cross capacitor, a chip capacitor, and an electrolytic capacitor.

The shape of each insulating layer including the first to third insulating layers I1 to I3 is not limited to a substantially square shape as shown in the figure, but may be a rectangular shape, a rhombic shape, a polygonal shape, or the like. It may be a shape such as a shape.

The first to third parallel wiring groups L1 to L3
Is not limited to those formed on the surfaces of the first to third insulating layers I1 to I3, and may be formed inside the respective insulating layers I1 to I3.

When the third parallel wiring group L3 is formed inside the third insulating layer I3 in the example shown in FIG. 3, the third parallel wiring group L3 is not exposed on the surface. , The fourth insulating layer I4 is not always necessary.

In the multilayer wiring board of the present invention, each of the insulating layers including the first to third insulating layers I1 to I3 is formed by, for example, a ceramic green sheet laminating method using an aluminum oxide sintered body or an aluminum nitride sintered body. Using inorganic insulating materials such as sintered body, silicon carbide sintered body, silicon nitride sintered body, mullite sintered body, glass ceramics, or polyimide, epoxy resin, fluorine resin, polynorbornene, benzocyclobutene Or an electrically insulating material such as a composite insulating material formed by bonding an inorganic insulating powder such as a ceramic powder with a thermosetting resin such as an epoxy resin.

These insulating layers may be formed so as to form a desired multilayer wiring board by a method such as a green sheet laminating method or a build-up method according to the characteristics of each insulating layer. The thickness of these insulating layers is appropriately set according to the characteristics of the material used, and to satisfy conditions such as mechanical strength and electrical characteristics corresponding to required specifications and ease of forming a through conductor group. Is done.

The first to third parallel wiring groups L1 to L3 and other wiring layers and the through conductor group T are made of metal powder metallized metal such as tungsten, molybdenum, molybdenum-manganese, copper, silver, silver-palladium, etc. Alternatively, it is formed of a thin film of a metal material such as copper, silver, nickel, chromium, titanium, gold, niobium, or an alloy thereof.

These wiring conductors and through conductors are formed by forming a metal layer by, for example, a thick film printing method, a sputtering method, a vacuum evaporation method, or a plating method according to the characteristics of each material and the method of forming the insulating layer. It is formed in a predetermined pattern shape and size by a lithography method, and is provided on each insulating layer.

The width of each of the first to third parallel wiring groups L1 to L3 and the distance between the wirings are determined according to the characteristics of the material to be used.
It is set appropriately so as to satisfy conditions such as easiness of disposition in 1 to I3.

The thickness of each of the parallel wiring groups L1 to L3 is 1
It is preferably about 20 μm. This thickness is 1 μm
When the value is less than the above, the resistance of the wiring increases, and it tends to be difficult to provide a good power supply to the semiconductor element by the wiring group, secure a stable ground, and propagate a good signal.
On the other hand, if it exceeds 20 μm, the insulation layer laminated thereon may be insufficiently covered, resulting in poor insulation.

Each of the through conductors of the through conductor group T may have a cross section of a circle, an ellipse, a rectangle such as a square or a rectangle, or any other shape. The position and size are appropriately set according to the characteristics of the material to be used, so as to satisfy conditions such as electrical characteristics corresponding to required specifications and easiness of formation and arrangement on the insulating layer.

For example, when glass ceramics is used for the insulating layer and a conductor material mainly containing copper (Cu) is used for the parallel wiring group, the thickness of the insulating layer is set to 100 μm, and the line width of the wiring is set to 100 μm. By setting the distance between the wirings to 100 μm and the diameter of the through conductor to 100 μm, the impedance of the signal wiring is set to 50Ω, and the connection between the upper and lower parallel wiring groups can be suppressed while suppressing the reflection of high-frequency signals.

Next, another example of the embodiment of the multilayer wiring board of the present invention is shown in FIGS. 4 to 9 are plan views of respective insulating layers in another example of the embodiment of the multilayer wiring board according to the present invention. FIG. 4 shows a first-layer insulating layer on which an integrated circuit element is mounted. FIG. 5 is a top view of a second insulating layer thereunder, FIG. 6 is a top view of a third insulating layer, FIG. 7 is a top view of a fourth insulating layer, FIG. 8 is a top view of the fifth insulating layer, and FIG. 9 is a bottom view of the fifth insulating layer.

In these figures, I11 to I15 are first to fifth insulating layers, respectively. In this example, the first insulating layer I11 is the uppermost layer of the multilayer wiring board. The fifth insulating layer I15 is the lowermost layer. M is an upper surface of the first insulating layer I11, that is, a mounting area for a semiconductor element such as an integrated circuit element provided at the center of the upper surface of the multilayer wiring board.

C1 is the first line conductor of the strip line portion disposed below the mounting area M and on the upper surface of the third insulating layer I13. In this example, C2 is the second insulating layer I12. Grounding conductor layer GL formed on the surface of
A strip line portion is formed by the power supply conductor layer PL formed on the surface of the substrate 14. C2 is a second line conductor of the strip line portion similarly disposed on the upper surface of the fifth insulating layer I15. And a plurality of line conductors C1.
C2 is led out to the mounting area M on the surface of the multilayer wiring board via the through conductor group TC for connection, and is electrically connected to each terminal electrode of the mounted semiconductor element. In addition, FIG.
In FIG. 9, each through conductor including the through conductor group TC for connection is indicated by a circle.

GL is a ground conductor layer formed on the surface of the second insulating layer I12. The ground conductor layer GL efficiently connects the semiconductor element to the first parallel wiring group L1 via the first line conductor C1 and to the third parallel wiring group L3 via the second line conductor C2. Shielding effect against electromagnetic noise by optimizing the area of the ground conductor layer according to the frequency of the mounted device and stabilizing the supply of potential to the device Have The ground conductor layer GL is appropriately formed on the upper surface of the second conductor layer I12 in the multilayer wiring board according to the specifications of the line conductors C1 and C2 and the parallel wiring groups L1 to L3 formed below. You. By forming such a ground conductor layer GL, the ground wiring can be rearranged so that the ground wiring can be efficiently connected between the semiconductor element and the first parallel wiring group L1. A multilayer wiring board having a good shielding effect can be obtained.

PL is a power supply conductor layer formed on the surface of the fourth insulating layer I14. This power supply conductor layer PL
As in the case of the ground conductor layer GL, the rearrangement for efficiently electrically connecting the power supply wiring from the semiconductor element to the first and third parallel wiring groups L1 and L3 is enabled.
Like the ground conductor layer GL, the power supply wiring layer PL is appropriately formed according to the specifications of the multilayer wiring board. By forming such a power supply conductor layer PL, the semiconductor element and the first The power supply wiring can be rearranged so as to be efficiently connected to the parallel wiring group L1.

The ground conductor layer GL and the power supply conductor layer P
L may be in the form of a lattice if necessary, or may be used by exchanging the power supply and the ground. Whether each of these layers is set to the ground or the power supply may be appropriately selected according to the specifications of the multilayer wiring board.

The through conductor group TC for connection penetrates through these layers while being electrically insulated from the ground conductor layer GL.

Next, L1 to L3 are first to third parallel wiring groups formed on the upper surfaces of the third to fifth insulating layers I13 to I15, respectively. P1 to P3 are the first to third, respectively.
, Power supply wirings in the parallel wiring groups L1 to L3, G1 to G3 are ground wirings in the first to third parallel wiring groups L1 to L3, respectively, and S1 to S3 are first to third parallel wiring groups L1 respectively.
Signal wirings SP1 to SP3 are first to first, respectively.
FIG. 5 shows a signal wiring pair in which two signal wirings in a third parallel wiring group L1 to L3 are adjacent to each other.

The plurality of signal wirings S1 to S3 arranged on the same plane may transmit different signals, respectively, and the plurality of power supply wirings P1 to P3 arranged on the same plane may be used.
P3 may supply different powers. Further, the signal line pairs SP1 to SP3 may be signal lines constituting a differential circuit, or may be signal lines transmitting the same signal.

Further, the connection with the external electric circuit was electrically connected from each of the third parallel wiring group L3 to the first parallel wiring group L1 via the through conductor group TCL for external connection. A connection conductor such as a solder bump is attached to each of the connection lands CL disposed on the lower surface of the fifth insulating layer I15, and these are electrically connected to connection electrodes of an external electric circuit. It is. Among these many connection lands CL, CLP is a connection land for power supply to which the power supply wirings P1 to P3 are connected, and CLG is a ground connection G1 to G.
3 is connected to a ground connection land, CLS is a signal connection land connected to signal lines S1 to S3, CLSP
Indicates a signal pair land to which the signal wiring pairs SP1 to SP3 are connected. Further, the ground conductor layer GL, the power supply conductor layer PL, the first and second line conductors C1 and C2, and the like are also electrically connected to the connection lands CL via the through conductors as necessary.

The first parallel wiring group L1 on the third insulating layer I13 has an intersection in the mounting area M corresponding to the center of the third insulating layer I13. In each of the divided areas divided by two straight lines indicated by chain lines so that the center angles are substantially equal, the divided wirings are formed of parallel wiring groups each directed toward the intersection, that is, toward the mounting area M in the center of the third insulating layer I13. Have been. Here, the substantially square third insulating layer I
The intersection along the 13 diagonals is located within the mounting area M
An example is shown in which four divided areas are set so that the central angle of the straight line is about 90 degrees. This is the same for the third parallel wiring group L3 on the fifth insulating layer I15 shown in FIG.

The second parallel wiring group L2 formed on the fourth insulating layer I14 has the first parallel wiring group in each of the divided regions (indicated by a dashed line in FIG. 7). It is composed of a parallel wiring group orthogonal to the parallel wiring group of L1. Here, in the second parallel wiring group L2, the power supply wiring P2 and the ground wiring G
2 is connected to form a substantially square annular wiring having wiring parallel to each side of a substantially square fourth insulating layer I14.

The first to third parallel wiring groups L
At least two parallel wiring groups 1 to L3 are electrically connected to each other at appropriate locations by the through conductor groups T formed in the third and / or fourth insulating layers I13 and I14. The parallel wiring portions are connected to each other, thereby forming a parallel wiring portion which is a laminated wiring body in which parallel wiring groups orthogonal to each other are formed in each of the divided regions.

In this example, the first to third parallel wiring groups L1 to L3 are composed of the signal wiring pairs SP1 to SP3 and the signal wirings S1 to S3 connected to the power supply wirings P1 to P3 or the ground wiring G1.
To G3 are adjacent to each other. Thereby, the signal wiring pairs SP1 to SP1 on the same insulating layers I13 to I15
The SP3 and the signal wirings S1 to S3 are electromagnetically cut off, so that crosstalk noise between the left and right signal wiring pairs SP1 to SP3 and the signal wirings S1 to S3 on the same plane can be favorably reduced.

Further, in the multilayer wiring board of the present invention, the wiring of the third parallel wiring group L3 facing the signal wiring pair SP1 of the first parallel wiring group L1 is connected to the adjacent power supply wiring P3 and / or Alternatively, since the ground wiring G3 is used, the parallel wiring group L2 intersecting at right angles with the insulating layer I13.I
Crosstalk noise between the parallel wirings that are opposed to each other via 14 can also be significantly reduced, whereby crosstalk noise can be further reduced.

The arrangement of the signal wiring pairs SP1 to SP3 is determined so as to form a desired differential circuit in the parallel wiring groups L1 to L3 or according to the specifications of the multilayer wiring board.
It is set appropriately. Further, the first and third parallel wiring groups L
The line conductor pair CP in the first line conductor C1 is provided at an appropriate location for the signal line pair SP1
The line conductor pair C2 in the first and second line conductors C2 is connected to form a desired circuit.

Note that the signal wiring S of the second parallel wiring group L2
2 and a part of the signal wiring pair SP2, the power supply conductor layer PL may be used as a power supply wiring adjacent thereto, and the stripping line portion may be used.

Further, the power supply wirings P1 to P3 or the ground wirings G1 to G3 are always adjacent to the signal wiring pairs SP1 to SP3 and the signal wirings S1 to S3, so that the power supply wirings P1 to P3 and the signal wiring pair SP1 on the same plane. To SP3 and the signal wirings S1 to S3, and the ground wirings G1 to G3 and the signal wiring pairs SP1 to SP3 and the signal wirings S1 to S3 have the maximum mutual coupling, and the currents of the signal wiring pairs SP1 to SP3 and the signal wirings S1 to S3 are maximized. The route can be minimized. Therefore, the signal wiring pairs SP1 to SP3 and the signal wirings S1 to S
3 can reduce the inductance value from the power supply lines P1 to P3 and the ground lines G1 to G3, so that power supply noise and ground noise at the time of device switching can be effectively reduced.

According to the multilayer wiring board of the present invention, the divided areas are set as described above, and the laminated wiring body in which parallel wiring groups orthogonal to each other are formed in each of the divided areas is provided. The power wiring P2 and the ground wiring G2 of the parallel wiring group forming the second parallel wiring group L2
A substantially annular wiring structure is formed so as to surround the central part of the insulating layer I14 of the layer. Further, by optimizing the power supply wiring P2 and the grounding wiring G2 arranged in a ring shape, it is possible to prevent intrusion of EMI noise from the outside. It has the effect of shielding the emission of unnecessary electromagnetic noise to the outside,
It is possible to reduce crosstalk noise between signal wirings, and it is also effective as a measure against EMI.

Further, as shown in FIG. 7, when the outermost annular wiring in the wiring layer is the ground wiring G2 as shown in FIG. 7, the area of the annular ground wiring G2 is By optimizing the connection with the through conductor group and the through conductor group, a more effective shielding effect against EMI noise can be obtained, and effective EMI countermeasures can be taken.

The first parallel wiring group L1 is formed on the third insulating layer I13, that is, in the same plane as the plurality of first line conductors C1 of the strip line portion. Are formed on the fifth insulating layer I15A, that is, in the same plane as the plurality of second line conductors C2 of the strip line portion.
S3 and a plurality of line conductors C1 and C2 and a pair of line conductors CP1 in which the signal line pair SP1 and SP3 are signal lines.
-Each of the CPs 2 is connected to the periphery of the mounting area M in the plane thereof. The second parallel wiring group L2 is formed on the fourth insulating layer I14, and is electrically connected to the first and third parallel wiring groups L1 and L3 by the through conductor group T. I have. Thereby, each terminal electrode of the semiconductor element mounted on the mounting area M and the first to third parallel wiring groups L1
To L3 are electrically connected via a strip line portion.

According to the multilayer wiring board of the present invention having such a wiring structure, the wiring connected to the input / output electrodes of the semiconductor elements arranged at a very small pitch and extremely high density is connected to the line conductor C1 in the strip line portion.・ C2 wiring pitch (wiring interval) is expanded and signal wiring ・ signal wiring pair ・ power supply wiring ・
The ground wiring can be rearranged and developed into a wide-pitch wiring suitable for the parallel wiring group, and the wiring can be rearranged and connected, so that the density has been increased while taking advantage of the excellent electrical characteristics of the parallel wiring group. Electrical connection can be efficiently performed with a semiconductor element having input / output electrodes. In addition, a plurality of strip line portions are stacked and provided until all the signal wires are developed by the strip line portion, and parallel wire groups corresponding to the strip line portions are provided in parallel, so that signal wires and signal wires from the semiconductor element are provided. Efficiently rearrange pairs, power supply wiring, and ground wiring, set the optimum wiring for connection with the surrounding parallel wiring group, and deploy it to the parallel wiring group. In the case of multi-layering, the wiring design can be optimized and the number of layers can be reduced.

In the multilayer wiring board of the present invention, in addition to the above-described example, the setting of each of the divided regions constituting the parallel wiring portion includes an intersection in the mounting region M corresponding to the central portion of the third insulating layer I13. And four divided regions divided by two straight lines along a straight line parallel to a side substantially passing through the center of the sides of the substantially square third insulating layer I13 so that the central angle is about 90 degrees. May be set, and six divided regions may be set so that the center angle is approximately equal to about 60 degrees with three straight lines, and the center angle is about 45 with four straight lines. Eight divided areas may be set so as to be substantially equal to the degree.

In any of these cases, as in the above-described example, not only between the left and right signal wirings S1 to S3 and between the signal wiring pairs SP1 to SP3 on the same plane, but also the upper and lower parallel wiring groups are orthogonal. Therefore, crosstalk noise between the upper and lower layers can be satisfactorily reduced.
To SP3 and the current path of the signal wirings SP1 to SP3 can be minimized. Therefore, the inductance values from the signal wiring pairs SP1 to SP3 and the signal wirings SP1 to SP3 to the power supply wirings P1 to P3 and the ground wirings G1 to G3 can be reduced, and the power supply noise and the ground noise at the time of device switching can be reduced. Can be effectively reduced. The power supply wiring P2 and the ground wiring G2 of the parallel wiring group forming the second parallel wiring group L2 have an annular wiring structure so as to surround the center of the insulating layer on which they are formed. By optimizing the P2 and the ground wiring G2, it has an effect of shielding intrusion of EMI noise from outside and radiation of unnecessary electromagnetic wave noise to outside,
Crosstalk noise between signal wirings can be reduced, and it is also effective as a measure against EMI. When the outermost peripheral ring of the second parallel wiring group L2 is the ground wiring G2, EMI noise can be further effectively reduced by optimizing the area of the ring ground G2 and the connection with the through conductor group. Has a shielding effect against the EMI and effective EMI countermeasures can be taken.

It should be noted that the present invention is not limited to the above-described embodiments, and that various changes can be made without departing from the scope of the present invention. For example, a multilayer wiring board may be formed by stacking multilayer wiring portions having a stripline structure, and a so-called solid power plane having a large area may contain a magnetic material.

In the above embodiments, the present invention has been described as a multilayer wiring board on which a semiconductor element is mounted. However, the present invention may be applied to a semiconductor element housing package for housing a semiconductor element or a multi-chip module. Good. Further, as the insulating layer, a sintered body of aluminum nitride or silicon carbide based on heat dissipation or a sintered body of glass ceramic based on low dielectric constant may be used.

[0068]

According to the multilayer circuit board of the present invention, the first to third parallel wiring groups including the signal wiring are arranged orthogonally to each other and connected by the through conductor group. And a power supply wiring or a ground wiring adjacent to the signal wiring pair, and a third parallel wiring group adjacent to the third parallel wiring group. In addition, since two power wirings and / or ground wirings facing the signal wiring pairs of the first parallel wiring group are provided, crosstalk noise between the signal wiring pairs in the stacked parallel wiring groups is obtained. In addition, crosstalk noise between signal wiring pairs in the same parallel wiring group can be significantly reduced, and the parallel wiring that faces the signal wiring pair is a power supply wiring and / or a ground wiring. Al, since crosstalk noise parallel lines facing each other can also be greatly reduced,
A differential circuit having good characteristics can be configured while utilizing the features of the multilayer laminated wiring body.

Further, by arranging the power supply wiring or the ground wiring adjacent to each other for the signal wiring other than the signal wiring pair, the signal wiring between the stacked parallel wiring groups is also provided for these signal wirings. In addition, the generation of crosstalk noise within the same parallel wiring group can be significantly reduced.

As described above, according to the present invention, there is provided a wiring structure which is constituted by a group of parallel wirings stacked perpendicularly to each other and which can reduce crosstalk noise between wirings, and degrades its electrical characteristics. An electronic circuit mounted with electronic parts such as semiconductor elements operating at high speed, which can provide a signal wiring pair that suppresses the generation of crosstalk noise without causing any problem, thereby realizing a differential circuit having good characteristics. A multilayer wiring board suitable for a board, various packages, and the like can be provided.

[Brief description of the drawings]

FIGS. 1 (a) to 1 (c) show first to first examples of an embodiment of a multilayer wiring body according to a multilayer wiring board of the present invention, respectively.
It is a top view of the 3rd insulating layer.

FIG. 2 is a perspective plan view showing an example of an embodiment of the multilayer wiring board of the present invention comprising the multilayer wiring body shown in FIG.

FIG. 3 is a sectional view taken along line AB in FIG. 2;

FIG. 4 is a top view of a first insulating layer showing another example of the embodiment of the multilayer wiring board of the present invention.

FIG. 5 is a top view of a second insulating layer, showing another example of the embodiment of the multilayer wiring board of the present invention.

FIG. 6 is a top view of a third insulating layer showing another example of the embodiment of the multilayer wiring board of the present invention.

FIG. 7 is a top view of a fourth insulating layer, showing another example of the embodiment of the multilayer wiring board of the present invention.

FIG. 8 is a top view of a fifth insulating layer showing another example of the embodiment of the multilayer wiring board of the present invention.

FIG. 9 is a bottom view of a fifth insulating layer, showing another example of the embodiment of the multilayer wiring board of the present invention.

[Explanation of symbols]

 I1, I2, I3 ... Insulating layer L1, L2, L3 ... Parallel wiring group P1, P2, P3 ... Power wiring G1, G2, G3 ... Ground wiring S1 , S2, S3... Signal wiring SP1, SP2, SP3.

Claims (2)

[Claims] 1. A second parallel wiring group including signal wiring and a second parallel wiring group orthogonal to the first parallel wiring group on a first insulating layer having a first parallel wiring group including signal wiring. An insulating layer and a third insulating layer having a third parallel wiring group including signal wiring and orthogonal to the second parallel wiring group are stacked, and the first to third at least two parallel wiring groups are stacked. Comprising a laminated wiring body electrically connected by a through conductor group,
The first parallel wiring group includes a signal wiring pair composed of two signal wirings adjacent to each other and a power supply wiring or a ground wiring adjacent to the signal wiring pair, and the third parallel wiring group is adjacent to each other. A multilayer wiring board having two power supply wirings and / or ground wirings facing the signal wiring pair. 2. The first to third parallel wiring groups each include a signal wiring other than the signal wiring pair and a power supply wiring or a ground wiring adjacent to each signal wiring. The multilayer wiring board as described in the above.