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ITTO981018A0 - Dispositivo per la compensazione delle variazioni dei parametri di pro cesso ed operativi in circuiti integrati in tecnologia cmos. - Google Patents

Dispositivo per la compensazione delle variazioni dei parametri di pro cesso ed operativi in circuiti integrati in tecnologia cmos.

Info

Publication number
ITTO981018A0
ITTO981018A0 IT98TO001018A ITTO981018A ITTO981018A0 IT TO981018 A0 ITTO981018 A0 IT TO981018A0 IT 98TO001018 A IT98TO001018 A IT 98TO001018A IT TO981018 A ITTO981018 A IT TO981018A IT TO981018 A0 ITTO981018 A0 IT TO981018A0
Authority
IT
Italy
Prior art keywords
compensation
variations
integrated circuits
operational parameters
cmos technology
Prior art date
Application number
IT98TO001018A
Other languages
English (en)
Inventor
Marco Burzio
Emanuele Balistreri
Original Assignee
Cselt Centro Studi Lab Telecom
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cselt Centro Studi Lab Telecom filed Critical Cselt Centro Studi Lab Telecom
Priority to IT1998TO001018A priority Critical patent/IT1303209B1/it
Publication of ITTO981018A0 publication Critical patent/ITTO981018A0/it
Priority to US09/452,643 priority patent/US6218886B1/en
Priority to JP34181199A priority patent/JP3354538B2/ja
Priority to EP99124159A priority patent/EP1006579A1/en
Priority to CA 2291540 priority patent/CA2291540C/en
Publication of ITTO981018A1 publication Critical patent/ITTO981018A1/it
Application granted granted Critical
Publication of IT1303209B1 publication Critical patent/IT1303209B1/it

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00369—Modifications for compensating variations of temperature, supply voltage or other physical parameters
    • H03K19/00384—Modifications for compensating variations of temperature, supply voltage or other physical parameters in field effect transistor circuits
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is DC
    • G05F3/10—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/24—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
    • G05F3/242—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only with compensation for device parameters, e.g. channel width modulation, threshold voltage, processing, or external variations, e.g. temperature, loading, supply voltage
    • G05F3/245—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only with compensation for device parameters, e.g. channel width modulation, threshold voltage, processing, or external variations, e.g. temperature, loading, supply voltage producing a voltage or current as a predetermined function of the temperature
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/10—Integrated device layouts
    • H10D89/105—Integrated device layouts adapted for thermal considerations

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Nonlinear Science (AREA)
  • Computing Systems (AREA)
  • Electromagnetism (AREA)
  • Mathematical Physics (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Amplifiers (AREA)
  • Control Of Electrical Variables (AREA)
  • Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
IT1998TO001018A 1998-12-03 1998-12-03 Dispositivo per la compensazione delle variazioni dei parametridi processo ed operativi in circuiti integrati in tecnologia cmos IT1303209B1 (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
IT1998TO001018A IT1303209B1 (it) 1998-12-03 1998-12-03 Dispositivo per la compensazione delle variazioni dei parametridi processo ed operativi in circuiti integrati in tecnologia cmos
US09/452,643 US6218886B1 (en) 1998-12-03 1999-12-01 Device for compensating process and operating parameter variations in CMOS integrated circuits
JP34181199A JP3354538B2 (ja) 1998-12-03 1999-12-01 Ｃｍｏｓ集積回路におけるプロセス及び動作パラメータの変動を補償するための装置
EP99124159A EP1006579A1 (en) 1998-12-03 1999-12-02 Device for compensating process and operating parameter variations in CMOS integrated circuits
CA 2291540 CA2291540C (en) 1998-12-03 1999-12-03 Device for compensating process and operating parameter variations in cmos integrated circuits

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
IT1998TO001018A IT1303209B1 (it) 1998-12-03 1998-12-03 Dispositivo per la compensazione delle variazioni dei parametridi processo ed operativi in circuiti integrati in tecnologia cmos
US09/452,643 US6218886B1 (en) 1998-12-03 1999-12-01 Device for compensating process and operating parameter variations in CMOS integrated circuits

Publications (3)

Publication Number Publication Date
ITTO981018A0 true ITTO981018A0 (it) 1998-12-03
ITTO981018A1 ITTO981018A1 (it) 2000-06-03
IT1303209B1 IT1303209B1 (it) 2000-10-30

Family

ID=26332398

Family Applications (1)

Application Number Title Priority Date Filing Date
IT1998TO001018A IT1303209B1 (it) 1998-12-03 1998-12-03 Dispositivo per la compensazione delle variazioni dei parametridi processo ed operativi in circuiti integrati in tecnologia cmos

Country Status (4)

Country Link
US (1) US6218886B1 (it)
EP (1) EP1006579A1 (it)
JP (1) JP3354538B2 (it)
IT (1) IT1303209B1 (it)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2369259B (en) * 2000-11-21 2005-07-13 C Mac Quartz Crystals Ltd A method and apparatus for generating an input signal for a tunable circuit
US7495465B2 (en) 2005-07-22 2009-02-24 Freescale Semiconductor, Inc. PVT variation detection and compensation circuit
US7388419B2 (en) * 2005-07-22 2008-06-17 Freescale Semiconductor, Inc PVT variation detection and compensation circuit
US7446592B2 (en) * 2005-07-22 2008-11-04 Freescale Semiconductor, Inc. PVT variation detection and compensation circuit
EP2020084A2 (en) * 2006-05-05 2009-02-04 Nxp B.V. Electronic circuit and method therefor
US8392009B2 (en) * 2009-03-31 2013-03-05 Taiwan Semiconductor Manufacturing Company, Ltd. Advanced process control with novel sampling policy

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3970875A (en) * 1974-11-21 1976-07-20 International Business Machines Corporation LSI chip compensator for process parameter variations
US4645948A (en) 1984-10-01 1987-02-24 At&T Bell Laboratories Field effect transistor current source
US4975599A (en) * 1989-07-26 1990-12-04 International Business Machines Corporation Method and resulting devices for compensating for process variables in a CMOS device driver circuit
US5157285A (en) 1991-08-30 1992-10-20 Allen Michael J Low noise, temperature-compensated, and process-compensated current and voltage control circuits
US5303191A (en) * 1992-01-23 1994-04-12 Motorola, Inc. Memory with compensation for voltage, temperature, and processing variations
DE69328623T2 (de) * 1993-11-30 2001-02-08 Stmicroelectronics S.R.L., Agrate Brianza Stabile Referenzspannungsgeneratorschaltung
US5477176A (en) * 1994-06-02 1995-12-19 Motorola Inc. Power-on reset circuit for preventing multiple word line selections during power-up of an integrated circuit memory
US5668551A (en) 1995-01-18 1997-09-16 Analog Devices, Inc. Power-up calibration of charge redistribution analog-to-digital converter
US5760657A (en) * 1996-09-30 1998-06-02 Intel Corporation Method and apparatus employing a process dependent impedance that compensates for manufacturing variations in a voltage controlled oscillator
US5994945A (en) * 1998-03-16 1999-11-30 Integrated Device Technology, Inc. Circuit for compensating for variations in both temperature and supply voltage

Also Published As

Publication number Publication date
EP1006579A1 (en) 2000-06-07
JP2000187517A (ja) 2000-07-04
US6218886B1 (en) 2001-04-17
ITTO981018A1 (it) 2000-06-03
IT1303209B1 (it) 2000-10-30
JP3354538B2 (ja) 2002-12-09

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Legal Events

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0001 Granted