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IT1239781B - Circuito e metodo per commutare selettivamente tensioni negative in circuiti integrati cmos - Google Patents

Circuito e metodo per commutare selettivamente tensioni negative in circuiti integrati cmos

Info

Publication number
IT1239781B
IT1239781B IT47927A IT4792790A IT1239781B IT 1239781 B IT1239781 B IT 1239781B IT 47927 A IT47927 A IT 47927A IT 4792790 A IT4792790 A IT 4792790A IT 1239781 B IT1239781 B IT 1239781B
Authority
IT
Italy
Prior art keywords
circuit
integrated circuits
negative voltages
cmos integrated
selectively switch
Prior art date
Application number
IT47927A
Other languages
English (en)
Other versions
IT9047927A0 (it
IT9047927A1 (it
Inventor
Giuliano Imondi
Giulio Marotta
Giulio Porrovecchio
Giuseppe Savarese
Original Assignee
Texas Instruments Italia Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Italia Spa filed Critical Texas Instruments Italia Spa
Priority to IT47927A priority Critical patent/IT1239781B/it
Publication of IT9047927A0 publication Critical patent/IT9047927A0/it
Priority to DE69115983T priority patent/DE69115983T2/de
Priority to EP91830187A priority patent/EP0456623B1/en
Priority to JP10262591A priority patent/JP3155290B2/ja
Priority to US07/697,172 priority patent/US5319604A/en
Publication of IT9047927A1 publication Critical patent/IT9047927A1/it
Application granted granted Critical
Publication of IT1239781B publication Critical patent/IT1239781B/it

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/693Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/12Programming voltage switching circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electronic Switches (AREA)
  • Dc-Dc Converters (AREA)
  • Logic Circuits (AREA)
  • Dram (AREA)
  • Read Only Memory (AREA)
IT47927A 1990-05-08 1990-05-08 Circuito e metodo per commutare selettivamente tensioni negative in circuiti integrati cmos IT1239781B (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
IT47927A IT1239781B (it) 1990-05-08 1990-05-08 Circuito e metodo per commutare selettivamente tensioni negative in circuiti integrati cmos
DE69115983T DE69115983T2 (de) 1990-05-08 1991-05-07 Schaltungen und Verfahren zur selektiven Umschaltung negativer Spannungen in integrierten CMOS-Schaltungen
EP91830187A EP0456623B1 (en) 1990-05-08 1991-05-07 Circuitry and method for selectively switching negative voltages in CMOS integrated circuits
JP10262591A JP3155290B2 (ja) 1990-05-08 1991-05-08 Cmos集積回路の負電圧を選択的にスイッチングする回路と方法
US07/697,172 US5319604A (en) 1990-05-08 1991-05-08 Circuitry and method for selectively switching negative voltages in CMOS integrated circuits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT47927A IT1239781B (it) 1990-05-08 1990-05-08 Circuito e metodo per commutare selettivamente tensioni negative in circuiti integrati cmos

Publications (3)

Publication Number Publication Date
IT9047927A0 IT9047927A0 (it) 1990-05-08
IT9047927A1 IT9047927A1 (it) 1991-11-08
IT1239781B true IT1239781B (it) 1993-11-15

Family

ID=11263411

Family Applications (1)

Application Number Title Priority Date Filing Date
IT47927A IT1239781B (it) 1990-05-08 1990-05-08 Circuito e metodo per commutare selettivamente tensioni negative in circuiti integrati cmos

Country Status (5)

Country Link
US (1) US5319604A (it)
EP (1) EP0456623B1 (it)
JP (1) JP3155290B2 (it)
DE (1) DE69115983T2 (it)
IT (1) IT1239781B (it)

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US6232626B1 (en) 1999-02-01 2001-05-15 Micron Technology, Inc. Trench photosensor for a CMOS imager
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US20080076371A1 (en) 2005-07-11 2008-03-27 Alexander Dribinsky Circuit and method for controlling charge injection in radio frequency switches
US9653601B2 (en) 2005-07-11 2017-05-16 Peregrine Semiconductor Corporation Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction
USRE48965E1 (en) 2005-07-11 2022-03-08 Psemi Corporation Method and apparatus improving gate oxide reliability by controlling accumulated charge
US8742502B2 (en) 2005-07-11 2014-06-03 Peregrine Semiconductor Corporation Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction
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KR100780768B1 (ko) * 2006-04-12 2007-11-30 주식회사 하이닉스반도체 고전압 펌핑장치
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US9048136B2 (en) 2011-10-26 2015-06-02 GlobalFoundries, Inc. SRAM cell with individual electrical device threshold control
US9029956B2 (en) 2011-10-26 2015-05-12 Global Foundries, Inc. SRAM cell with individual electrical device threshold control
KR101334843B1 (ko) * 2012-08-07 2013-12-02 주식회사 동부하이텍 전압 출력 회로 및 이를 이용한 네거티브 전압 선택 출력 장치
US9590674B2 (en) 2012-12-14 2017-03-07 Peregrine Semiconductor Corporation Semiconductor devices with switchable ground-body connection
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US10236872B1 (en) 2018-03-28 2019-03-19 Psemi Corporation AC coupling modules for bias ladders
US10886911B2 (en) 2018-03-28 2021-01-05 Psemi Corporation Stacked FET switch bias ladders
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Also Published As

Publication number Publication date
JPH0689589A (ja) 1994-03-29
IT9047927A0 (it) 1990-05-08
EP0456623A3 (en) 1992-10-21
IT9047927A1 (it) 1991-11-08
DE69115983D1 (de) 1996-02-15
EP0456623A2 (en) 1991-11-13
EP0456623B1 (en) 1996-01-03
DE69115983T2 (de) 1996-06-27
US5319604A (en) 1994-06-07
JP3155290B2 (ja) 2001-04-09

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Legal Events

Date Code Title Description
0001 Granted
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19960411