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IT1051461B - Circuit integrato a pellicola sottile o ibrido e procedimento per la sua fabbricazione - Google Patents

Circuit integrato a pellicola sottile o ibrido e procedimento per la sua fabbricazione

Info

Publication number
IT1051461B
IT1051461B IT70022/75A IT7002275A IT1051461B IT 1051461 B IT1051461 B IT 1051461B IT 70022/75 A IT70022/75 A IT 70022/75A IT 7002275 A IT7002275 A IT 7002275A IT 1051461 B IT1051461 B IT 1051461B
Authority
IT
Italy
Prior art keywords
procedure
manufacture
film circuit
hybrid film
integrated thin
Prior art date
Application number
IT70022/75A
Other languages
English (en)
Original Assignee
Western Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US05/531,430 external-priority patent/US4068022A/en
Priority claimed from US05/576,711 external-priority patent/US4016050A/en
Application filed by Western Electric Co filed Critical Western Electric Co
Application granted granted Critical
Publication of IT1051461B publication Critical patent/IT1051461B/it

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/10Electroplating with more than one layer of the same or of different metals
    • C25D5/12Electroplating with more than one layer of the same or of different metals at least one layer being of nickel or chromium
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/60Electroplating characterised by the structure or texture of the layers
    • C25D5/623Porosity of the layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01BCABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B1/00Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/243Reinforcing the conductive pattern characterised by selective plating, e.g. for finish plating of pads
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/244Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/80Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors
    • H10D86/85Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors characterised by only passive components
    • H10W70/05
    • H10W70/66
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0364Conductor shape
    • H05K2201/0367Metallic bump or raised conductor not used as solder bump
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703Plating
    • H05K2203/0723Electroplating, e.g. finish plating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061Etching masks
    • H05K3/062Etching masks consisting of metals or alloys or metallic inorganic compounds
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Inorganic Chemistry (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Electroplating Methods And Accessories (AREA)
IT70022/75A 1974-12-10 1975-12-09 Circuit integrato a pellicola sottile o ibrido e procedimento per la sua fabbricazione IT1051461B (it)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US05/531,430 US4068022A (en) 1974-12-10 1974-12-10 Methods of strengthening bonds
US05/576,711 US4016050A (en) 1975-05-12 1975-05-12 Conduction system for thin film and hybrid integrated circuits

Publications (1)

Publication Number Publication Date
IT1051461B true IT1051461B (it) 1981-04-21

Family

ID=27063541

Family Applications (1)

Application Number Title Priority Date Filing Date
IT70022/75A IT1051461B (it) 1974-12-10 1975-12-09 Circuit integrato a pellicola sottile o ibrido e procedimento per la sua fabbricazione

Country Status (8)

Country Link
JP (1) JPS6032311B2 (it)
DE (1) DE2554691C2 (it)
ES (1) ES443346A1 (it)
FR (1) FR2294610A1 (it)
GB (1) GB1527108A (it)
IT (1) IT1051461B (it)
NL (1) NL185249C (it)
SE (1) SE427400B (it)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4153518A (en) * 1977-11-18 1979-05-08 Tektronix, Inc. Method of making a metalized substrate having a thin film barrier layer
JPS54127572A (en) * 1978-03-28 1979-10-03 Oki Electric Ind Co Ltd Thin film circuit
DE2833919C2 (de) * 1978-08-02 1982-06-09 Siemens AG, 1000 Berlin und 8000 München Verfahren zur Herstellung von elektrischen Schichtschaltungen auf Kunststoffolien
JPS5559795A (en) * 1978-10-30 1980-05-06 Nippon Electric Co Printed circuit board and method of manufacturing same
EP0016263B1 (de) * 1979-03-21 1983-07-06 BBC Brown Boveri AG Dünnschichtwiderstand mit grossem Temperaturkoeffizienten und Verfahren zu dessen Herstellung
FR2476913B1 (fr) * 1980-02-25 1985-09-13 Nippon Electric Co Circuit a plusieurs couches pour integration a grande echelle et procede de fabrication de ce circuit
DE3029382A1 (de) * 1980-08-01 1982-03-04 Siemens AG, 1000 Berlin und 8000 München Aufbau von metallschichten und verfahren zur herstellung dieses aufbaus
DE3029277C2 (de) * 1980-08-01 1983-10-20 Siemens AG, 1000 Berlin und 8000 München Aufbau von Metallschichten
DE3107943A1 (de) * 1981-03-02 1982-09-16 Siemens AG, 1000 Berlin und 8000 München Verfahren zur herstellung von loetbaren und temperfaehigen edelmetallfreien duennschichtleiterbahnen
JPS57198696A (en) * 1981-06-01 1982-12-06 Shimada Rika Kogyo Kk Method of producing thin film circuit
DE3207659A1 (de) * 1982-03-03 1983-09-15 Siemens AG, 1000 Berlin und 8000 München Duennfilmschaltungen mit durchkontaktierungen
US4463059A (en) * 1982-06-30 1984-07-31 International Business Machines Corporation Layered metal film structures for LSI chip carriers adapted for solder bonding and wire bonding
JPS59167096A (ja) * 1983-03-11 1984-09-20 日本電気株式会社 回路基板
JPS60140897A (ja) * 1983-12-28 1985-07-25 日本電気株式会社 樹脂絶縁多層基板
DE3433251A1 (de) * 1984-08-16 1986-02-27 Robert Bosch Gmbh, 7000 Stuttgart Verfahren zur herstellung von galvanischen lotschichten auf anorganischen substraten
US4808274A (en) * 1986-09-10 1989-02-28 Engelhard Corporation Metallized substrates and process for producing
EP0264648B1 (en) * 1986-09-25 1993-05-05 Kabushiki Kaisha Toshiba Method of producing a film carrier
JPH03108797A (ja) * 1989-09-22 1991-05-08 Ngk Spark Plug Co Ltd 多層配線基板およびその製造方法
DE4017181C2 (de) * 1990-05-29 1998-08-27 Daimler Benz Aerospace Ag Elektrisches Bauelement
EP0526656B1 (en) * 1991-02-25 1996-01-10 Sumitomo Electric Industries, Ltd. Wiring board
US5449955A (en) * 1994-04-01 1995-09-12 At&T Corp. Film circuit metal system for use with bumped IC packages
DE10004453B4 (de) * 2000-02-03 2009-08-13 Ust Umweltsensortechnik Gmbh Elektrische Sicherung und Verfahren zu deren Herstellung
JP2003101222A (ja) * 2001-09-21 2003-04-04 Sony Corp 薄膜回路基板装置及びその製造方法
CN116093573A (zh) * 2022-12-14 2023-05-09 北京航天微电科技有限公司 一种微带电路制备方法以及微带环隔器

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2108730A1 (en) * 1970-03-06 1971-09-16 Motorola Inc Integrated hybrid circuit

Also Published As

Publication number Publication date
JPS6032311B2 (ja) 1985-07-27
FR2294610A1 (fr) 1976-07-09
DE2554691C2 (de) 1982-11-18
ES443346A1 (es) 1977-08-16
JPS51101864A (en) 1976-09-08
GB1527108A (en) 1978-10-04
NL185249B (nl) 1989-09-18
FR2294610B1 (it) 1980-03-21
NL7514325A (nl) 1976-06-14
SE427400B (sv) 1983-03-28
NL185249C (nl) 1990-02-16
SE7513853L (sv) 1976-06-11
DE2554691A1 (de) 1976-06-16

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Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19931220