CN1223035A - Reception method and receiver - Google Patents
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- CN1223035A CN1223035A CN199898800215A CN98800215A CN1223035A CN 1223035 A CN1223035 A CN 1223035A CN 199898800215 A CN199898800215 A CN 199898800215A CN 98800215 A CN98800215 A CN 98800215A CN 1223035 A CN1223035 A CN 1223035A
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- H03—ELECTRONIC CIRCUITRY
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Abstract
The invention relates to a reception method and a receiver. In the method a transition metric corresponding to a conditional probability is formed for a received symbol in all states (s0, s0, s0, - s1, s1, s1) of each trellis level (I - AMOUNT_OF_BITS-1). A cumulative transition metric is formed by multiplying the transition metric (T(0000), T(0001), T(1110), T(1111)) by a cumulative metric relating to each state (s0, s0, s0, - s1, s1, s1) of the previous level (I - AMOUNT_OF_BITS-1) or by summing the logarithmic forms of the metrics. The cumulative metric (cum(I,000), (cum(I,001), cum(I+1,000)) relating to different states of each level (I - AMOUNT_OF_BITS-1) is formed by summing the cumulative transition metrics on the basis of the symbols (s0, s1) used for denoting the states (s0, s0, s0, - s1, s1, s1), and a received symbol is determined as a bit decision by using the cumulative transition metrics.
Description
The present invention relates to a kind of method of reseptance, wherein receiving symbol is the function of bit, determines that by interim adjacent lattice (trellis) level A and B A and B comprise the state of predetermined quantity, carry out from each state to next stage B based on the symbol that receives the transfer of state.
The invention still further relates to a kind of receiver, it determines the bit relevant with receiving symbol based on interim adjacent lattice level A and B, and A and B comprise the state of predetermined quantity, carry out from each state to next stage B based on the symbol of reception the transfer of state.
In a finite state, discrete Markov process, because the influence of white noise, usually need carry out the situation of digital cellular wireless system and estimate that the viterbi algorithm that is used for sequencal estimation is a kind of optimization recursive algorithm, but but not be suitable for the detection individual bit.Received signal can be in the base station of cellular wireless system or the user terminal place carries out Veterbi decoding.In the Viterbi parts of receiver, the search message lattice, thus calculate the transfer base quantity (transitionmetric) that receives message.Therefore, Veterbi decoding is used to detect the symbol corresponding to the information of transmission, and these symbolic representations send the bit or the bit combination of message.As everyone knows, viterbi algorithm is used for input and decoding.Viterbi algorithm generates a ML (maximum likelihood) sequencal estimation according to signal, generally also the channel-decoding function is carried out soft-decision.The ML estimation comprises the symbol sebolic addressing estimation that this signal comprises.The ML method is discussed in 4.2 chapters of the Digital Communications of the Proakis J.G. of McGraw-Hill Book Company publication in 1989, the hardware of viterbi algorithm is implemented among the paper High-speed Parallel Viterbi Decoding:Algorithm and VLSI Architecture of Fettweis G. and Meyer H. in the volume 29 (5) of IEEE Communications Magazine in 1991 and discusses, and it is included in for your guidance herein.
The transfer base quantity that the prior art Vitebi detector adds up between every grade of state shifts base quantity to generate accumulation, and the transfer base quantity has been represented the transition probability between the state; Relatively base quantity is shifted in the accumulation that generates in each state; Select the remaining path (survivor path) that enters each state based on shifting base quantity, require the correct path trace stage to carry out bit decision (bitdecision).This causes the time delay in bit decision and the symbol detection.In addition, Vitebi detector can be shaken after having selected once wrong path branches, promptly loses correct path during some state transitions.
Therefore, an object of the present invention is to provide a kind of method of reseptance and a kind of receiver that adopts this method, this receiver has replaced the detection based on viterbi algorithm, does not re-use sequencal estimation.In addition, this method does not comprise the generation in remaining path, so do not need to carry out correct path trace.
This realizes by a kind of method of describing in the preorder, it is characterized in that, the B level more than a known state in generate the transfer base quantity of a receiving symbol, this transfer base quantity is corresponding to conditional probability and be used for moving to from the known state of previous stage A the transfer of each described known state of next stage B, the state of previous stage is defined by shifting a plurality of symbols in the base quantity, and each all has the symbol item of predetermined quantity these symbols; Be multiplied by the accumulation base quantity generation accumulation transfer base quantity relevant by shifting base quantity with each known state of previous stage A; Shift base quantity by the relevant accumulation of the state on a plurality of symbol items of the known location symbol that adds up and generate the accumulation base quantity relevant, determine the state of previous stage A with the state of B level with the B level; Utilizing accumulation to shift base quantity, be separately each bit bit of definite receiving symbol irrespectively each other of symbol.
The feature of the inventive method also is, the B level more than a known state in generate the transfer base quantity of a receiving symbol, this shifts base quantity corresponding to conditional probability; Generate the logarithm that shifts base quantity, shift the transfer that base quantity is used for moving to from the known state of previous stage A each described known state of next stage B, the state of previous stage is defined by shifting a plurality of symbols in the base quantity, and each all has the symbol item of predetermined quantity these symbols; Add that by logarithm being shifted base quantity the logarithm accumulation base quantity relevant with each known state of previous stage A generates the logarithm accumulation and shift base quantity; The parameter generation exponential accumulation base quantity of base quantity as exponential function shifted in the logarithm accumulation; By the exponential accumulation base quantity on a plurality of symbol items of the known location symbol that adds up, determine the state of previous stage A; By generate the exponential accumulation base quantity and logarithm, generate logarithm accumulation base quantity; And utilize logarithm accumulation to shift base quantity, be separately each bit bit of definite receiving symbol irrespectively each other of symbol.
Receiver of the present invention is characterised in that, this receiver is included in the device more than the transfer base quantity of generation receiving symbol in the known state of B level, this transfer base quantity is corresponding to conditional probability and be used for moving to from the known state of previous stage B the transfer of each described state of next stage B, the state of previous stage is defined by shifting a plurality of symbols in the base quantity, and each symbol all has the symbol item of predetermined quantity; Be multiplied by the device that the accumulation base quantity relevant with each known state of previous stage A generates accumulation transfer base quantity by shifting base quantity; Shift base quantity by the accumulation relevant on a plurality of symbol items of the last symbol that adds up and generate the accumulation base quantity, determine the device of the state of previous stage A with B level different conditions; And the accumulation that the receiver utilization generates in this device shifts base quantity, be separately each bit bit of definite receiving symbol irrespectively each other of symbol.
The feature of receiver of the present invention also is, this receiver is included in the device more than the logarithm transfer base quantity that generates receiving symbol in the known state of B level, this logarithm shifts base quantity corresponding to conditional probability and each described state of transferring to next stage B from the known state of previous stage B, the state of previous stage is defined as shifting a plurality of symbols in the base quantity, and each symbol has the symbol item of predetermined quantity; Add that by logarithm being shifted base quantity the logarithm accumulation base quantity relevant with each known state of previous stage A generates the device that base quantity is shifted in the logarithm accumulation; Shift base quantity by the accumulation relevant on a plurality of symbol items of the last symbol that adds up and generate the accumulation base quantity, determine the device of the state of previous stage A with B level different conditions; And by generate and logarithm, generate the logarithm accumulation base quantity of B level; And receiver utilizes logarithm accumulation to shift base quantity, irrespectively generates the bit of receiving symbol separately each other for each bit of symbol.
Method of the present invention provides many advantages.Compare with the prior art scheme, it has improved performance, quickened bit decision and symbol is determined, and has eliminated prior art and detected the shake that generally all has.
Describe the present invention in detail below in conjunction with the example that accompanying drawing provides, in the accompanying drawings
Fig. 1 shows a lattice figure;
Fig. 2 shows the receiver block diagram;
Fig. 3 shows the receiver block diagram;
Fig. 4 shows the device that generates base quantity; And
Fig. 5 shows a kind of receiver that comprises a plurality of branches.
Method of the present invention and receiver can be applied to digital radio system, gsm system especially, but the present invention but is not limited to this system.The data sample y of the signal that receives in the wireless system can followingly represent:
y=HS+n (1)
Wherein H is a channel estimating, i.e. impulse response estimates, S represents the data that send, and n represents noise and interference.Bold face type is a vector or matrix in order to the character shown in the explanation.Let us is at first studied the present invention program's theoretical foundation.Determine one two element set B.Group B is called as a bit
B={a
0,a
1}, (2)
A wherein
0For example be 0, and a
1For example be 1.Can determine a symbol S by the sequence that forms by bit x then
i:
S
i=f(X
i,N-1,X
i,N-2,...X
i,0);X
i,N-1∈B∧X
i,N-2∈B∧...∧X
i,0∈B, (3)
This means symbol S
iBe bit X
I, N-1, X
I, N-2..., X
I, 0Function.Symbol ∧ in the formula (3) is an AND symbol.In the formula, N represents amount of bits.Therefore, symbol S
iCan comprise m=2
NIndividual value, described value is made S by note
i∈ A={S
0, S
1..., S
2 N-1.Therefore pass through applying markov chain, Probability p (y
i| S
i) or mean the y of reception
iComprise symbol S
iSimilar expression formula can be write as following form:
p(y
i|S
i)=p(y
i|S
i,S
i-1,...,S
i-r,)P(y
i-1|S
i-1,S
i-2,...,S
i-r-t,)p(y
0|S
0), (4)
Wherein channel impulse is the r+1 bit long, y
i=<y
i, y
I-1..., y
0The symbol that receives, S have been represented
i=<S
i, S
I-1..., S
0The symbol that sends of expression.The probability of supposing all symbols herein equates.Notice that two adjacencies share a same-sign, so may shift from a state to another state only has m=2
NIndividual.Therefore, can be with the form of state diagram and/or lattice figure draw transfer, wherein m
r=(2
N)
rState, it is corresponding to viterbi algorithm.M different transfer arranged from each state to NextState.Utilize the characteristic and the probability theory of Markov chain, can between the different conditions of lattice figure, write out recurrence:
P (y wherein
i| S
i, S
I-1..., S
I-r-t) be to shift base quantity, p (y
I-1| S
I-1, S
I-2..., S
I-r-t=S
k) be the accumulation base quantity that shifts initial condition, p (y
i| S
i, S
I-1..., S
I-r-t+1)Be the accumulation base quantity, t is a constant to be determined.Based on symbol S
kCarry out symbol item S
k∈ A adds up.In other words, bit 0 and bit 1 being carried out bit respectively adds up.Recurrence can begin and continue from sequence number i=0, finishes until received pulse string or similar information, if can finish.Like this, p (y
i| S
i, S
I-1..., S
I-r-t+1) comprise and comprise symbol S
i, S
I-1..., S
I-r-t+1The cumulative probability in all paths.
Above-mentioned recursion method relates to determining of sign condition.This also needs the general information of the soft-decision relevant with sending bit usually not enough.Adopt above-mentioned recursive description to estimate the method for soft-decision below.Each bit all needs to estimate a Probability p (x|y).A bit x
I-r-t, kProbability p (x
I-r-t, k=a
1| y
j) at first can be write as following form: p (X
I-r-t, k=a
1| y
j)=p (y
j| X
I-r-t, k=a
1) p (X
I-r-t, k=a
1)/p (y
j)=
(6) k=[0 wherein ..., N-1], point to bit N.Can determine likelihood ratio now
?(7)
Wherein j represents block length (perhaps reception value is used to adjudicate).If i<j then carries out the suboptimum supposition.Show bit probabilities p (x above
I-r-t, k| y
j) can be during the symbol base quantity generates with shift and form calculate.Be also noted that Probability p (x when i=j
I-r-t, k| y
j) be optimum.By user selected parameter t, can determine the length of adjudicating in the lattice.In fact, the smaller value of parametric t provides good reliability (value of parametric t selection can be t=0).The signal of Jie Shouing is a continuous signal if desired, then can't determine best symbol, thereby can't carry out optimum decision.Like this, to a bit x in the symbol
I-r-tDetermine this judgement base quantity.Can be the definite separately base quantity of all bits of k to sequence number in arbitrary symbol, thereby all bit decisions are provided.
In order to generate likelihood, need divide.But division is a kind of slower operation, can avoid dividing by adopting logarithm.
The method of another kind of estimate symbol is described below.Except the likelihood judgement, can also determine the probability judgement, perhaps replace the likelihood judgement with the probability judgement.Like this, bit probabilities can followingly be determined:
From the {<S that adds up
i..., S
I-r-t| S
i∈ A ∧ ... ∧ S
I-r-tAs can be seen, in denominator, calculate the probability or the similar value of bit 1 or 0 among the ∈ A}.
Describe this innovative approach below by bit, this has simplified the mathematical expression that needs use.
Let us is at first investigated method of the present invention by the lattice figure of Fig. 1, and this figure comprises 8 states (STATE) and 8 grades (LEVEL) with exemplary forms.The situation is-symbol S that the example that illustrates relates to
iComprise two values, i.e. a bit.State can be used bit labeling, thereby needs 3 bits or come 8 states of mark corresponding to the symbol of these bits, and these bits are S
1And S
0, they are corresponding to above-mentioned bit a
1And a
0Level I, I+1 ..., AMOUNT_OF_BITS-1 comprises interim continuous state S
0, S
0, S
0-S
1, S
1, S
1, carry out based on the symbol, bit or the bit combination that receive to the transfer of these states.The time sequencing that on behalf of incident, it take place is from left to right carried out in the detection that receives bit in lattice in lattice figure.Transfer can be used for according to receiving bit (bit is 1 or 0), from every grade a bit, promptly state proceeds to two different conditions of next stage by two different paths.On the other hand, if use the symbol of bit combination, rather than bit, then from each state to next stage 2
rIndividual state takes place 2
rInferior transfer, r represents the amount of bits that this symbol comprises.So in this embodiment, impulse response is estimated to comprise 4 bits, so r=3.Therefore, if adopt 2 bit symbols, need carry out 4 times from a state to NextState and shift.It is of equal value using symbol and using bit, so all the symbol level incidents in the lattice can turn back to the bit-level incident.Window of state representation in the base quantity once only shows a few bits in a unlimited bit sequence, normally 4 bits (in this example, a window comprises 3 bits, because every grade only comprises 8 states).In a few bits sequence that occurs in window, when base quantity is always deleted (omit) bit when one-level is transferred to another grade, new reception bit enters sequence from the other end of this sequence simultaneously.Detect the bit of deletion.
Symbol is used for interim adjacent lattice level A of lattice (i-r-t) and B (i-r-t+1), and they comprise the state of predetermined quantity according to formula (5).But, receiving symbol y
iPreferably determine by bit decision.The transfer of the state from each state to next stage B is carried out based on the symbol that receives.Be preferably in and be receiving symbol y in all states of B level
iGeneration is corresponding to the transfer base quantity p (y of conditional probability
i| S
i, S
I-1..., S
I-r-t+1), shift base quantity and be used for transfer from the known state of previous stage A to each known state of next stage B.In shifting base quantity, the state of previous stage A is defined as symbol S
i, S
I-1..., S
I-r-t, each symbol S
kHas 2 of predetermined quantity
NIndividual symbol item S
kIn addition, in the innovation method, by shifting base quantity p (y
i| S
i, S
I-1..., S
I-r-t) be multiplied by the accumulation base quantity p (y relevant with each known state of previous stage A
I-1| S
I-1, S
I-2..., S
I-r-t) generate to accumulate and shift base quantity.A plurality of symbol item S by the known location symbol that adds up
kBase quantity p (y is shifted in the accumulation that all states best and the B level are relevant on the ∈ A
I-1| S
I-1, S
I-2..., S
I-r-t=S
k) p (y
i| S
i, S
I-1..., S
I-r-t) generate the accumulation base quantity p (y relevant with the state of B level
i| S
i, S
I-1..., S
I-r-t), determine the state of previous stage A.Under the binary system situation, generate accumulation base quantity S corresponding to bit 0 and bit 1
k=f (a
0, a
1).In this way, symbol is used for the carrying out of lattice.Shift base quantity p (y by accumulation then
I-1| S
I-1, S
I-2..., S
I-r-t=S
k) p (y
i| S
i, S
I-1..., S
I-r-t), be separately that each bit of symbol is irrespectively determined bit probabilities or likelihood each other.
If adopt the logarithm probability, the innovation method very major part is similar to preceding method.But difference is, in the method, is receiving symbol y
iGeneration is corresponding to the logarithm log (p (y of the transfer base quantity of conditional probability
i| S
i, S
I-1..., S
I-r-t)).By logarithm being shifted base quantity log (p (y
i| S
i, S
I-1..., S
I-r-t)) add the relevant logarithm accumulation base quantity log (p (y of each known state with previous stage A
I-1| S
I-1, S
I-2..., S
I-r-t)) generation logarithm accumulation transfer base quantity.Generate the exponential accumulation base quantity, thereby base quantity a^[blog (p (y is shifted in the logarithm accumulation
i| S
i, S
I-1..., S
I-r-t))+log (p (y
I-1| S
I-1, S
I-2..., S
I-r-t))] as the parameter of exponential function, wherein symbol ^ represents exponential relationship.Character a is the e of a natural logrithm or 2 preferably herein, b is ± 1 or ± In2.Then by the known location symbol S that adds up
kA plurality of symbol item S
kLast exponential accumulation base quantity, determine to add up the state of previous stage A and carry out according to following formula:
, S wherein
kSuppose it is S for example
I-r-tThen by generate the exponential accumulation base quantity and logarithm
Generate logarithm accumulation base quantity.Shift base quantity a^[blog (p (y by accumulation then
i| S
i, S
I-1..., S
I-r-t=S
k))+log (p (y
I-1| S
I-1, S
I-2..., S
I-r-t=S
k))], be separately that each bit of symbol is irrespectively determined bit probabilities or likelihood each other.
Therefore, receiving sample y
iThe time, can judge to receive whether bit is x
I-r-tCan in processing, suppose t=0, thereby not need to point out separately.Employing is carried out bit decision according to log-likelihood (logarithmic likelihood) function of formula (7) and (8) can realize this function.Bit decision can be used as the log-likelihood judgement and shifts base quantity p (y by the accumulation of the B level state that adds up
I-1| S
I-1, S
I-2..., S
I-r-t=S
k) p (y
i| S
i, S
I-1..., S
I-r-t=S
k), known location symbol (S for example wherein
I-r-t) in the bit x in precalculated position
I-r-tEqual 1 (x
I-r-t=a
1), and below generating and logarithm carry out
In the method base quantity p (y is shifted in the accumulation of B level state
I-1| S
I-1, S
I-2..., S
I-r-t=S
k) p (y
i| S
i, S
I-1..., S
I-r-t=S
k) carry out similar adding up, known location symbol (S for example wherein
I-r-t) in the bit x of known location
I-r-tEqual 0 (x
I-r-t=a
0), and below generating and logarithm
Generate then accumulation shift base quantity and logarithm poor:
Described difference has been represented the bit likelihood.Logarithm and between difference mean that will shift the base quantity sum resembling in the formula (7) divides each other, and generate merchant's logarithm.
If adopt the logarithm probability, in the following manner bit decision is carried out as the likelihood judgement.The exponential accumulation that generates B level state shifts base quantity a^[blog (p (y
i| S
i, S
I-1..., S
I-r-t))+blog (p (y
I-1| S
I-1, S
I-2..., S
I-r-t))].Be preferably in this exponential accumulation that adds up in all B level states and shift base quantity
The symbol S of known location wherein
kThe bit x in middle precalculated position
I-r-tEqual 1 (x
I-r-t=a
1), and generate and logarithm
This logarithm provide accumulation shift base quantity and logarithm.The corresponding this exponential accumulation that adds up shifts base quantity in B level state
Predetermined symbol S wherein
kThe bit x in middle precalculated position
I-r-tEqual 0, and generate and logarithm
Thereby provide accumulation shift base quantity and logarithm.Generate then accumulation shift base quantity and logarithm poor:
This difference has been represented the bit likelihood.
Correspondingly, the probability that relates to bit decision generates in the mode of likelihood judgement similarly.Denominator in the formula (9) is identical, and unique difference is that the denominator in the formula (9) is a probability
Known location symbol S
I-r-tKnown location bit x
I-r-t Equal 1 or 0.Bit x so for example
I-r-tProbability equal 1 (x
I-r-t=a
1), following difference then is provided:
Other probability are corresponding to be generated in the well-known mode of those skilled in the art.
Let us is investigated a simple case by the state diagram of lattice explanation now.A symbol only has two kinds of values in this example, so it also can regard bit as.Adjacent level A and B are grade I and I+1 now.Under the situation according to Fig. 1, the accumulation base quantity of last lattice incident and (I, 000) are accumulated to the state S of state 1
0, S
0, S
0State S at level I
0, S
0, S
1In, the accumulation base quantity is cum (I, 001).From state S
0, S
0, S
0Begin to shift, its transfer method is designated as T (0000), means that the bit of needs deletion is 0, and transfers to state S
0, S
0, S
0State S
0, S
0, S
1Transfer T (0001) mean that the bit of needs deletions is 1, and transfer to the state S of I+1 level
0, S
0, S
0Correspondingly, transfer T (1110) is used for the state S from the I level
1, S
1, S
0Transfer to the state S of I+1 level
1, S
1, S
1, needing the bit of deletion is 0.Similarly, transfer T (1111) is used for the state S from the I level
1, S
1, S
1Transfer to the state S of this grade
1, S
1, S
1, needing the bit of deletion is 1.
Adopting logarithm to shift and non-logarithm shifts to generate and all needs to consider the influence disturbed when shifting base quantity, preferably by the variance of generation received signal sample or the result of variance type.Noise and interference have been represented in interference.
In the innovation method, available if impulse response is estimated, the base quantity that uses in then can control detection.Preferably by generating the hard bit decision of receiving symbol, and generate hard bit decision symbol and come complete operation.The convolution of impulse response and generation symbol is used to generate baseline sample.Adopt least square and method benchmark sample and corresponding reception sample, the base quantity that can utilize the benchmark sample and receive least square that sample obtains and use in the control detection as a result, this least square and result preferably a new impulse response estimate
Estimate by changing impulse response then
, make it and the consistent base quantity of controlling of the variation slope of least squares approach.Impulse response is estimated
Amplitude of variation preferably in the following manner control: res_vec=create_symbol{hard ([out..., out
K-r]);
Wherein create_symbol represents according to hard bit decision and generates symbol, and hard generates hard bit decision according to bit likelihood or probability, res_vec is-symbol vector, y
kBe the symbolic vector of receiving symbol,
Be the impulse response estimated vector, dist is the difference vector of sample of signal and baseline sample,
*Res_vec is the fiducial mark vector, mu=[0,1] serve as the weight coefficient that tends to slope variation.If mu is 0, does not then change impulse response and estimate.Based on simulation, the better value of parameter m u can be for example 1/128.
Shift as representative the base quantity probability number and the radix preferably 2 of logarithmic function, rather than severals e of natural logrithm, this is because use radix 2 helps the operation of floating number in the binary number system.
Be used to carry out hard bit decision if receive bit, then use the convolution of hard bit decision and impulse response to generate baseline sample.Convolution according to impulse response H that estimates and estimation S, is for example calculated based on following formula (11) usually
Wherein i and j are the rubidium marking index.Adopt least square shown in the formula (12) and method benchmark sample and the corresponding interim sample that receives then
Wherein LS be least square and the result.The LS as a result that benchmark sample and reception sample obtain is used for by changing impulse response
, the base quantity that uses in the control Viterbi detection.
Let us studies the receiver of the present invention according to the inventive method work in great detail now.Receiver according to Fig. 2 comprises device 201, shifts base quantity in order to generate, and device 202 is accumulated base quantity in order to generate, and installed 203, shifts base quantity in order to generate accumulation.This receiver has also comprised summing unit 204 and 205, the device 206 of generation logarithm, the device 207 and the memory 208 of generation difference.This receiver also comprises device 209, shifts base quantity in order to the accumulation that adds up relevant with bit 0 or 1, and generates the device 210 of logarithm, device 211, the memory 212 of generation difference.This receiver comprises device 213, shifts base quantity in order to the accumulation that adds up relevant with bit 0 or 1, and generates the device 214 of logarithm, device 215, the memory 216 of generation difference.In order to control base quantity, receiver also comprises device 217, LMS device 218 and the time delay device 219 that generates hard bit decision.The operation of receiver is by control device 220 controls.
Let us research now is according to the receiver operation in the receiver of Fig. 2.The sample y of received signal
iArrive device 201, this sample is used for generating probability, promptly is worth p (y
i| S
I-1, S
I-2..., S
I-r-t=S
k), this represents probability, and has represented the transfer base quantity of current state.Device 203 is used for and will be stored in the previous accumulation base quantity p (y of device 203
I-1| S
I-1, S
I-2..., S
I-r-t=S
k) be multiplied by Probability p (y
i| S
i, S
I-1..., S
I-r-t=S
k), generate accumulation and shift base quantity p (y
I-1| S
I-1, S
I-2..., S
I-r-t=S
k) p (y
i| S
i, S
I-1..., S
I-r-t=S
k).Installing in 203 based on symbol S
kBase quantity p (y is shifted in the accumulation that adds up
I-1| S
I-1, S
I-2..., S
I-r-t=S
k) p (y
i| S
i, S
I-1..., S
I-r-t=S
k), generate the accumulation base quantity.According to method of the present invention, base quantity p (y is shifted in accumulation
I-1| S
I-1, S
I-2..., S
I-r-t=S
k) p (y
i| S
i, S
I-1..., S
I-r-t=S
k) be used to generate bit likelihood and/or probability.
It is as follows to generate the mode that receives the log-likelihood of bit in the sample in the receiver.In device 204, base quantity is shifted in a plurality of accumulations that add up, and its quantity preferably equals each all amount of state p (y of level
I-1| S
I-1, S
I-2..., S
I-r-t=S
k) p (y
i| S
i, S
I-1..., S
I-r-t=S
k), known location symbol S wherein
k=S
I-r-tPrecalculated position bit x
I-r-tIt is bit 0.Symbol S
I-r-tBe the last symbol of determining in the sequence of state, and last bit in this bit is-symbol.The corresponding bit 1 that adds up.Device 205 is memory registers, and device 204 is adders.Transfer base quantity sum according to all states of one-level in the device 206 generates a logarithm, generate in the device 207 and logarithm poor.The result who obtains in this way, i.e. receiving symbol y
iLog-likelihood judgement be stored in the register 208.
Except the likelihood judgement, can also generate in the receiver and receive sample y
iThe bit decision probability, perhaps replace the likelihood judgement with the bit decision probability.Base quantity is shifted in the add up accumulation of all states of each grade of device 213 and 209 among Fig. 2, and wherein the precalculated position bit of known location symbol is 0 or 1.In device 214 and 210, generate and logarithm, in device 215 and 211, this value deducted then the accumulation transfer base quantity relevant that generate in the device 206 with bit 1 and bit 0 and logarithm.The probability relevant with the bit 1 of sign bit judgement is stored in the register 216, and the probability relevant with bit 0 is stored in the register 212.Receiver comprises multiple arrangement entity 204 to 217 at least on principle, required amount of bits in its quantity equal symbol coding.Can for example reduce the physical magnitude of device 204 to 217 by serial process.
Estimate in order to improve the operation of receiver, can adjust the impulse response that needs in the base quantity.Then, the device 217 of receiver carries out hard bit decision, this hard bit decision with from device 208 bit likelihood and/or from least one probability correlation in the device 212 and 216.Device 221 is used for generating a plurality of symbols according to hard bit decision.The convolution that symbol that generates and impulse response are estimated is used to generate baseline sample, and promptly fiducial mark is installing in 218 the symbol of these samples and reception, i.e. sample y
iCompare.Utilize the difference that receives between sample and the baseline sample, impulse response is estimated and can be tallied with the actual situation better, thereby produces bit decision preferably.Impulse response after the change
Be fed to device 201, it is used to generate base quantity in device 201.
Receiver according to Fig. 3 comprises device 201, is used for generating shifting base quantity, and device 302 is used for generating accumulation and shifts base quantity, and installs 303, in order to generate the accumulation base quantity.In addition, receiver preferably includes device 304, in order to generate exponential function.In other respects, this receiver is similar to the receiver of Fig. 2.This receiver comprises multiple arrangement entity 304 and 204 to 217 at least on principle, required amount of bits in its quantity equal symbol coding.Can for example reduce the physical magnitude of device 304 and 204 to 217 by serial process.
Fig. 4 describes the structure of the device 201 that adopts the Ungerboeck base quantity in detail.The device 201 that is used to generate base quantity comprises device 401, is used to generate fiducial value, matched filter 402 and install 403 and be used for interference is taken into account.Device 403 is with matched filter 402 and install 401 output and all remove last signal variance I.
Receiver can also comprise a plurality of diversity branches.This scheme is by the block diagram illustrations of Fig. 5.This receiver comprises diversity branch 510 and 511, and they for example comprise antenna and signal conditioner, for example frequency mixer, analog-digital commutator and the device that generates sample of signal, variance and impulse response estimation.This receiver also comprises device 201, is used to generate base quantity, and device 202 is used for generate shifting, and device 203 is used for generating accumulation and shifts base quantity, and device 501, device 217 are used to carry out hard decision, LSM device 218 and install 219 and be used to generate time delay.Can adopt the device 302 and 303 substitution devices 202 and 203 that occur among Fig. 3.Device 501 at least some that represent in the device (304) 204 to 216.This receiver is each its base quantity of diversity branch generation, and is used for determining bit by each branch road is made separately.Multiple arrangement 501,217 and 221 is arranged usually, the quantity of bit in its quantity equal symbol.
In the present invention, the testing result of reception is used for controlling the impulse response of estimating with adapting to.This can realize by minimizing square error.Adopt Kalman filter, extended Kalman filter, recursive least-squares (RLS) filter, lowest mean square (LMS) filter implement device 218, can solve general least square (LSE) problem.LMS device 218 execution algorithms (10).
The calculated example of required channel disturbance amplitude such as follows among the present invention program.At first with channel impulse response estimation and predetermined sequence, for example the convolution form of gsm system training sequence generates a comparison signal YR, according to this comparison signal and the prearranged signals sequence that receives from channel, calculates interfering energy I in variance type mode then.Comparison signal YR that utilization obtains and received signal Y, promptly the predetermined sequence of Jie Shouing utilizes formula (15) according to these calculated signals variance types results I.
Wherein P is arbitrary constant.
The solution of the present invention can for example adopt ASIC or VLSI circuit (integrated circuit relevant with concrete application, fairly large integrated circuit) to realize, especially is more suitable for realizing by this way aspect Digital Signal Processing.The operation that need finish is realized by the program based on microprocessor technology.
Although below in conjunction with the accompanying drawings shown in example the present invention has been described.But obviously the present invention is not limited thereto, can carry out multiple variation in the disclosed innovative idea of appended claim book.
Claims (26)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FI970889 | 1997-02-28 | ||
| FI970889A FI102230B1 (en) | 1997-02-28 | 1997-02-28 | Reception procedure and recipients |
| PCT/FI1998/000169 WO1998038746A2 (en) | 1997-02-28 | 1998-02-25 | A reception method and a receiver |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1223035A true CN1223035A (en) | 1999-07-14 |
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ID=8548316
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN199898800215A Pending CN1223035A (en) | 1997-02-28 | 1998-02-25 | Reception method and receiver |
Country Status (8)
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|---|---|
| US (1) | US6396878B1 (en) |
| EP (1) | EP0927465A2 (en) |
| JP (1) | JP2000515710A (en) |
| CN (1) | CN1223035A (en) |
| AU (1) | AU731565B2 (en) |
| FI (1) | FI102230B1 (en) |
| NO (1) | NO985002L (en) |
| WO (1) | WO1998038746A2 (en) |
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| US6993462B1 (en) | 1999-09-16 | 2006-01-31 | Hewlett-Packard Development Company, L.P. | Method for motion synthesis and interpolation using switching linear dynamic system models |
| US6591146B1 (en) * | 1999-09-16 | 2003-07-08 | Hewlett-Packard Development Company L.C. | Method for learning switching linear dynamic system models from data |
| US6683968B1 (en) * | 1999-09-16 | 2004-01-27 | Hewlett-Packard Development Company, L.P. | Method for visual tracking using switching linear dynamic system models |
| US6694044B1 (en) * | 1999-09-16 | 2004-02-17 | Hewlett-Packard Development Company, L.P. | Method for motion classification using switching linear dynamic system models |
| US6708308B2 (en) * | 2001-01-10 | 2004-03-16 | International Business Machines Corporation | Soft output viterbi algorithm (SOVA) with error filters |
| EP1223717B1 (en) * | 2001-01-15 | 2006-08-02 | Lucent Technologies Inc. | Maximum likelihood detection method using a sequence estimation receiver |
| AUPR679401A0 (en) * | 2001-08-03 | 2001-08-30 | Lucent Technologies Inc. | High speed add-compare-select processing |
| KR100487183B1 (en) * | 2002-07-19 | 2005-05-03 | 삼성전자주식회사 | Decoding apparatus and method of turbo code |
| US7206363B2 (en) * | 2003-06-24 | 2007-04-17 | Intersymbol Communications, Inc. | Method and apparatus for delayed recursion decoder |
| US7607072B2 (en) | 2005-01-28 | 2009-10-20 | Agere Systems Inc. | Method and apparatus for-soft-output viterbi detection using a multiple-step trellis |
| US7764741B2 (en) * | 2005-07-28 | 2010-07-27 | Broadcom Corporation | Modulation-type discrimination in a wireless communication network |
| US8102938B2 (en) * | 2008-04-22 | 2012-01-24 | Finisar Corporation | Tuning system and method using a simulated bit error rate for use in an electronic dispersion compensator |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5263033A (en) * | 1990-06-22 | 1993-11-16 | At&T Bell Laboratories | Joint data and channel estimation using fast blind trellis search |
| GB2246272B (en) * | 1990-07-19 | 1994-09-14 | Technophone Ltd | Maximum likelihood sequence detector |
| FR2675968B1 (en) | 1991-04-23 | 1994-02-04 | France Telecom | METHOD FOR DECODING A CONVOLUTIVE CODE WITH MAXIMUM LIKELIHOOD AND WEIGHTING OF DECISIONS, AND CORRESPONDING DECODER. |
| JP2876497B2 (en) * | 1991-08-23 | 1999-03-31 | 松下電器産業株式会社 | Error correction code decoding method and apparatus |
| JP2702831B2 (en) * | 1991-08-28 | 1998-01-26 | 松下電送株式会社 | Viterbi decoding method |
| US5384810A (en) | 1992-02-05 | 1995-01-24 | At&T Bell Laboratories | Modulo decoder |
| US5377133A (en) | 1992-04-07 | 1994-12-27 | Digital Equipment Corporation | System for enhanced implementation of add-compare-select (ACS) functions |
| US5537444A (en) * | 1993-01-14 | 1996-07-16 | At&T Corp. | Extended list output and soft symbol output viterbi algorithms |
| US5349608A (en) | 1993-03-29 | 1994-09-20 | Stanford Telecommunications, Inc. | Viterbi ACS unit with renormalization |
| AU3364295A (en) | 1994-08-10 | 1996-03-07 | Maxtor Corporation | A tuned viterbi detector and equalizer system |
| US6282251B1 (en) * | 1995-03-21 | 2001-08-28 | Seagate Technology Llc | Modified viterbi detector which accounts for correlated noise |
| US5796757A (en) * | 1995-09-15 | 1998-08-18 | Nokia Mobile Phones Ltd. | Methods and apparatus for performing rate determination with a variable rate viterbi decoder |
| FI100564B (en) | 1995-12-04 | 1997-12-31 | Nokia Telecommunications Oy | A method for generating transition metrics and a receiver for a cellular radio system |
| US5933462A (en) * | 1996-11-06 | 1999-08-03 | Qualcomm Incorporated | Soft decision output decoder for decoding convolutionally encoded codewords |
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1997
- 1997-02-28 FI FI970889A patent/FI102230B1/en active
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1998
- 1998-02-25 WO PCT/FI1998/000169 patent/WO1998038746A2/en not_active Ceased
- 1998-02-25 AU AU61020/98A patent/AU731565B2/en not_active Ceased
- 1998-02-25 EP EP98905439A patent/EP0927465A2/en not_active Ceased
- 1998-02-25 JP JP10537348A patent/JP2000515710A/en active Pending
- 1998-02-25 CN CN199898800215A patent/CN1223035A/en active Pending
- 1998-02-25 US US09/171,881 patent/US6396878B1/en not_active Expired - Fee Related
- 1998-10-27 NO NO985002A patent/NO985002L/en not_active Application Discontinuation
Also Published As
| Publication number | Publication date |
|---|---|
| NO985002L (en) | 1998-12-28 |
| AU731565B2 (en) | 2001-04-05 |
| FI102230B (en) | 1998-10-30 |
| US6396878B1 (en) | 2002-05-28 |
| NO985002D0 (en) | 1998-10-27 |
| WO1998038746A2 (en) | 1998-09-03 |
| WO1998038746A3 (en) | 2001-04-12 |
| JP2000515710A (en) | 2000-11-21 |
| FI102230B1 (en) | 1998-10-30 |
| AU6102098A (en) | 1998-09-18 |
| EP0927465A2 (en) | 1999-07-07 |
| FI970889A0 (en) | 1997-02-28 |
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