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CN103729314B - The management method of memory access instruction and management system - Google Patents

The management method of memory access instruction and management system Download PDF

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Publication number
CN103729314B
CN103729314B CN201210385322.3A CN201210385322A CN103729314B CN 103729314 B CN103729314 B CN 103729314B CN 201210385322 A CN201210385322 A CN 201210385322A CN 103729314 B CN103729314 B CN 103729314B
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access instruction
storehouse
parameter
access
write
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CN103729314A (en
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田京京
易冬柏
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Ali Corp
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Ali Corp
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Abstract

The management method of a kind of memory access instruction, for including the random access memory in multiple storehouse.The method comprises the following steps.Receiving multiple access instruction, these access instructions include the first access instruction, its first row being intended to access the first storehouse.The upper access instruction accessing the first storehouse is the second access instruction.Judge whether the first row is startup;If no, the time interval received between the first access instruction and execution the second access instruction being set to the count value corresponding to the first storehouse.Judge whether count value exhausts parameter more than a critical value with the conversion of decision storehouse.Exhaust parameter according to storehouse conversion and produce the priority value of the first access instruction.According to each self-corresponding priority value of access instruction, determine the execution sequence of access instruction.Thereby, the frequency range utilization rate of random access memory can be increased.

Description

The management method of memory access instruction and management system
Technical field
The invention relates to a kind of management method, and in particular to a kind of management for random access memory Method and management system.
Background technology
One random access memory can allow multiple client access.But, in the ordinary course of things, arbitrary access The memory same time can only allow a client access.Therefore, deposit when each client will access arbitrary access During reservoir, which client is a control unit can determine by access random access memory.A kind of practice is, Each client that allows in turn accesses random access memory, and namely each client can be assigned to identical Time.But this practice can not effectively utilize the frequency range of random access memory.Therefore, these are the most effectively allowed Client access random access memory, also increases the frequency range utilization rate of random access memory, for this field skill simultaneously Art personnel subject under discussion of interest.
Summary of the invention
Embodiments of the invention propose management method and the management system of a kind of memory access instruction, random in order to increase The frequency range utilization rate of access memory.
One embodiment of the invention proposes the management method of a kind of memory access instruction, for random access memory.This Random access memory includes multiple storehouse (bank).This management method includes: receive in order to access random access memory Multiple access instructions.These access instructions are not yet performed, and wherein comprise the first access instruction.First access instruction It is intended to access the first row in the first storehouse.Additionally, the time receiving the first access instruction is later than receives the second access instruction Time, and the second access instruction is an access instruction accessing the first storehouse on the first access instruction.This manager Method also includes: calculates each self-corresponding priority value (Status) of access instruction, wherein calculates the excellent of the first access instruction Whether the step of first level value further includes: be startup according to the first row in the first storehouse, to produce a line hit parameter (PGHit); When row hit parameter is not for starting (If PGHit=0), will receive between the first access instruction and the second access instruction Time interval is set to the count value (counter) corresponding to the first storehouse;Judge whether count value is more than corresponding to the first storehouse A critical value, with determine one storehouse conversion exhaust parameter (BKCHG OUT);And, right according at least to the first storehouse institute The storehouse conversion answered exhausts parameter (BKCHG OUT) and produces the priority value (Status) of the first access instruction.This manager Method also includes: according to each self-corresponding priority value (Status) of access instruction, determine the execution sequence of access instruction.
In one embodiment, the step of the priority value of above-mentioned calculating the first access instruction further include according to following parameters it One and any combination: finally read and write parameter (last_wrj), row hit parameter (PGHit), read-write hit parameter (RWHit), Storehouse conversion parameter (BKCHG), storehouse conversion exhaust parameter (BKCHG OUT), postpone to exhaust parameter (Latency_out) Parameter (Slice_out) is exhausted with sheet counting.Wherein, finally read-write parameter represents the previous reception of this first access instruction One the 3rd access instruction whether be write instruction.Read-write hit parameter represents the 3rd access instruction and the first access instruction Whether it is similarly reading instruction or write instruction.Storehouse conversion parameter represents whether are the first access instruction and the 3rd access instruction Access different storehouses.Postpone to exhaust the time wait more than the most that parameter represents that the first access instruction is waited Critical value.Whether sheet counting exhausts parameter and represents that continuous print is responded and send the number of times of a client of the first access instruction and surpass Cross a sheet counting critical value.
In one embodiment, above-mentioned management method further includes: if the second access instruction is write instruction, critical value is Based on one of following parameters and and determine: the write latency time of random access memory, burst-length, write Recovery time, extra latency, storehouse precharge time and row effective time delay.If the second access instruction is for reading Instruction, critical value be based on one of following parameters and and determine: the extra latency of random access memory, Read precharge time, storehouse precharge time and row effective time delay.
In one embodiment, above-mentioned management method further includes: corresponding to finally reading and writing parameter (last_wrj), according to row Hit parameter (PGHit), read-write hit parameter (RWHit), storehouse conversion parameter (BKCHG) exhaust parameter with storehouse conversion (BKCHG_OUT) a reading truth table and a write truth table are set up.Read truth table and include multiple reading item Secondary, each reads item time corresponding at least one the first operation.Write truth table includes multiple write item, and Each write item time is corresponding at least one the second operation.Above-mentioned management method further includes: according to the first operating and setting Each reading item corresponds to one of them of multiple mark;And according to the second operating and setting each write item Correspond to one of them of these marks.
In one embodiment, the step of the priority value of above-mentioned calculating the first access instruction includes: according to corresponding to One access instruction finally read and write parameter, row hit parameter, read-write hit parameter, storehouse conversion parameter and storehouse are changed and are exhausted Parameter, obtains the first mark in above-mentioned mark;And according to the first mark, corresponding to the delay of the first access instruction Exhaust parameter (Latency_out) and exhaust parameter (Slice_out) calculating priority value with sheet counting.
In one embodiment, above-mentioned management method further includes: if the first mark and delay exhaust parameter and meet one in advance If during condition, postpone to perform the first access instruction.
For another one angle, one embodiment of the invention proposes the management system of a kind of memory access instruction, uses In random access memory.Random access memory includes multiple storehouse (bank), and this management system includes: the first module, In order to receive to access multiple access instructions of random access memory.Wherein, these access instructions are not yet performed, And comprise the first access instruction.First access instruction is intended to access the first row in the first storehouse.Receive the first access instruction Time be later than receive the second access instruction time.Second access instruction be on the first access instruction one to access The access instruction in one storehouse.This management system also includes the second module, each self-corresponding one excellent in order to calculate access instruction institute First level value (Status).Second module also in order to: whether be startup according to the first row in the first storehouse, to produce a line hit Parameter (PGHit);When row hit parameter is not for starting (If PGHit=0), deposit receiving the first access instruction and second Time interval between instruction fetch is set to the count value (counter) corresponding to the first storehouse;Judge count value (counter) Whether more than a critical value corresponding to the first storehouse, to determine that storehouse conversion exhausts parameter (BKCHG_OUT);And Exhaust parameter (BKCHG_OUT) according at least to the storehouse conversion corresponding to the first storehouse and produce the priority of the first access instruction Value (Status).This management system also includes the 3rd module, in order to according to each self-corresponding priority value of access instruction (Status) execution sequence of access instruction, is determined.
In one embodiment, the second above-mentioned module is more in order to according to one of following parameters and any combination calculating first thereof The priority value of access instruction: finally read and write parameter (last_wrj), row hit parameter (PGHit), read-write hit parameter (RWHit), storehouse conversion parameter (BKCHG), storehouse conversion exhaust parameter (BKCHG_OUT), postpone to exhaust parameter (Latency_out) parameter (Slice_out) is exhausted with sheet counting.Finally read-write parameter represents the previous of this first access instruction Whether one the 3rd access instruction of individual reception is write instruction.Read-write hit parameter represents that the 3rd access instruction and first is deposited Whether instruction fetch is similarly reading instruction or write instruction.Storehouse conversion parameter represents the first access instruction and the 3rd access Whether instruction accesses different storehouses.Postponing to exhaust the time that parameter represents that the first access instruction is waited exceedes the most One waits critical value.Sheet counting exhausts parameter and represents that continuous print responds the number of times of the client sending the first access instruction Whether exceed sheet counting critical value.
In one embodiment, above-mentioned management system further includes the 4th module and the 5th module.If the second access instruction is Write instruction, the 4th module in order to set critical value be based on one of following parameters and and determine: arbitrary access is deposited The write latency time of reservoir, burst-length, write-recovery time, extra latency, storehouse precharge time and row Effectively time delay.If the second access instruction is for reading instruction, the 5th module is based on following ginseng in order to set critical value One of number and and determine: the extra latency of random access memory, when reading precharge time, storehouse precharge Between with row effective time delay.
In one embodiment, above-mentioned management system further includes the 6th module, the 7th module and the 8th module.6th Module in order to finally to read and write parameter (last_wrj) corresponding to one, according to row hit parameter (PGHit), read-write hit parameter (RWHit), storehouse conversion parameter (BKCHG) and storehouse conversion exhaust parameter (BKCHG_OUT) foundation reading truth table and write Enter truth table.Reading truth table and include multiple reading item, each reads item time corresponding at least one the first operation. Write truth table includes multiple write item, and each write item time is corresponding at least one the second operation.7th Module is in order to according to the first operating and setting, each reads item and time corresponds to one of them of multiple mark.8th module In order to time to correspond to one of them of described mark according to each write item of the second operating and setting.
In one embodiment, the second above-mentioned module also in order to: according to finally reading and writing change corresponding to the first access instruction Number, row hit parameter, read-write hit parameter, storehouse conversion parameter exhaust parameter with storehouse conversion, obtain in described mark First mark;And the delay according to the first mark, corresponding to the first access instruction exhaust parameter (Latency_out) with Sheet counting exhausts parameter (Slice_out) and calculates the priority value of the first access instruction.
In one embodiment, above-mentioned management system further includes: the 9th module, if the first mark and delay exhaust parameter Meet one pre-conditioned time, perform the first access instruction in order to postponing.
Based on above-mentioned, the management method that the embodiment of the present invention proposes and management system, can determine to deposit through multiple parameters The execution sequence of instruction fetch, thereby increases the frequency range utilization rate of random access memory.
For the features described above of the present invention and advantage can be become apparent, special embodiment below, and coordinate institute's accompanying drawings It is described in detail below.
Accompanying drawing explanation
Fig. 1 is the block diagram according to an embodiment explanation electronic installation.
Fig. 2 is the schematic diagram of the execution sequence determining access instruction according to an embodiment explanation.
Fig. 3 is the flow chart of the management method illustrating memory access instruction according to an embodiment.
Fig. 4 is the schematic diagram illustrating according to an embodiment and reading truth table.
Fig. 5 is to illustrate abbreviation according to an embodiment to read the schematic diagram of truth table.
Fig. 6 is the schematic diagram illustrating write truth table according to an embodiment.
Main element symbol description
100: electronic installation
110: coffret
120: control unit
130: random access memory
131,132,133: storehouse
201,202,203: access instruction
210,220,240,250: step
211,212,213,231: priority value
The manager of S302, S304, S306, S308, S310, S312, S314, S316: memory access instruction The step of method
400: read truth table
401~416: read item
500: form
501: combination
600: write truth table
601~616: write item
Detailed description of the invention
Fig. 1 is the block diagram according to an embodiment explanation electronic installation.
Refer to Fig. 1, electronic installation 100 includes coffret 110, control unit 120, random access memory 130. Such as, electronic installation 100 be a Set Top Box (set-top box), PC, smart mobile phone, panel computer or Server.
Coffret 110 is to be electrically connected to other electronic installations.These electronic installations can pass through coffret 110 Transmit one or more access instruction to control unit 120, in order to access random access memory 130.
Control unit 120 is to control the integrated operation of electronic installation 100.Such as, during control unit 120 can be Central Processing Unit (Central Processing Unit, CPU), microprocessor (Microprocessor), data signal Processor (Digital Signal Processor, DSP), Programmable Logic Controller, Application Specific Integrated Circuit (Application Specific Integrated Circuits, ASIC) or programmable logic device (Programmable Logic Device, PLD).
In one embodiment of this invention, above-mentioned random access memory 130 is a kind of double data rate synchronous dynamic Random access memory (Double Data Rate Synchronous Dynamic Random Access Memory, DDR SDRAM).The present invention does not limit the kenel of random access memory 130, and it can be to be depositing at random of other forms Access to memory, such as single times of data rate Synchronous Dynamic Random Access Memory (SDR SDRAM), or meets associating electronics Other random access memory 130 of the device committee (Joint Electron Device Council) institute's formulation industrial standard. In the present invention, random access memory 130 can include multiple storehouse (bank), for example, storehouse 131, storehouse 132 and storehouse 133.Each storehouse can at least include a matrix structure (being represented by row and column), each unit on this matrix structure Element can store at least one bit (bit).When wanting read/write data, control unit 120 can first carry out precharge (precharge) Program, then start a row, the most just can from the row being activated read/write data.
Fig. 2 is the schematic diagram of the execution sequence determining access instruction according to an embodiment explanation.
Refer to Fig. 2, first, control unit 120 can receive multiple access instruction (such as, access instruction 201,202 With 203, also referred to as memory access instruction).Each access instruction is intended to the row accessing in a storehouse.This Time, these access instructions received not yet are performed.In step 210, control unit 120 can be by received Access instruction with upper one perform access instruction compare, to calculate each self-corresponding priority value of these access instructions (Status).In the present embodiment, priority value 211 is corresponding access instruction 201, and priority value 212 is that correspondence is deposited Instruction fetch 202, and priority value 213 is corresponding access instruction 203.
In a step 220, control unit 120 can pick out a priority value from the priority value that these calculate 231.Such as, control unit 120 is to select the maximum priority value of numerical value as priority value 231.
In step 240, control unit 120 can accept the access instruction of priority value 231 correspondence.For example, If selected is priority value 211, then control unit 120 can accept access instruction 201.
In step 250, control unit 120 can access random access memory according to the access instruction received 130.Thereby, according to these each self-corresponding priority values of access instruction, control unit 120 can determine that these are deposited The execution sequence of instruction fetch.
Specifically, when calculating the priority value of an access instruction, control unit 120 can judge to access Whether row is startup.If it is not, the count value that storehouse that this access instruction is to be accessed is corresponding then can be determined whether (counter) whether more than a critical value.If this count value is more than critical value, then control unit 120 can adjust this and deposits The priority value of instruction fetch so that this access instruction can preferentially be accepted.
Specifically, controller 120 can set a count value for each storehouse.This count value in order to represent on Time interval between the access instruction that one access instruction being implemented in storehouse receives up till now.It is assumed herein that access instruction 201 (the also known as first access instructions) are intended to access the row (also known as the first row) in storehouse 131 (the also known as first storehouse), and upper one The individual access instruction being implemented in storehouse 131 is referred to as the second access instruction, and (that is, the time of reception access instruction 201 is later than and connects Receive the time of the second access instruction).And perform the second access instruction to the time interval meeting received between access instruction 201 It is set to the count value of storehouse 131 correspondence.
As a example by the priority value calculating access instruction 201.After receiving access instruction 201, control unit 120 Can judge whether the first row that access instruction 201 is to be accessed is starting the state of (active) at present, thereby produces one Individual row hit parameter (PGHit).This journey hit parameter is to represent that whether row that access instruction 201 is to be accessed is for opening Dynamic.If the row hit parameter corresponding to access instruction 201 is for starting (If PGHit=0), control unit 120 can be by Receive access instruction 201 and the time interval performed between the second access instruction is set to the count value corresponding to storehouse 131. Control unit 120 can judge that whether this count value is more than the critical value corresponding to storehouse 131.This critical value library representation 131 Will be through its row hit parameter the most just can be received not for starting the access instruction of (PGHit=0).If storehouse Count value corresponding to 131 is more than the critical value corresponding to storehouse 131, then it represents that storehouse 131 can accept access and refer to Make 201.On the other hand, whether control unit 120 can determine a storehouse conversion consumption more than critical value according to count value Parameter (BKCHG_OUT) to the greatest extent, and exhaust parameter to produce the priority of access instruction 201 according at least to the conversion of this storehouse Value.It should be noted that in this embodiment, only when the row hit parameter of access instruction 201 correspondence is not for starting Time, control unit 120 just can compare count value and critical value.
In one embodiment, control unit 120 can be also write instruction according to the second access instruction or read instruction Set the critical value corresponding to storehouse 131.Specifically, if the second access instruction is write instruction, then control unit 120 Critical value can be set according to below equation (1).
TWCNT=WL+BL/2+tWR+AL+tRP+tRCD…(1)
Wherein, TWCNT is the critical value corresponding when the second access instruction is write instruction.WL is that write is prolonged Time (write latency) late.BL is burst-length (burst length), for example, the 1 of control unit 120,2,4 Or 8 clock cycle (clock cycle).TWR is write-recovery time (Write recovery time), represents at one The time being had to wait for before completing effective write operation and precharge in the storehouse started.AL is extra latency (additional length), for example, 0.TRP is storehouse precharge time, also referred to as instructs (precharge precharge time Command period), represent and to be pre-charged the time needed for a storehouse.TRCD is the effective time delay (active of row Command to internal read or write delay time), expression to make needed for a row effectively (or claiming to start) time Between.
On the other hand, if the second access instruction is for reading instruction, then control unit 120 can be come according to below equation (2) Set critical value.
TRCNT=AL+tRTP+AL+tRP+tRCD…(2)
Wherein, TRCNT is the critical value corresponding when the second access instruction is to read instruction.TRTP is for reading preliminary filling Electricity time (internal read command to precharge command delay), represents in same storehouse, reads Time needed for startup.
Below equation (3) can be produced with (2) after being merged by aforesaid equation (1).
BKCHG_OUT=!PGHit&[BKCHG_OUT counter>((Write)?TWCNT: TRCNY)]…(3)
Wherein, BKCHG_OUT is that storehouse conversion exhausts parameter, is a cloth woods value (boolean value).PGHit For row hit parameter, it it is a cloth woods value.BKCHG_OUT counter is the count value corresponding to a storehouse, is one Individual real number.Write is a cloth woods value, represents whether the second access instruction is write instruction.In other words, deposit when second When instruction fetch is write instruction (Write=True), count value BKCHG_OUT counter can be with critical value TWCNT Relatively, otherwise compare with critical value TRCNY.And when hit parameter of being only expert at is not for starting, storehouse conversion exhausts Parameter its is possible to be to start.Control unit 120 can produce corresponding storehouse conversion according to equation (3) and exhaust parameter.
It should be noted that along with the model of random access memory 130, write latency time, burst-length, write Enter recovery time, extra latency, storehouse precharge time, row effective time delay can or read precharge time Can there is different values.Control unit 120 can produce different critical values along with the model of random access memory 130, The present invention is the most not subject to the limits.
After the storehouse calculating each access instruction is changed and exhausted parameter, control unit 120 can turn according at least to storehouse Change and exhaust parameter and determine the priority value of each access instruction, and determine access instruction according to these priority values Execution sequence.Such as, control unit 120 conversion of prioritizing selection storehouse can exhaust the access instruction that parameter is startup.
Fig. 3 is the flow chart of the management method illustrating memory access instruction according to an embodiment.
Refer to Fig. 3, in step s 302, receive in order to the multiple access instructions accessing random access memory.? In step S304, for each access instruction, whether it is startup according to the row that access instruction is to be accessed, produces one Individual row hit parameter (PGHit).In step S306, it is judged that whether row hit parameter is startup.
If row hit parameter is for starting, in step S308, produce the priority value of each access instruction.The present invention It is not limited in how step S308 produces priority value.
If going hit parameter for startup, in step S310, the access instruction that will receive at present and a upper execution Time interval between access instruction is set to a count value corresponding to storehouse to be accessed.In step S312, sentence Whether disconnected count value is more than corresponding critical value, to determine that a storehouse conversion exhausts parameter (BKCHG_OUT).? In step S314, exhaust parameter (BKCHG_OUT) according at least to storehouse conversion and produce the priority value of access instruction.
In step S316, according to each self-corresponding priority value of access instruction, determine the execution sequence of access instruction.
But, in Fig. 3, each step has described in detail as above, just repeats no more at this.
[the second embodiment]
Second embodiment is similar with first embodiment, only describes difference at this.In the first embodiment, list is controlled Unit 120 is to exhaust parameter (BKCHG_OUT) according at least to storehouse conversion to produce the priority value of access instruction.But, In a second embodiment, storehouse conversion can also be exhausted parameter and considers to calculate together with other parameters by control unit 120 Priority value.Specifically, control unit 120 can according to finally read and write parameter (last_wrj), row hit parameter (PGHit), Read-write hit parameter (RWHit), storehouse conversion parameter (BKCHG), storehouse conversion exhaust parameter (BKCHG_OUT), postpone Exhaust parameter (Latency_out) and sheet counting to exhaust one of them or a combination thereof of parameter (Slice_out) and calculate one The priority value of access instruction.
Finally reading and writing parameter (last_wrj) is a cloth woods value, is used for representing that is sent to depositing of control unit 120 Whether instruction fetch is write instruction (i.e. at one the 3rd access instruction of the previous reception of access instruction 201).Such as, if 3rd access instruction is write instruction, then the last read-write parameter of access instruction 201 correspondence is for starting.
Read-write hit parameter (RWHit) is a cloth woods value, be used for representing an access instruction whether with accept at present Access instruction is similarly reading (or write) instruction.Such as, if the 3rd access instruction and access instruction 201 are similarly reading Take (or write) instruction, then the read-write hit parameter of access instruction 201 correspondence is for starting.
Parameter (BKCHG) is changed into a cloth woods value in storehouse, is used for the access representing an access instruction with accepting at present Whether instruction accesses different storehouses.Such as, if the second access instruction to access different storehouses from access instruction 201, Then the storehouse conversion parameter of access instruction 201 correspondence is for starting.
Postponing to exhaust parameter (Latency_out) is a cloth woods value, is used for representing that the access instruction of reception at present is waited Time the most more than one wait critical value.This waits that critical value can be set by client.Such as, if connecing After harvesting instruction fetch 201, it waits that the time of (being not yet performed) exceedes wait critical value, then access instruction 201 Corresponding delay exhausts parameter for starting.
It is a cloth woods value that sheet counting exhausts parameter (Slice_out), is used for representing that control unit 120 continuous print has responded one Whether the number of times of individual client is more than a sheet counting critical value.Such as, access instruction 201 is by first client End sends.When receiving access instruction 201, if control unit 120 continuous print responds (execution) first client 5 access instructions that end is sent, and sheet counting critical value is 4, then the sheet counting consumption corresponding to access instruction 201 Parameter is for starting to the greatest extent.
Specifically, control unit 120 can be according to row hit parameter (PGHit), read-write hit parameter (RWHit), storehouse Conversion parameter (BKCHG) exhausts parameter (BKCHG_OUT) with storehouse conversion and sets up a reading truth table.Read true Value table includes multiple reading item, if these read item has noted down a upper access instruction for reading instruction, then Perform the operation needed for current access instruction.Time needed for operating according to these, control unit 120 can sort this A little items that read, and set each and read Xiang Cihui and correspond to a mark.And these marks can be used to calculate excellent First level value.
Fig. 4 is the schematic diagram illustrating according to an embodiment and reading truth table.
Refer to Fig. 4, read truth table 400 and include reading item time 401 ~ 416.Different reading Xiang Cihui corresponds to not Parameter (RWHit) is hit in same row hit parameter (PGHit), read-write, storehouse is changed parameter (BKCHG) and exhausted with storehouse conversion Parameter (BKCHG_OUT).Further, each reads item is to correspond to one or more operation (the also known as first operation). For example, read item time 401 and correspond to PGHit=0, RWHit=0, BKCHG_OUT=0, BKCHG=0, And operation " precharge-> start-> write ".Reading the item time meaning representated by 401 is, if a upper access instruction For reading instruction, current access instruction is write instruction (read-write hit parameter RWHit=0), and write instruction to be deposited Take is capable not for starting (row hit parameter PGHit=0), and the storehouse that write instruction is to be accessed is wanted with a upper access instruction The storehouse of access differs (storehouse conversion parameter BKCHG=0), and write instruction storehouse to be accessed can't accept row and order Middle parameter PGHit is for the access instruction (storehouse conversion exhaust parameter BKCHG_OUT=0) started, now required Operation is precharge, starts and write operation.It should be noted that the operation reading item time 404 correspondences includes " start (can hide) ", it represents that the operation started can be hidden in other instructions, and the most required time may not Including starting the required time.On the other hand, reading item time 413 operations corresponding with 414 is " seamless execution ", its Represent that control unit 120 need not other and operates, such as precharge etc., the access instruction that just can perform to receive at present.And read Taking the item time operation corresponding to 411,412,415 and 416 is " XXX ", it represents that this situation can't occur.This It is because reading item time 411,412,415 row hit parameter (PGHit) corresponding with 416 and exhausts parameter with storehouse conversion (BKCHG_OUT) it is all to start, such situation (such as above equation (3)) can't occur in the present embodiment.
This area usually intellectual, can determine to read truth table 400 according to the model of random access memory 130 In each operation required time spent.Thereby, can sort according to the time (or operation) spent that these are read Take item time 401 ~ 416.Such as, reading item time 413 minimum with the 414 required times spent, therefore its sequence is respectively It is 1 and 2.Such as, item time 401,402,405 is read more with the 406 required times spent, therefore its sequence It is 9.Control unit 120 can operate according to these, sets each reading Xiang Cihui and corresponds to a mark.Such as, The mark reading item time 414 correspondences is " 1100 ".In the present embodiment, these marks are to represent by binary bit.Value The biggest mark, represents that the time spent is the fewest, these reading items of the execution that therefore control unit 120 can be preferential Corresponding access instruction.
In one embodiment, the information that reading truth table 400 is comprised can be one or more Logic judgment formula by abbreviation. Control unit 120 can calculate the mark of an access instruction according to these Logic judgment formulas.Such as, in this enforcement In example, a mark is to represent with 4 bits, therefore can produce corresponding logic for each bit and sentence Disconnected formula.
Fig. 5 is to illustrate abbreviation according to an embodiment to read the schematic diagram of truth table.
Referring to Fig. 4 and Fig. 5, at this with the most notable bit (most significant bit, MSB) of mark as a example by. When the most notable bit of mark is " 1 " or " x " time, it is corresponding to reading item time 409 ~ 416.Read item time 409 ~ 416 Row hit parameter (PGHit), read-write hit parameter (RWHit), storehouse conversion parameter (BKCHG) with storehouse conversion exhaust change Number (BKCHG_OUT) can a corresponding position to form 500, be denoted as " 1 " or " x ".On the other hand, read The most notable bit taking the item time mark corresponding to 401 ~ 408 is " 0 ", form 500 is to be denoted as " and 0 ".Form 500 can obtain combining 501 after the step of abbreviation, and its Logic judgment formula represented is " PGHit ".Namely Say, as long as row hit parameter (PGHit) is " 1 ", the most notable bit one of mark is set to " and 1 ".Other bits of mark, A Logic judgment formula can also be obtained by the mode of abbreviation, not repeat them here.Through above-mentioned abbreviation program, read The information that truth table 400 is comprised can be represented as below equation (4) ~ (7).
Score[3]=PGHit…(4)
Score[2]=PGHit&RWHit+BKCHG&BKCHT_OUT…(5)
Score[1]=!BKCHG&BKCHG_OUT…(6)
Score[0]=PGHit&!BKCHG+RWHit&BKCHG_OUT…(7)
I-th bit (that is, Score [3] is the most notable bit) during wherein Score [i] represents mark.But, at other In embodiment, each mark can also represent with the more or less of bit of number, and the present invention is the most not subject to the limits.
On the other hand, control unit 120 also can hit parameter (PGHit) according to row, parameter (RWHit) is hit in read-write, Storehouse conversion parameter (BKCHG) exhausts parameter (BKCHG_OUT) with storehouse conversion and sets up a write truth table.Read Truth table includes multiple write item, if it is write instruction that these write items have noted down a upper access instruction, Then perform the operation (the also known as second operation) needed for current access instruction.
Fig. 6 is the schematic diagram illustrating write truth table according to an embodiment.
Refer to Fig. 6, write truth table 600 includes writing item time 601 ~ 616.Different write Xiang Cihui corresponds to not Parameter (RWHit) is hit in same row hit parameter (PGHit), read-write, storehouse is changed parameter (BKCHG) and exhausted with storehouse conversion Parameter (BKCHG_OUT).Further, each write item is to correspond to one or more operation.Wherein, " write money Material terminate " be represent write data after to precharge between need wait a period of time.But, write truth table 600 In operation with reading truth table 400 partial operation similar, just repeat no more at this.
This area usually intellectual, can determine to write truth table 600 according to the model of random access memory 130 In each operation required time spent.Thereby, can sort according to the time (or operation) spent that these are write Enter item time 601 ~ 616.Then, control unit 120 can set each write item is to correspond to a mark.Phase With, after abbreviation, the information comprised in write truth table 600 can be represented as below equation (8) ~ (11).
Score [3]=PGHit&RWHit+RWHit&PGCHG_OUT&BKCHG ... (8)
Score[2]=PGHit+!RWHit&BKCHG_OUT&BKCHG…(9)
Score [1]=PGHit&!RWHit+BKCHG_OUT&!BKCHG…(10)
Score[0]=PGHit&!BKCHG+BKCHG_OUT&BKCHG+RWHit& BKCHG_OUT…(11)
After receiving access instruction 201, control unit 120 can be according to the last read-write of access instruction 201 correspondence Parameter (last_wrj), row hit parameter (PGHit), read-write hit parameter (RWHit), storehouse conversion parameter (BKCHG) with Storehouse conversion exhausts parameter (BKCHG_OUT), obtains corresponding mark according to above-mentioned equation (4) ~ (11).The opposing party Face, control unit 120 can be according to the mark obtained, and the delay of access instruction 201 correspondence exhausts parameter (Latency_out) Exhaust parameter (Slice_out) with sheet counting and calculate corresponding preferred value.Such as, control unit 120 can be according to following Equation (12) ~ (17) calculate priority value.
Status[5]=Latency_out…(12)
Status[4]=(Last_wrj)?(RWHit&PGHit) | (RWHit&BKCHG_OUT&BKCHG): PGHit…(13)
Status [3]=!Slice_out…(14)
Status[2]=(Last_wrj)?PGHit| (!RWHit&BKCHG_OUT&BKCHG): (RWHit &PGHit) | (BKCHG&BKCHG_OUT) ... (15)
Status[1]=(Last_wrj)?(!RWHit&PGHit) | (BKCHG_OUT&!BKCHG): (BKCHG_OUT&!BKCHG)…(16)
Status[0]:(Last_wrj)?(!BKCHG&PGHit) | (BKCHG_OUT&BKCHG) | (RWHit&BKCHG_OUT): (!BKCHG&PGHit) | (RWHit&BKCHG_OUT) ... (17)
Wherein, the value of i-th bit during Status [i] represents priority value.It should be noted that aforesaid equation (4) ~ (7) After merging with equation (8) ~ (11), add finally read and write parameter (last_wrj) will become equation (13), (15)~(17).In other words, in the present embodiment, in priority value, the 4th, 2 ~ 0 bits are equal to the of mark 4 ~ 0 bits.But, the present invention is the most not subject to the limits, and in other embodiments, four bits of mark can also be with Postpone to exhaust parameter (Latency_out) and sheet counting exhausts parameter (Slice_out) and is combined in other ways as preferentially Level value.If person, in other embodiments, priority value can comprise more bit, with consider more other because of Element.
In this embodiment, after receiving an access instruction, control unit 120 can be according to equation (12) ~ (17) Calculate the priority value of each access instruction.Control unit 120 can select maximum priority value, accept and Perform corresponding access instruction.But, in one embodiment, if mark corresponding to access instruction exhausts with delay Parameter (Latency_out) meet one pre-conditioned time, control unit 120 can postpone to perform this access instruction.Such as, This is pre-conditioned is when delay exhausts parameter (Latency_out) for not starting and each bit of mark is " 0 " time Set up.In other words, in this embodiment, when the 5th, 4,2,1 and 0 bit of a priority value it is " 0 " Time, control unit 120 can postpone to perform corresponding access instruction.
In one embodiment, the function of control unit 120 is to be implemented as multiple source code (or multiple module), these journeys Formula (or module) can be stored in a memory, a processor perform.The combination of these modules is also referred to as one The management system of individual memory access instruction.But, the present invention is the most not subject to the limits, and the function of control unit 120 also may be used To be implemented as one or more logic gate or circuit.The present invention is not limiting as controlling single by software or the mode implementation of hardware The function of unit 120.
In other embodiments, read truth table 400 and can be set to other numbers with the mark writing truth table 600 Value.Consequently, it is possible to the Logic judgment formula being different from equation (12) ~ (17) just can be produced.The present invention is not limiting as reading Take the value of truth table 400 and write truth table 600 mid-score.Additionally, in one embodiment, along with arbitrary access is deposited The model of reservoir 130 or frequency difference, read truth table 400 and spent with each operation in write truth table 600 Time be likely to difference, thereby can produce different ranking results.The present invention is not limiting as random access memory 130 Model and frequency.
In sum, the management method of embodiment of the present invention proposition and electronic installation, parameter can be exhausted according to storehouse conversion Determine a priority value for each access instruction, thereby determine the execution sequence of access instruction.Consequently, it is possible to can To promote the frequency range utilization rate of random access memory.
Although the present invention is disclosed above with embodiment, so it is not limited to the present invention, any art Middle tool usually intellectual, without departing from the spirit and scope of the present invention, when making a little change and retouching, therefore Protection scope of the present invention is when being defined in the range of standard depending on claim.

Claims (10)

1. a management method for memory access instruction, for a random access memory, wherein this arbitrary access is deposited Reservoir includes multiple storehouse, and this management method includes:
Receiving the multiple access instructions in order to access this random access memory, wherein those access instructions are not yet performed, Those access instructions comprise one first access instruction, one first storehouse that this first access instruction is intended to access in those storehouses One the first row, receiving time of this first access instruction is later than the time receiving one second access instruction, and this second Access instruction is an access instruction accessing this first storehouse on this first access instruction;
Calculate those each self-corresponding priority values of access instruction, wherein calculate the priority of this first access instruction The step of value further includes:
Whether this first row according to this first storehouse is startup, to produce a line hit parameter;
When this row hit parameter is not for starting, this first access instruction of reception is referred to performing this second access Time interval between order is set to this count value corresponding to the first storehouse;
Judge whether this count value is more than this critical value corresponding to the first storehouse, to determine that a storehouse conversion exhausts Parameter;And
Exhaust parameter according at least to this storehouse conversion corresponding to this first storehouse and produce the preferential of this first access instruction Level value;And
According to those each this priority values self-corresponding of access instruction, determine an execution sequence of those access instructions.
2. management method as claimed in claim 1, further includes:
If this second access instruction is write instruction, this critical value is to determine based on one of following parameters and any combination thereof Fixed: the write latency time of this random access memory, burst-length, write-recovery time, extra latency, Storehouse precharge time and row effective time delay;And
If this second access instruction is for reading instruction, this critical value is to determine based on one of following parameters and any combination thereof Fixed: this extra latency of this random access memory, read precharge time, this storehouse has with this row precharge time Effect time delay.
3. management method as claimed in claim 1, further includes:
Finally read and write parameter corresponding to one, according to a line hit parameter, one read-write hit parameter, one storehouse conversion parameter with The conversion of this storehouse exhausts parameter and sets up a reading truth table and a write truth table, and wherein this reading truth table includes multiple reading Taking item, each those read item time and include multiple write item corresponding at least one first operation, this write truth table, And those write items time each are corresponding at least one second operation;
Read items according to each those of this at least one first operating and setting and time correspond to one of them of multiple mark;With And
One of them of those marks time is corresponded to according to this at least one second operating and setting those write items each.
4. management method as claimed in claim 3, wherein calculates the step bag of the priority value of this first access instruction Include:
According to corresponding to this of this first access instruction finally read and write parameter, this row hit parameter, this read-write hit parameter, Conversion parameter in this storehouse exhausts parameter with the conversion of this storehouse, obtains one first mark in those marks;And
A delay according to this first mark, corresponding to this first access instruction exhausts parameter and exhausts parameter with a piece of counting Calculate this priority value of this first access instruction.
5. management method as claimed in claim 4, further includes:
If this first mark and this delay exhaust parameter meet one pre-conditioned time, postpone to perform this first access instruction.
6. a management system for memory access instruction, for a random access memory, wherein this arbitrary access is deposited Reservoir includes multiple storehouse, and this management system includes:
First module, in order to receive to access multiple access instructions of this random access memory, wherein those accesses Instruction is not yet performed, and those access instructions comprise one first access instruction, and this first access instruction is intended to access those One the first row in one first storehouse in storehouse, receiving time of this first access instruction is later than and receives one second access instruction Time, and this second access instruction is an access instruction accessing this first storehouse on this first access instruction;
Second module, in order to calculate those each self-corresponding priority values of access instruction, wherein this second module is also In order to:
Whether this first row according to this first storehouse is startup, to produce a line hit parameter;
When this row hit parameter is not for starting, this first access instruction of reception is referred to this execution second access Time interval between order is set to this count value corresponding to the first storehouse;
Judge whether this count value is more than this critical value corresponding to the first storehouse, to determine that a storehouse conversion exhausts Parameter;And
Exhaust parameter according at least to this storehouse conversion corresponding to this first storehouse and produce the preferential of this first access instruction Level value;And
3rd module, in order to according to those each this priority values self-corresponding of access instruction, to determine those access instructions An execution sequence.
Manage system the most as claimed in claim 6, further include:
4th module, if this second access instruction is write instruction, in order to set this critical value be based on following parameters it One and any combination determine: when the write latency time of this random access memory, burst-length, write recovery Between, extra latency, storehouse precharge time and row effective time delay;And
5th module, if this second access instruction for read instruction, in order to set this critical value be based on following parameters it One and any combination determine: this extra latency of this random access memory, read precharge time, this storehouse Precharge time and this row effective time delay.
Manage system the most as claimed in claim 6, further include:
6th module, finally reads and writes parameter corresponding to one, according to a line hit parameter, read-write hit parameter, a storehouse Conversion parameter and the conversion of this storehouse exhaust parameter and set up a reading truth table and write truth table, wherein this reading truth table Including multiple reading items, each those read item time and operate corresponding at least one first, and this write truth table includes many Individual write item, and those write items time each are corresponding to one second operation;
7th module, corresponds to multiple mark in order to read item according to each those of this at least one first operating and setting One of them;And
8th module, in order to correspond to those marks according to this at least one second operating and setting those write items each One of them.
Manage system the most as claimed in claim 8, wherein this second module also in order to:
According to corresponding to this of this first access instruction finally read and write parameter, this row hit parameter, this read-write hit parameter, Conversion parameter in this storehouse exhausts parameter with the conversion of this storehouse, obtains one first mark in those marks;And
A delay according to this first mark, corresponding to this first access instruction exhausts parameter and exhausts parameter with a piece of counting Calculate this priority value of this first access instruction.
Manage system the most as claimed in claim 9, further include:
9th module, if this first mark and this delay exhaust parameter meet one pre-conditioned time, should in order to postpone to perform First access instruction.
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7177985B1 (en) * 2003-05-30 2007-02-13 Mips Technologies, Inc. Microprocessor with improved data stream prefetching
CN101187859A (en) * 2006-11-17 2008-05-28 上海高性能集成电路设计中心 Data stream prefetching method based on access instruction
US7533242B1 (en) * 2005-10-31 2009-05-12 Sun Microsystems, Inc. Prefetch hardware efficiency via prefetch hint instructions

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7177985B1 (en) * 2003-05-30 2007-02-13 Mips Technologies, Inc. Microprocessor with improved data stream prefetching
US7533242B1 (en) * 2005-10-31 2009-05-12 Sun Microsystems, Inc. Prefetch hardware efficiency via prefetch hint instructions
CN101187859A (en) * 2006-11-17 2008-05-28 上海高性能集成电路设计中心 Data stream prefetching method based on access instruction

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