The future calculus of memory management
The future calculus of memory management
Posted Jan 19, 2012 15:29 UTC (Thu) by cesarb (subscriber, #6266)Parent article: The future calculus of memory management
> Let's assume that the next generation processors have two new instructions: PageOffline and PageOnline. When PageOffline is executed (with a physical address as a parameter), that (4K) page of memory is marked by the hardware as inaccessible and any attempts to load/store from/to that location result in an exception until a corresponding PageOnline is executed.
Forgive me for being obtuse, but isn't that the Present bit?